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intel_bios.c
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linux-6.19.14/drivers/gpu/drm/i915/display/intel_bios.c
1/* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28#include <linux/debugfs.h> 29#include <linux/firmware.h> 30 31#include <drm/display/drm_dp_helper.h> 32#include <drm/display/drm_dsc_helper.h> 33#include <drm/drm_edid.h> 34#include <drm/drm_fixed.h> 35#include <drm/drm_print.h> 36 37#include "soc/intel_rom.h" 38 39#include "intel_display.h" 40#include "intel_display_core.h" 41#include "intel_display_rpm.h" 42#include "intel_display_types.h" 43#include "intel_display_utils.h" 44#include "intel_gmbus.h" 45 46#define _INTEL_BIOS_PRIVATE 47#include "intel_vbt_defs.h" 48 49/** 50 * DOC: Video BIOS Table (VBT) 51 * 52 * The Video BIOS Table, or VBT, provides platform and board specific 53 * configuration information to the driver that is not discoverable or available 54 * through other means. The configuration is mostly related to display 55 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 56 * the PCI ROM. 57 * 58 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 59 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 60 * contain the actual configuration information. The VBT Header, and thus the 61 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 62 * BDB Header. The data blocks are concatenated after the BDB Header. The data 63 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 64 * data. (Block 53, the MIPI Sequence Block is an exception.) 65 * 66 * The driver parses the VBT during load. The relevant information is stored in 67 * driver private data for ease of use, and the actual VBT is not read after 68 * that. 69 */ 70 71/* Wrapper for VBT child device config */ 72struct intel_bios_encoder_data { 73 struct intel_display *display; 74 75 struct child_device_config child; 76 struct dsc_compression_parameters_entry *dsc; 77 struct list_head node; 78}; 79 80#define TARGET_ADDR1 0x70 81#define TARGET_ADDR2 0x72 82 83/* Get BDB block size given a pointer to Block ID. */ 84static u32 _get_blocksize(const u8 *block_base) 85{ 86 /* The MIPI Sequence Block v3+ has a separate size field. */ 87 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 88 return *((const u32 *)(block_base + 4)); 89 else 90 return *((const u16 *)(block_base + 1)); 91} 92 93/* Get BDB block size give a pointer to data after Block ID and Block Size. */ 94static u32 get_blocksize(const void *block_data) 95{ 96 return _get_blocksize(block_data - 3); 97} 98 99static const void * 100find_raw_section(const void *_bdb, enum bdb_block_id section_id) 101{ 102 const struct bdb_header *bdb = _bdb; 103 const u8 *base = _bdb; 104 int index = 0; 105 u32 total, current_size; 106 enum bdb_block_id current_id; 107 108 /* skip to first section */ 109 index += bdb->header_size; 110 total = bdb->bdb_size; 111 112 /* walk the sections looking for section_id */ 113 while (index + 3 < total) { 114 current_id = *(base + index); 115 current_size = _get_blocksize(base + index); 116 index += 3; 117 118 if (index + current_size > total) 119 return NULL; 120 121 if (current_id == section_id) 122 return base + index; 123 124 index += current_size; 125 } 126 127 return NULL; 128} 129 130/* 131 * Offset from the start of BDB to the start of the 132 * block data (just past the block header). 133 */ 134static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id) 135{ 136 const void *block; 137 138 block = find_raw_section(bdb, section_id); 139 if (!block) 140 return 0; 141 142 return block - bdb; 143} 144 145struct bdb_block_entry { 146 struct list_head node; 147 enum bdb_block_id section_id; 148 u8 data[]; 149}; 150 151static const void * 152bdb_find_section(struct intel_display *display, 153 enum bdb_block_id section_id) 154{ 155 struct bdb_block_entry *entry; 156 157 list_for_each_entry(entry, &display->vbt.bdb_blocks, node) { 158 if (entry->section_id == section_id) 159 return entry->data + 3; 160 } 161 162 return NULL; 163} 164 165static const struct { 166 enum bdb_block_id section_id; 167 size_t min_size; 168} bdb_blocks[] = { 169 { .section_id = BDB_GENERAL_FEATURES, 170 .min_size = sizeof(struct bdb_general_features), }, 171 { .section_id = BDB_GENERAL_DEFINITIONS, 172 .min_size = sizeof(struct bdb_general_definitions), }, 173 { .section_id = BDB_PSR, 174 .min_size = sizeof(struct bdb_psr), }, 175 { .section_id = BDB_DRIVER_FEATURES, 176 .min_size = sizeof(struct bdb_driver_features), }, 177 { .section_id = BDB_SDVO_LVDS_OPTIONS, 178 .min_size = sizeof(struct bdb_sdvo_lvds_options), }, 179 { .section_id = BDB_SDVO_LVDS_DTD, 180 .min_size = sizeof(struct bdb_sdvo_lvds_dtd), }, 181 { .section_id = BDB_EDP, 182 .min_size = sizeof(struct bdb_edp), }, 183 { .section_id = BDB_LFP_OPTIONS, 184 .min_size = sizeof(struct bdb_lfp_options), }, 185 /* 186 * BDB_LFP_DATA depends on BDB_LFP_DATA_PTRS, 187 * so keep the two ordered. 188 */ 189 { .section_id = BDB_LFP_DATA_PTRS, 190 .min_size = sizeof(struct bdb_lfp_data_ptrs), }, 191 { .section_id = BDB_LFP_DATA, 192 .min_size = 0, /* special case */ }, 193 { .section_id = BDB_LFP_BACKLIGHT, 194 .min_size = sizeof(struct bdb_lfp_backlight), }, 195 { .section_id = BDB_LFP_POWER, 196 .min_size = sizeof(struct bdb_lfp_power), }, 197 { .section_id = BDB_MIPI_CONFIG, 198 .min_size = sizeof(struct bdb_mipi_config), }, 199 { .section_id = BDB_MIPI_SEQUENCE, 200 .min_size = sizeof(struct bdb_mipi_sequence) }, 201 { .section_id = BDB_COMPRESSION_PARAMETERS, 202 .min_size = sizeof(struct bdb_compression_parameters), }, 203 { .section_id = BDB_GENERIC_DTD, 204 .min_size = sizeof(struct bdb_generic_dtd), }, 205}; 206 207static size_t lfp_data_min_size(struct intel_display *display) 208{ 209 const struct bdb_lfp_data_ptrs *ptrs; 210 size_t size; 211 212 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 213 if (!ptrs) 214 return 0; 215 216 size = sizeof(struct bdb_lfp_data); 217 if (ptrs->panel_name.table_size) 218 size = max(size, ptrs->panel_name.offset + 219 sizeof(struct bdb_lfp_data_tail)); 220 221 return size; 222} 223 224static bool validate_lfp_data_ptrs(const void *bdb, 225 const struct bdb_lfp_data_ptrs *ptrs) 226{ 227 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size; 228 int data_block_size, lfp_data_size; 229 const void *data_block; 230 int i; 231 232 data_block = find_raw_section(bdb, BDB_LFP_DATA); 233 if (!data_block) 234 return false; 235 236 data_block_size = get_blocksize(data_block); 237 if (data_block_size == 0) 238 return false; 239 240 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */ 241 if (ptrs->num_entries != 3) 242 return false; 243 244 fp_timing_size = ptrs->ptr[0].fp_timing.table_size; 245 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size; 246 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size; 247 panel_name_size = ptrs->panel_name.table_size; 248 249 /* fp_timing has variable size */ 250 if (fp_timing_size < 32 || 251 dvo_timing_size != sizeof(struct bdb_edid_dtd) || 252 panel_pnp_id_size != sizeof(struct bdb_edid_pnp_id)) 253 return false; 254 255 /* panel_name is not present in old VBTs */ 256 if (panel_name_size != 0 && 257 panel_name_size != sizeof(struct bdb_edid_product_name)) 258 return false; 259 260 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset; 261 if (16 * lfp_data_size > data_block_size) 262 return false; 263 264 /* make sure the table entries have uniform size */ 265 for (i = 1; i < 16; i++) { 266 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size || 267 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size || 268 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size) 269 return false; 270 271 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size || 272 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size || 273 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size) 274 return false; 275 } 276 277 /* 278 * Except for vlv/chv machines all real VBTs seem to have 6 279 * unaccounted bytes in the fp_timing table. And it doesn't 280 * appear to be a really intentional hole as the fp_timing 281 * 0xffff terminator is always within those 6 missing bytes. 282 */ 283 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size) 284 fp_timing_size += 6; 285 286 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size) 287 return false; 288 289 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset || 290 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset || 291 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size) 292 return false; 293 294 /* make sure the tables fit inside the data block */ 295 for (i = 0; i < 16; i++) { 296 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size || 297 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size || 298 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size) 299 return false; 300 } 301 302 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size) 303 return false; 304 305 /* make sure fp_timing terminators are present at expected locations */ 306 for (i = 0; i < 16; i++) { 307 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset + 308 fp_timing_size - 2; 309 310 if (*t != 0xffff) 311 return false; 312 } 313 314 return true; 315} 316 317/* make the data table offsets relative to the data block */ 318static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block) 319{ 320 struct bdb_lfp_data_ptrs *ptrs = ptrs_block; 321 u32 offset; 322 int i; 323 324 offset = raw_block_offset(bdb, BDB_LFP_DATA); 325 326 for (i = 0; i < 16; i++) { 327 if (ptrs->ptr[i].fp_timing.offset < offset || 328 ptrs->ptr[i].dvo_timing.offset < offset || 329 ptrs->ptr[i].panel_pnp_id.offset < offset) 330 return false; 331 332 ptrs->ptr[i].fp_timing.offset -= offset; 333 ptrs->ptr[i].dvo_timing.offset -= offset; 334 ptrs->ptr[i].panel_pnp_id.offset -= offset; 335 } 336 337 if (ptrs->panel_name.table_size) { 338 if (ptrs->panel_name.offset < offset) 339 return false; 340 341 ptrs->panel_name.offset -= offset; 342 } 343 344 return validate_lfp_data_ptrs(bdb, ptrs); 345} 346 347static int make_lfp_data_ptr(struct lfp_data_ptr_table *table, 348 int table_size, int total_size) 349{ 350 if (total_size < table_size) 351 return total_size; 352 353 table->table_size = table_size; 354 table->offset = total_size - table_size; 355 356 return total_size - table_size; 357} 358 359static void next_lfp_data_ptr(struct lfp_data_ptr_table *next, 360 const struct lfp_data_ptr_table *prev, 361 int size) 362{ 363 next->table_size = prev->table_size; 364 next->offset = prev->offset + size; 365} 366 367static void *generate_lfp_data_ptrs(struct intel_display *display, 368 const void *bdb) 369{ 370 int i, size, table_size, block_size, offset, fp_timing_size; 371 struct bdb_lfp_data_ptrs *ptrs; 372 const void *block; 373 void *ptrs_block; 374 375 /* 376 * The hardcoded fp_timing_size is only valid for 377 * modernish VBTs. All older VBTs definitely should 378 * include block 41 and thus we don't need to 379 * generate one. 380 */ 381 if (display->vbt.version < 155) 382 return NULL; 383 384 fp_timing_size = 38; 385 386 block = find_raw_section(bdb, BDB_LFP_DATA); 387 if (!block) 388 return NULL; 389 390 drm_dbg_kms(display->drm, "Generating LFP data table pointers\n"); 391 392 block_size = get_blocksize(block); 393 394 size = fp_timing_size + sizeof(struct bdb_edid_dtd) + 395 sizeof(struct bdb_edid_pnp_id); 396 if (size * 16 > block_size) 397 return NULL; 398 399 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL); 400 if (!ptrs_block) 401 return NULL; 402 403 *(u8 *)(ptrs_block + 0) = BDB_LFP_DATA_PTRS; 404 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs); 405 ptrs = ptrs_block + 3; 406 407 table_size = sizeof(struct bdb_edid_pnp_id); 408 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size); 409 410 table_size = sizeof(struct bdb_edid_dtd); 411 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size); 412 413 table_size = fp_timing_size; 414 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size); 415 416 if (ptrs->ptr[0].fp_timing.table_size) 417 ptrs->num_entries++; 418 if (ptrs->ptr[0].dvo_timing.table_size) 419 ptrs->num_entries++; 420 if (ptrs->ptr[0].panel_pnp_id.table_size) 421 ptrs->num_entries++; 422 423 if (size != 0 || ptrs->num_entries != 3) { 424 kfree(ptrs_block); 425 return NULL; 426 } 427 428 size = fp_timing_size + sizeof(struct bdb_edid_dtd) + 429 sizeof(struct bdb_edid_pnp_id); 430 for (i = 1; i < 16; i++) { 431 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size); 432 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size); 433 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size); 434 } 435 436 table_size = sizeof(struct bdb_edid_product_name); 437 438 if (16 * (size + table_size) <= block_size) { 439 ptrs->panel_name.table_size = table_size; 440 ptrs->panel_name.offset = size * 16; 441 } 442 443 offset = block - bdb; 444 445 for (i = 0; i < 16; i++) { 446 ptrs->ptr[i].fp_timing.offset += offset; 447 ptrs->ptr[i].dvo_timing.offset += offset; 448 ptrs->ptr[i].panel_pnp_id.offset += offset; 449 } 450 451 if (ptrs->panel_name.table_size) 452 ptrs->panel_name.offset += offset; 453 454 return ptrs_block; 455} 456 457static void 458init_bdb_block(struct intel_display *display, 459 const void *bdb, enum bdb_block_id section_id, 460 size_t min_size) 461{ 462 struct bdb_block_entry *entry; 463 void *temp_block = NULL; 464 const void *block; 465 size_t block_size; 466 467 block = find_raw_section(bdb, section_id); 468 469 /* Modern VBTs lack the LFP data table pointers block, make one up */ 470 if (!block && section_id == BDB_LFP_DATA_PTRS) { 471 temp_block = generate_lfp_data_ptrs(display, bdb); 472 if (temp_block) 473 block = temp_block + 3; 474 } 475 if (!block) 476 return; 477 478 drm_WARN(display->drm, min_size == 0, 479 "Block %d min_size is zero\n", section_id); 480 481 block_size = get_blocksize(block); 482 483 /* 484 * Version number and new block size are considered 485 * part of the header for MIPI sequenece block v3+. 486 */ 487 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3) 488 block_size += 5; 489 490 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3), 491 GFP_KERNEL); 492 if (!entry) { 493 kfree(temp_block); 494 return; 495 } 496 497 entry->section_id = section_id; 498 memcpy(entry->data, block - 3, block_size + 3); 499 500 kfree(temp_block); 501 502 drm_dbg_kms(display->drm, 503 "Found BDB block %d (size %zu, min size %zu)\n", 504 section_id, block_size, min_size); 505 506 if (section_id == BDB_LFP_DATA_PTRS && 507 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) { 508 drm_err(display->drm, 509 "VBT has malformed LFP data table pointers\n"); 510 kfree(entry); 511 return; 512 } 513 514 list_add_tail(&entry->node, &display->vbt.bdb_blocks); 515} 516 517static void init_bdb_blocks(struct intel_display *display, 518 const void *bdb) 519{ 520 int i; 521 522 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) { 523 enum bdb_block_id section_id = bdb_blocks[i].section_id; 524 size_t min_size = bdb_blocks[i].min_size; 525 526 if (section_id == BDB_LFP_DATA) 527 min_size = lfp_data_min_size(display); 528 529 init_bdb_block(display, bdb, section_id, min_size); 530 } 531} 532 533static void 534fill_detail_timing_data(struct intel_display *display, 535 struct drm_display_mode *panel_fixed_mode, 536 const struct bdb_edid_dtd *dvo_timing) 537{ 538 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 539 dvo_timing->hactive_lo; 540 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 541 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 542 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 543 ((dvo_timing->hsync_pulse_width_hi << 8) | 544 dvo_timing->hsync_pulse_width_lo); 545 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 546 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 547 548 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 549 dvo_timing->vactive_lo; 550 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 551 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 552 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 553 ((dvo_timing->vsync_pulse_width_hi << 4) | 554 dvo_timing->vsync_pulse_width_lo); 555 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 556 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 557 panel_fixed_mode->clock = dvo_timing->clock * 10; 558 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 559 560 if (dvo_timing->hsync_positive) 561 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 562 else 563 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 564 565 if (dvo_timing->vsync_positive) 566 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 567 else 568 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 569 570 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 571 dvo_timing->himage_lo; 572 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 573 dvo_timing->vimage_lo; 574 575 /* Some VBTs have bogus h/vsync_end values */ 576 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) { 577 drm_dbg_kms(display->drm, "reducing hsync_end %d->%d\n", 578 panel_fixed_mode->hsync_end, panel_fixed_mode->htotal); 579 panel_fixed_mode->hsync_end = panel_fixed_mode->htotal; 580 } 581 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) { 582 drm_dbg_kms(display->drm, "reducing vsync_end %d->%d\n", 583 panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal); 584 panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal; 585 } 586 587 drm_mode_set_name(panel_fixed_mode); 588} 589 590static const struct bdb_edid_dtd * 591get_lfp_dvo_timing(const struct bdb_lfp_data *data, 592 const struct bdb_lfp_data_ptrs *ptrs, 593 int index) 594{ 595 return (const void *)data + ptrs->ptr[index].dvo_timing.offset; 596} 597 598static const struct fp_timing * 599get_lfp_fp_timing(const struct bdb_lfp_data *data, 600 const struct bdb_lfp_data_ptrs *ptrs, 601 int index) 602{ 603 return (const void *)data + ptrs->ptr[index].fp_timing.offset; 604} 605 606static const struct drm_edid_product_id * 607get_lfp_pnp_id(const struct bdb_lfp_data *data, 608 const struct bdb_lfp_data_ptrs *ptrs, 609 int index) 610{ 611 /* These two are supposed to have the same layout in memory. */ 612 BUILD_BUG_ON(sizeof(struct bdb_edid_pnp_id) != sizeof(struct drm_edid_product_id)); 613 614 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset; 615} 616 617static const struct bdb_lfp_data_tail * 618get_lfp_data_tail(const struct bdb_lfp_data *data, 619 const struct bdb_lfp_data_ptrs *ptrs) 620{ 621 if (ptrs->panel_name.table_size) 622 return (const void *)data + ptrs->panel_name.offset; 623 else 624 return NULL; 625} 626 627static int opregion_get_panel_type(struct intel_display *display, 628 const struct intel_bios_encoder_data *devdata, 629 const struct drm_edid *drm_edid, bool use_fallback) 630{ 631 return intel_opregion_get_panel_type(display); 632} 633 634static int vbt_get_panel_type(struct intel_display *display, 635 const struct intel_bios_encoder_data *devdata, 636 const struct drm_edid *drm_edid, bool use_fallback) 637{ 638 const struct bdb_lfp_options *lfp_options; 639 640 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS); 641 if (!lfp_options) 642 return -1; 643 644 if (lfp_options->panel_type > 0xf && 645 lfp_options->panel_type != 0xff) { 646 drm_dbg_kms(display->drm, "Invalid VBT panel type 0x%x\n", 647 lfp_options->panel_type); 648 return -1; 649 } 650 651 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2) 652 return lfp_options->panel_type2; 653 654 drm_WARN_ON(display->drm, 655 devdata && devdata->child.handle != DEVICE_HANDLE_LFP1); 656 657 return lfp_options->panel_type; 658} 659 660static int pnpid_get_panel_type(struct intel_display *display, 661 const struct intel_bios_encoder_data *devdata, 662 const struct drm_edid *drm_edid, bool use_fallback) 663{ 664 const struct bdb_lfp_data *data; 665 const struct bdb_lfp_data_ptrs *ptrs; 666 struct drm_edid_product_id product_id, product_id_nodate; 667 struct drm_printer p; 668 int i, best = -1; 669 670 if (!drm_edid) 671 return -1; 672 673 drm_edid_get_product_id(drm_edid, &product_id); 674 675 product_id_nodate = product_id; 676 product_id_nodate.week_of_manufacture = 0; 677 product_id_nodate.year_of_manufacture = 0; 678 679 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "EDID"); 680 drm_edid_print_product_id(&p, &product_id, true); 681 682 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 683 if (!ptrs) 684 return -1; 685 686 data = bdb_find_section(display, BDB_LFP_DATA); 687 if (!data) 688 return -1; 689 690 for (i = 0; i < 16; i++) { 691 const struct drm_edid_product_id *vbt_id = 692 get_lfp_pnp_id(data, ptrs, i); 693 694 /* full match? */ 695 if (!memcmp(vbt_id, &product_id, sizeof(*vbt_id))) 696 return i; 697 698 /* 699 * Accept a match w/o date if no full match is found, 700 * and the VBT entry does not specify a date. 701 */ 702 if (best < 0 && 703 !memcmp(vbt_id, &product_id_nodate, sizeof(*vbt_id))) 704 best = i; 705 } 706 707 return best; 708} 709 710static int fallback_get_panel_type(struct intel_display *display, 711 const struct intel_bios_encoder_data *devdata, 712 const struct drm_edid *drm_edid, bool use_fallback) 713{ 714 return use_fallback ? 0 : -1; 715} 716 717enum panel_type { 718 PANEL_TYPE_OPREGION, 719 PANEL_TYPE_VBT, 720 PANEL_TYPE_PNPID, 721 PANEL_TYPE_FALLBACK, 722}; 723 724static int get_panel_type(struct intel_display *display, 725 const struct intel_bios_encoder_data *devdata, 726 const struct drm_edid *drm_edid, bool use_fallback) 727{ 728 struct { 729 const char *name; 730 int (*get_panel_type)(struct intel_display *display, 731 const struct intel_bios_encoder_data *devdata, 732 const struct drm_edid *drm_edid, bool use_fallback); 733 int panel_type; 734 } panel_types[] = { 735 [PANEL_TYPE_OPREGION] = { 736 .name = "OpRegion", 737 .get_panel_type = opregion_get_panel_type, 738 }, 739 [PANEL_TYPE_VBT] = { 740 .name = "VBT", 741 .get_panel_type = vbt_get_panel_type, 742 }, 743 [PANEL_TYPE_PNPID] = { 744 .name = "PNPID", 745 .get_panel_type = pnpid_get_panel_type, 746 }, 747 [PANEL_TYPE_FALLBACK] = { 748 .name = "fallback", 749 .get_panel_type = fallback_get_panel_type, 750 }, 751 }; 752 int i; 753 754 for (i = 0; i < ARRAY_SIZE(panel_types); i++) { 755 panel_types[i].panel_type = panel_types[i].get_panel_type(display, devdata, 756 drm_edid, use_fallback); 757 758 drm_WARN_ON(display->drm, panel_types[i].panel_type > 0xf && 759 panel_types[i].panel_type != 0xff); 760 761 if (panel_types[i].panel_type >= 0) 762 drm_dbg_kms(display->drm, "Panel type (%s): %d\n", 763 panel_types[i].name, panel_types[i].panel_type); 764 } 765 766 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0) 767 i = PANEL_TYPE_OPREGION; 768 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff && 769 panel_types[PANEL_TYPE_PNPID].panel_type >= 0) 770 i = PANEL_TYPE_PNPID; 771 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff && 772 panel_types[PANEL_TYPE_VBT].panel_type >= 0) 773 i = PANEL_TYPE_VBT; 774 else 775 i = PANEL_TYPE_FALLBACK; 776 777 drm_dbg_kms(display->drm, "Selected panel type (%s): %d\n", 778 panel_types[i].name, panel_types[i].panel_type); 779 780 return panel_types[i].panel_type; 781} 782 783static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits) 784{ 785 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1); 786} 787 788static bool panel_bool(unsigned int value, int panel_type) 789{ 790 return panel_bits(value, panel_type, 1); 791} 792 793/* Parse general panel options */ 794static void 795parse_panel_options(struct intel_display *display, 796 struct intel_panel *panel) 797{ 798 const struct bdb_lfp_options *lfp_options; 799 int panel_type = panel->vbt.panel_type; 800 int drrs_mode; 801 802 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS); 803 if (!lfp_options) 804 return; 805 806 panel->vbt.lvds_dither = lfp_options->pixel_dither; 807 808 /* 809 * Empirical evidence indicates the block size can be 810 * either 4,14,16,24+ bytes. For older VBTs no clear 811 * relationship between the block size vs. BDB version. 812 */ 813 if (get_blocksize(lfp_options) < 16) 814 return; 815 816 drrs_mode = panel_bits(lfp_options->dps_panel_type_bits, 817 panel_type, 2); 818 /* 819 * VBT has static DRRS = 0 and seamless DRRS = 2. 820 * The below piece of code is required to adjust vbt.drrs_type 821 * to match the enum drrs_support_type. 822 */ 823 switch (drrs_mode) { 824 case 0: 825 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 826 drm_dbg_kms(display->drm, "DRRS supported mode is static\n"); 827 break; 828 case 2: 829 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS; 830 drm_dbg_kms(display->drm, 831 "DRRS supported mode is seamless\n"); 832 break; 833 default: 834 panel->vbt.drrs_type = DRRS_TYPE_NONE; 835 drm_dbg_kms(display->drm, 836 "DRRS not supported (VBT input)\n"); 837 break; 838 } 839} 840 841static void 842parse_lfp_panel_dtd(struct intel_display *display, 843 struct intel_panel *panel, 844 const struct bdb_lfp_data *lfp_data, 845 const struct bdb_lfp_data_ptrs *lfp_data_ptrs) 846{ 847 const struct bdb_edid_dtd *panel_dvo_timing; 848 const struct fp_timing *fp_timing; 849 struct drm_display_mode *panel_fixed_mode; 850 int panel_type = panel->vbt.panel_type; 851 852 panel_dvo_timing = get_lfp_dvo_timing(lfp_data, 853 lfp_data_ptrs, 854 panel_type); 855 856 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 857 if (!panel_fixed_mode) 858 return; 859 860 fill_detail_timing_data(display, panel_fixed_mode, panel_dvo_timing); 861 862 panel->vbt.lfp_vbt_mode = panel_fixed_mode; 863 864 drm_dbg_kms(display->drm, 865 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n", 866 DRM_MODE_ARG(panel_fixed_mode)); 867 868 fp_timing = get_lfp_fp_timing(lfp_data, 869 lfp_data_ptrs, 870 panel_type); 871 872 /* check the resolution, just to be sure */ 873 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 874 fp_timing->y_res == panel_fixed_mode->vdisplay) { 875 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 876 drm_dbg_kms(display->drm, 877 "VBT initial LVDS value %x\n", 878 panel->vbt.bios_lvds_val); 879 } 880} 881 882static void 883parse_lfp_data(struct intel_display *display, 884 struct intel_panel *panel) 885{ 886 const struct bdb_lfp_data *data; 887 const struct bdb_lfp_data_tail *tail; 888 const struct bdb_lfp_data_ptrs *ptrs; 889 const struct drm_edid_product_id *pnp_id; 890 struct drm_printer p; 891 int panel_type = panel->vbt.panel_type; 892 893 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 894 if (!ptrs) 895 return; 896 897 data = bdb_find_section(display, BDB_LFP_DATA); 898 if (!data) 899 return; 900 901 if (!panel->vbt.lfp_vbt_mode) 902 parse_lfp_panel_dtd(display, panel, data, ptrs); 903 904 pnp_id = get_lfp_pnp_id(data, ptrs, panel_type); 905 906 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "Panel"); 907 drm_edid_print_product_id(&p, pnp_id, false); 908 909 tail = get_lfp_data_tail(data, ptrs); 910 if (!tail) 911 return; 912 913 drm_dbg_kms(display->drm, "Panel name: %.*s\n", 914 (int)sizeof(tail->panel_name[0].name), 915 tail->panel_name[panel_type].name); 916 917 if (display->vbt.version >= 188) { 918 panel->vbt.seamless_drrs_min_refresh_rate = 919 tail->seamless_drrs_min_refresh_rate[panel_type]; 920 drm_dbg_kms(display->drm, 921 "Seamless DRRS min refresh rate: %d Hz\n", 922 panel->vbt.seamless_drrs_min_refresh_rate); 923 } 924} 925 926static void 927parse_generic_dtd(struct intel_display *display, 928 struct intel_panel *panel) 929{ 930 const struct bdb_generic_dtd *generic_dtd; 931 const struct generic_dtd_entry *dtd; 932 struct drm_display_mode *panel_fixed_mode; 933 int num_dtd; 934 935 /* 936 * Older VBTs provided DTD information for internal displays through 937 * the "LFP panel tables" block (42). As of VBT revision 229 the 938 * DTD information should be provided via a newer "generic DTD" 939 * block (58). Just to be safe, we'll try the new generic DTD block 940 * first on VBT >= 229, but still fall back to trying the old LFP 941 * block if that fails. 942 */ 943 if (display->vbt.version < 229) 944 return; 945 946 generic_dtd = bdb_find_section(display, BDB_GENERIC_DTD); 947 if (!generic_dtd) 948 return; 949 950 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 951 drm_err(display->drm, "GDTD size %u is too small.\n", 952 generic_dtd->gdtd_size); 953 return; 954 } else if (generic_dtd->gdtd_size != 955 sizeof(struct generic_dtd_entry)) { 956 drm_err(display->drm, "Unexpected GDTD size %u\n", 957 generic_dtd->gdtd_size); 958 /* DTD has unknown fields, but keep going */ 959 } 960 961 num_dtd = (get_blocksize(generic_dtd) - 962 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 963 if (panel->vbt.panel_type >= num_dtd) { 964 drm_err(display->drm, 965 "Panel type %d not found in table of %d DTD's\n", 966 panel->vbt.panel_type, num_dtd); 967 return; 968 } 969 970 dtd = &generic_dtd->dtd[panel->vbt.panel_type]; 971 972 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 973 if (!panel_fixed_mode) 974 return; 975 976 panel_fixed_mode->hdisplay = dtd->hactive; 977 panel_fixed_mode->hsync_start = 978 panel_fixed_mode->hdisplay + dtd->hfront_porch; 979 panel_fixed_mode->hsync_end = 980 panel_fixed_mode->hsync_start + dtd->hsync; 981 panel_fixed_mode->htotal = 982 panel_fixed_mode->hdisplay + dtd->hblank; 983 984 panel_fixed_mode->vdisplay = dtd->vactive; 985 panel_fixed_mode->vsync_start = 986 panel_fixed_mode->vdisplay + dtd->vfront_porch; 987 panel_fixed_mode->vsync_end = 988 panel_fixed_mode->vsync_start + dtd->vsync; 989 panel_fixed_mode->vtotal = 990 panel_fixed_mode->vdisplay + dtd->vblank; 991 992 panel_fixed_mode->clock = dtd->pixel_clock; 993 panel_fixed_mode->width_mm = dtd->width_mm; 994 panel_fixed_mode->height_mm = dtd->height_mm; 995 996 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 997 drm_mode_set_name(panel_fixed_mode); 998 999 if (dtd->hsync_positive_polarity) 1000 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 1001 else 1002 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 1003 1004 if (dtd->vsync_positive_polarity) 1005 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 1006 else 1007 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 1008 1009 drm_dbg_kms(display->drm, 1010 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n", 1011 DRM_MODE_ARG(panel_fixed_mode)); 1012 1013 panel->vbt.lfp_vbt_mode = panel_fixed_mode; 1014} 1015 1016static void 1017parse_lfp_backlight(struct intel_display *display, 1018 struct intel_panel *panel) 1019{ 1020 const struct bdb_lfp_backlight *backlight_data; 1021 const struct lfp_backlight_data_entry *entry; 1022 int panel_type = panel->vbt.panel_type; 1023 u16 level; 1024 1025 backlight_data = bdb_find_section(display, BDB_LFP_BACKLIGHT); 1026 if (!backlight_data) 1027 return; 1028 1029 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 1030 drm_dbg_kms(display->drm, 1031 "Unsupported backlight data entry size %u\n", 1032 backlight_data->entry_size); 1033 return; 1034 } 1035 1036 entry = &backlight_data->data[panel_type]; 1037 1038 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 1039 if (!panel->vbt.backlight.present) { 1040 drm_dbg_kms(display->drm, 1041 "PWM backlight not present in VBT (type %u)\n", 1042 entry->type); 1043 return; 1044 } 1045 1046 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 1047 panel->vbt.backlight.controller = 0; 1048 if (display->vbt.version >= 191) { 1049 const struct lfp_backlight_control_method *method; 1050 1051 method = &backlight_data->backlight_control[panel_type]; 1052 panel->vbt.backlight.type = method->type; 1053 panel->vbt.backlight.controller = method->controller; 1054 } 1055 1056 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 1057 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm; 1058 1059 if (display->vbt.version >= 234) { 1060 u16 min_level; 1061 bool scale; 1062 1063 level = backlight_data->brightness_level[panel_type].level; 1064 min_level = backlight_data->brightness_min_level[panel_type].level; 1065 1066 if (display->vbt.version >= 236) 1067 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 1068 else 1069 scale = level > 255; 1070 1071 if (scale) 1072 min_level = min_level / 255; 1073 1074 if (min_level > 255) { 1075 drm_warn(display->drm, "Brightness min level > 255\n"); 1076 level = 255; 1077 } 1078 panel->vbt.backlight.min_brightness = min_level; 1079 1080 panel->vbt.backlight.brightness_precision_bits = 1081 backlight_data->brightness_precision_bits[panel_type]; 1082 } else { 1083 level = backlight_data->level[panel_type]; 1084 panel->vbt.backlight.min_brightness = entry->min_brightness; 1085 } 1086 1087 if (display->vbt.version >= 239) 1088 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 1089 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100); 1090 else 1091 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30; 1092 1093 drm_dbg_kms(display->drm, 1094 "VBT backlight PWM modulation frequency %u Hz, " 1095 "active %s, min brightness %u, level %u, controller %u\n", 1096 panel->vbt.backlight.pwm_freq_hz, 1097 panel->vbt.backlight.active_low_pwm ? "low" : "high", 1098 panel->vbt.backlight.min_brightness, 1099 level, 1100 panel->vbt.backlight.controller); 1101} 1102 1103static void 1104parse_sdvo_lvds_data(struct intel_display *display, 1105 struct intel_panel *panel) 1106{ 1107 const struct bdb_sdvo_lvds_dtd *dtd; 1108 struct drm_display_mode *panel_fixed_mode; 1109 int index; 1110 1111 index = display->params.vbt_sdvo_panel_type; 1112 if (index == -2) { 1113 drm_dbg_kms(display->drm, 1114 "Ignore SDVO LVDS mode from BIOS VBT tables.\n"); 1115 return; 1116 } 1117 1118 if (index == -1) { 1119 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 1120 1121 sdvo_lvds_options = bdb_find_section(display, BDB_SDVO_LVDS_OPTIONS); 1122 if (!sdvo_lvds_options) 1123 return; 1124 1125 index = sdvo_lvds_options->panel_type; 1126 } 1127 1128 dtd = bdb_find_section(display, BDB_SDVO_LVDS_DTD); 1129 if (!dtd) 1130 return; 1131 1132 /* 1133 * This should not happen, as long as the panel_type 1134 * enumeration doesn't grow over 4 items. But if it does, it 1135 * could lead to hard-to-detect bugs, so better double-check 1136 * it here to be sure. 1137 */ 1138 if (index >= ARRAY_SIZE(dtd->dtd)) { 1139 drm_err(display->drm, 1140 "index %d is larger than dtd->dtd[4] array\n", 1141 index); 1142 return; 1143 } 1144 1145 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 1146 if (!panel_fixed_mode) 1147 return; 1148 1149 fill_detail_timing_data(display, panel_fixed_mode, &dtd->dtd[index]); 1150 1151 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 1152 1153 drm_dbg_kms(display->drm, 1154 "Found SDVO LVDS mode in BIOS VBT tables: " DRM_MODE_FMT "\n", 1155 DRM_MODE_ARG(panel_fixed_mode)); 1156} 1157 1158static int intel_bios_ssc_frequency(struct intel_display *display, 1159 bool alternate) 1160{ 1161 switch (DISPLAY_VER(display)) { 1162 case 2: 1163 return alternate ? 66667 : 48000; 1164 case 3: 1165 case 4: 1166 return alternate ? 100000 : 96000; 1167 default: 1168 return alternate ? 100000 : 120000; 1169 } 1170} 1171 1172static void 1173parse_general_features(struct intel_display *display) 1174{ 1175 const struct bdb_general_features *general; 1176 1177 general = bdb_find_section(display, BDB_GENERAL_FEATURES); 1178 if (!general) 1179 return; 1180 1181 display->vbt.int_tv_support = general->int_tv_support; 1182 /* int_crt_support can't be trusted on earlier platforms */ 1183 if (display->vbt.version >= 155 && 1184 (HAS_DDI(display) || display->platform.valleyview)) 1185 display->vbt.int_crt_support = general->int_crt_support; 1186 display->vbt.lvds_use_ssc = general->enable_ssc; 1187 display->vbt.lvds_ssc_freq = 1188 intel_bios_ssc_frequency(display, general->ssc_freq); 1189 display->vbt.display_clock_mode = general->display_clock_mode; 1190 display->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 1191 if (display->vbt.version >= 181) { 1192 display->vbt.orientation = general->rotate_180 ? 1193 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 1194 DRM_MODE_PANEL_ORIENTATION_NORMAL; 1195 } else { 1196 display->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1197 } 1198 1199 if (display->vbt.version >= 249 && general->afc_startup_config) { 1200 display->vbt.override_afc_startup = true; 1201 display->vbt.override_afc_startup_val = general->afc_startup_config == 1 ? 0 : 7; 1202 } 1203 1204 drm_dbg_kms(display->drm, 1205 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 1206 display->vbt.int_tv_support, 1207 display->vbt.int_crt_support, 1208 display->vbt.lvds_use_ssc, 1209 display->vbt.lvds_ssc_freq, 1210 display->vbt.display_clock_mode, 1211 display->vbt.fdi_rx_polarity_inverted); 1212} 1213 1214static const struct child_device_config * 1215child_device_ptr(const struct bdb_general_definitions *defs, int i) 1216{ 1217 return (const void *) &defs->devices[i * defs->child_dev_size]; 1218} 1219 1220static void 1221parse_sdvo_device_mapping(struct intel_display *display) 1222{ 1223 const struct intel_bios_encoder_data *devdata; 1224 int count = 0; 1225 1226 /* 1227 * Only parse SDVO mappings on gens that could have SDVO. This isn't 1228 * accurate and doesn't have to be, as long as it's not too strict. 1229 */ 1230 if (!IS_DISPLAY_VER(display, 3, 7)) { 1231 drm_dbg_kms(display->drm, "Skipping SDVO device mapping\n"); 1232 return; 1233 } 1234 1235 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 1236 const struct child_device_config *child = &devdata->child; 1237 struct sdvo_device_mapping *mapping; 1238 1239 if (child->target_addr != TARGET_ADDR1 && 1240 child->target_addr != TARGET_ADDR2) { 1241 /* 1242 * If the target address is neither 0x70 nor 0x72, 1243 * it is not a SDVO device. Skip it. 1244 */ 1245 continue; 1246 } 1247 if (child->dvo_port != DEVICE_PORT_DVOB && 1248 child->dvo_port != DEVICE_PORT_DVOC) { 1249 /* skip the incorrect SDVO port */ 1250 drm_dbg_kms(display->drm, 1251 "Incorrect SDVO port. Skip it\n"); 1252 continue; 1253 } 1254 drm_dbg_kms(display->drm, 1255 "the SDVO device with target addr %2x is found on" 1256 " %s port\n", 1257 child->target_addr, 1258 (child->dvo_port == DEVICE_PORT_DVOB) ? 1259 "SDVOB" : "SDVOC"); 1260 mapping = &display->vbt.sdvo_mappings[child->dvo_port - 1]; 1261 if (!mapping->initialized) { 1262 mapping->dvo_port = child->dvo_port; 1263 mapping->target_addr = child->target_addr; 1264 mapping->dvo_wiring = child->dvo_wiring; 1265 mapping->ddc_pin = child->ddc_pin; 1266 mapping->i2c_pin = child->i2c_pin; 1267 mapping->initialized = 1; 1268 drm_dbg_kms(display->drm, 1269 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 1270 mapping->dvo_port, mapping->target_addr, 1271 mapping->dvo_wiring, mapping->ddc_pin, 1272 mapping->i2c_pin); 1273 } else { 1274 drm_dbg_kms(display->drm, 1275 "Maybe one SDVO port is shared by " 1276 "two SDVO device.\n"); 1277 } 1278 if (child->target2_addr) { 1279 /* Maybe this is a SDVO device with multiple inputs */ 1280 /* And the mapping info is not added */ 1281 drm_dbg_kms(display->drm, 1282 "there exists the target2_addr. Maybe this" 1283 " is a SDVO device with multiple inputs.\n"); 1284 } 1285 count++; 1286 } 1287 1288 if (!count) { 1289 /* No SDVO device info is found */ 1290 drm_dbg_kms(display->drm, 1291 "No SDVO device info is found in VBT\n"); 1292 } 1293} 1294 1295static void 1296parse_driver_features(struct intel_display *display) 1297{ 1298 const struct bdb_driver_features *driver; 1299 1300 driver = bdb_find_section(display, BDB_DRIVER_FEATURES); 1301 if (!driver) 1302 return; 1303 1304 if (DISPLAY_VER(display) >= 5) { 1305 /* 1306 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 1307 * to mean "eDP". The VBT spec doesn't agree with that 1308 * interpretation, but real world VBTs seem to. 1309 */ 1310 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 1311 display->vbt.int_lvds_support = 0; 1312 } else { 1313 /* 1314 * FIXME it's not clear which BDB version has the LVDS config 1315 * bits defined. Revision history in the VBT spec says: 1316 * "0.92 | Add two definitions for VBT value of LVDS Active 1317 * Config (00b and 11b values defined) | 06/13/2005" 1318 * but does not the specify the BDB version. 1319 * 1320 * So far version 134 (on i945gm) is the oldest VBT observed 1321 * in the wild with the bits correctly populated. Version 1322 * 108 (on i85x) does not have the bits correctly populated. 1323 */ 1324 if (display->vbt.version >= 134 && 1325 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 1326 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 1327 display->vbt.int_lvds_support = 0; 1328 } 1329} 1330 1331static void 1332parse_panel_driver_features(struct intel_display *display, 1333 struct intel_panel *panel) 1334{ 1335 const struct bdb_driver_features *driver; 1336 1337 driver = bdb_find_section(display, BDB_DRIVER_FEATURES); 1338 if (!driver) 1339 return; 1340 1341 if (display->vbt.version < 228) { 1342 drm_dbg_kms(display->drm, "DRRS State Enabled:%d\n", 1343 driver->drrs_enabled); 1344 /* 1345 * If DRRS is not supported, drrs_type has to be set to 0. 1346 * This is because, VBT is configured in such a way that 1347 * static DRRS is 0 and DRRS not supported is represented by 1348 * driver->drrs_enabled=false 1349 */ 1350 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1351 /* 1352 * FIXME Should DMRRS perhaps be treated as seamless 1353 * but without the automatic downclocking? 1354 */ 1355 if (driver->dmrrs_enabled) 1356 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1357 else 1358 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1359 } 1360 1361 panel->vbt.psr.enable = driver->psr_enabled; 1362 } 1363} 1364 1365static void 1366parse_power_conservation_features(struct intel_display *display, 1367 struct intel_panel *panel) 1368{ 1369 const struct bdb_lfp_power *power; 1370 u8 panel_type = panel->vbt.panel_type; 1371 1372 panel->vbt.vrr = true; /* matches Windows behaviour */ 1373 1374 if (display->vbt.version < 228) 1375 return; 1376 1377 power = bdb_find_section(display, BDB_LFP_POWER); 1378 if (!power) 1379 return; 1380 1381 panel->vbt.psr.enable = panel_bool(power->psr, panel_type); 1382 1383 /* 1384 * If DRRS is not supported, drrs_type has to be set to 0. 1385 * This is because, VBT is configured in such a way that 1386 * static DRRS is 0 and DRRS not supported is represented by 1387 * power->drrs & BIT(panel_type)=false 1388 */ 1389 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1390 /* 1391 * FIXME Should DMRRS perhaps be treated as seamless 1392 * but without the automatic downclocking? 1393 */ 1394 if (panel_bool(power->dmrrs, panel_type)) 1395 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1396 else 1397 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1398 } 1399 1400 if (display->vbt.version >= 232) 1401 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type); 1402 1403 if (display->vbt.version >= 233) 1404 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled, 1405 panel_type); 1406} 1407 1408static void vbt_edp_to_pps_delays(struct intel_pps_delays *pps, 1409 const struct edp_power_seq *edp_pps) 1410{ 1411 pps->power_up = edp_pps->t1_t3; 1412 pps->backlight_on = edp_pps->t8; 1413 pps->backlight_off = edp_pps->t9; 1414 pps->power_down = edp_pps->t10; 1415 pps->power_cycle = edp_pps->t11_t12; 1416} 1417 1418static void 1419parse_edp(struct intel_display *display, 1420 struct intel_panel *panel) 1421{ 1422 const struct bdb_edp *edp; 1423 const struct edp_fast_link_params *edp_link_params; 1424 int panel_type = panel->vbt.panel_type; 1425 1426 edp = bdb_find_section(display, BDB_EDP); 1427 if (!edp) 1428 return; 1429 1430 switch (panel_bits(edp->color_depth, panel_type, 2)) { 1431 case EDP_18BPP: 1432 panel->vbt.edp.bpp = 18; 1433 break; 1434 case EDP_24BPP: 1435 panel->vbt.edp.bpp = 24; 1436 break; 1437 case EDP_30BPP: 1438 panel->vbt.edp.bpp = 30; 1439 break; 1440 } 1441 1442 /* Get the eDP sequencing and link info */ 1443 edp_link_params = &edp->fast_link_params[panel_type]; 1444 1445 vbt_edp_to_pps_delays(&panel->vbt.edp.pps, 1446 &edp->power_seqs[panel_type]); 1447 1448 if (display->vbt.version >= 224) { 1449 panel->vbt.edp.rate = 1450 edp->edp_fast_link_training_rate[panel_type] * 20; 1451 } else { 1452 switch (edp_link_params->rate) { 1453 case EDP_RATE_1_62: 1454 panel->vbt.edp.rate = 162000; 1455 break; 1456 case EDP_RATE_2_7: 1457 panel->vbt.edp.rate = 270000; 1458 break; 1459 case EDP_RATE_5_4: 1460 panel->vbt.edp.rate = 540000; 1461 break; 1462 default: 1463 drm_dbg_kms(display->drm, 1464 "VBT has unknown eDP link rate value %u\n", 1465 edp_link_params->rate); 1466 break; 1467 } 1468 } 1469 1470 switch (edp_link_params->lanes) { 1471 case EDP_LANE_1: 1472 panel->vbt.edp.lanes = 1; 1473 break; 1474 case EDP_LANE_2: 1475 panel->vbt.edp.lanes = 2; 1476 break; 1477 case EDP_LANE_4: 1478 panel->vbt.edp.lanes = 4; 1479 break; 1480 default: 1481 drm_dbg_kms(display->drm, 1482 "VBT has unknown eDP lane count value %u\n", 1483 edp_link_params->lanes); 1484 break; 1485 } 1486 1487 switch (edp_link_params->preemphasis) { 1488 case EDP_PREEMPHASIS_NONE: 1489 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 1490 break; 1491 case EDP_PREEMPHASIS_3_5dB: 1492 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 1493 break; 1494 case EDP_PREEMPHASIS_6dB: 1495 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 1496 break; 1497 case EDP_PREEMPHASIS_9_5dB: 1498 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 1499 break; 1500 default: 1501 drm_dbg_kms(display->drm, 1502 "VBT has unknown eDP pre-emphasis value %u\n", 1503 edp_link_params->preemphasis); 1504 break; 1505 } 1506 1507 switch (edp_link_params->vswing) { 1508 case EDP_VSWING_0_4V: 1509 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 1510 break; 1511 case EDP_VSWING_0_6V: 1512 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 1513 break; 1514 case EDP_VSWING_0_8V: 1515 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 1516 break; 1517 case EDP_VSWING_1_2V: 1518 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 1519 break; 1520 default: 1521 drm_dbg_kms(display->drm, 1522 "VBT has unknown eDP voltage swing value %u\n", 1523 edp_link_params->vswing); 1524 break; 1525 } 1526 1527 if (display->vbt.version >= 173) { 1528 u8 vswing; 1529 1530 /* Don't read from VBT if module parameter has valid value*/ 1531 if (display->params.edp_vswing) { 1532 panel->vbt.edp.low_vswing = 1533 display->params.edp_vswing == 1; 1534 } else { 1535 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 1536 panel->vbt.edp.low_vswing = vswing == 0; 1537 } 1538 } 1539 1540 panel->vbt.edp.drrs_msa_timing_delay = 1541 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2); 1542 1543 if (display->vbt.version >= 244) 1544 panel->vbt.edp.max_link_rate = 1545 edp->edp_max_port_link_rate[panel_type] * 20; 1546 1547 if (display->vbt.version >= 251) 1548 panel->vbt.edp.dsc_disable = 1549 panel_bool(edp->edp_dsc_disable, panel_type); 1550} 1551 1552static void 1553parse_psr(struct intel_display *display, 1554 struct intel_panel *panel) 1555{ 1556 const struct bdb_psr *psr; 1557 const struct psr_table *psr_table; 1558 int panel_type = panel->vbt.panel_type; 1559 1560 psr = bdb_find_section(display, BDB_PSR); 1561 if (!psr) { 1562 drm_dbg_kms(display->drm, "No PSR BDB found.\n"); 1563 return; 1564 } 1565 1566 psr_table = &psr->psr_table[panel_type]; 1567 1568 panel->vbt.psr.full_link = psr_table->full_link; 1569 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 1570 panel->vbt.psr.idle_frames = psr_table->idle_frames; 1571 1572 /* 1573 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 1574 * Old decimal value is wake up time in multiples of 100 us. 1575 */ 1576 if (display->vbt.version >= 205 && 1577 (DISPLAY_VER(display) >= 9 && !display->platform.broxton)) { 1578 switch (psr_table->tp1_wakeup_time) { 1579 case 0: 1580 panel->vbt.psr.tp1_wakeup_time_us = 500; 1581 break; 1582 case 1: 1583 panel->vbt.psr.tp1_wakeup_time_us = 100; 1584 break; 1585 case 3: 1586 panel->vbt.psr.tp1_wakeup_time_us = 0; 1587 break; 1588 default: 1589 drm_dbg_kms(display->drm, 1590 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1591 psr_table->tp1_wakeup_time); 1592 fallthrough; 1593 case 2: 1594 panel->vbt.psr.tp1_wakeup_time_us = 2500; 1595 break; 1596 } 1597 1598 switch (psr_table->tp2_tp3_wakeup_time) { 1599 case 0: 1600 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500; 1601 break; 1602 case 1: 1603 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100; 1604 break; 1605 case 3: 1606 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0; 1607 break; 1608 default: 1609 drm_dbg_kms(display->drm, 1610 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1611 psr_table->tp2_tp3_wakeup_time); 1612 fallthrough; 1613 case 2: 1614 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 1615 break; 1616 } 1617 } else { 1618 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 1619 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 1620 } 1621 1622 if (display->vbt.version >= 226) { 1623 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 1624 1625 wakeup_time = panel_bits(wakeup_time, panel_type, 2); 1626 switch (wakeup_time) { 1627 case 0: 1628 wakeup_time = 500; 1629 break; 1630 case 1: 1631 wakeup_time = 100; 1632 break; 1633 case 3: 1634 wakeup_time = 50; 1635 break; 1636 default: 1637 case 2: 1638 wakeup_time = 2500; 1639 break; 1640 } 1641 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 1642 } else { 1643 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1644 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us; 1645 } 1646} 1647 1648static void parse_dsi_backlight_ports(struct intel_display *display, 1649 struct intel_panel *panel, 1650 enum port port) 1651{ 1652 enum port port_bc = DISPLAY_VER(display) >= 11 ? PORT_B : PORT_C; 1653 1654 if (!panel->vbt.dsi.config->dual_link || display->vbt.version < 197) { 1655 panel->vbt.dsi.bl_ports = BIT(port); 1656 if (panel->vbt.dsi.config->cabc_supported) 1657 panel->vbt.dsi.cabc_ports = BIT(port); 1658 1659 return; 1660 } 1661 1662 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) { 1663 case DL_DCS_PORT_A: 1664 panel->vbt.dsi.bl_ports = BIT(PORT_A); 1665 break; 1666 case DL_DCS_PORT_C: 1667 panel->vbt.dsi.bl_ports = BIT(port_bc); 1668 break; 1669 default: 1670 case DL_DCS_PORT_A_AND_C: 1671 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc); 1672 break; 1673 } 1674 1675 if (!panel->vbt.dsi.config->cabc_supported) 1676 return; 1677 1678 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) { 1679 case DL_DCS_PORT_A: 1680 panel->vbt.dsi.cabc_ports = BIT(PORT_A); 1681 break; 1682 case DL_DCS_PORT_C: 1683 panel->vbt.dsi.cabc_ports = BIT(port_bc); 1684 break; 1685 default: 1686 case DL_DCS_PORT_A_AND_C: 1687 panel->vbt.dsi.cabc_ports = 1688 BIT(PORT_A) | BIT(port_bc); 1689 break; 1690 } 1691} 1692 1693static void 1694parse_mipi_config(struct intel_display *display, 1695 struct intel_panel *panel) 1696{ 1697 const struct bdb_mipi_config *start; 1698 const struct mipi_config *config; 1699 const struct mipi_pps_data *pps; 1700 int panel_type = panel->vbt.panel_type; 1701 enum port port; 1702 1703 /* parse MIPI blocks only if LFP type is MIPI */ 1704 if (!intel_bios_is_dsi_present(display, &port)) 1705 return; 1706 1707 /* Initialize this to undefined indicating no generic MIPI support */ 1708 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1709 1710 start = bdb_find_section(display, BDB_MIPI_CONFIG); 1711 if (!start) { 1712 drm_dbg_kms(display->drm, "No MIPI config BDB found"); 1713 return; 1714 } 1715 1716 drm_dbg_kms(display->drm, "Found MIPI Config block, panel index = %d\n", 1717 panel_type); 1718 1719 /* 1720 * get hold of the correct configuration block and pps data as per 1721 * the panel_type as index 1722 */ 1723 config = &start->config[panel_type]; 1724 pps = &start->pps[panel_type]; 1725 1726 /* store as of now full data. Trim when we realise all is not needed */ 1727 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1728 if (!panel->vbt.dsi.config) 1729 return; 1730 1731 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1732 if (!panel->vbt.dsi.pps) { 1733 kfree(panel->vbt.dsi.config); 1734 return; 1735 } 1736 1737 parse_dsi_backlight_ports(display, panel, port); 1738 1739 /* FIXME is the 90 vs. 270 correct? */ 1740 switch (config->rotation) { 1741 case ENABLE_ROTATION_0: 1742 /* 1743 * Most (all?) VBTs claim 0 degrees despite having 1744 * an upside down panel, thus we do not trust this. 1745 */ 1746 panel->vbt.dsi.orientation = 1747 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1748 break; 1749 case ENABLE_ROTATION_90: 1750 panel->vbt.dsi.orientation = 1751 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1752 break; 1753 case ENABLE_ROTATION_180: 1754 panel->vbt.dsi.orientation = 1755 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1756 break; 1757 case ENABLE_ROTATION_270: 1758 panel->vbt.dsi.orientation = 1759 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1760 break; 1761 } 1762 1763 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1764 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1765} 1766 1767/* Find the sequence block and size for the given panel. */ 1768static const u8 * 1769find_panel_sequence_block(struct intel_display *display, 1770 const struct bdb_mipi_sequence *sequence, 1771 u16 panel_id, u32 *seq_size) 1772{ 1773 u32 total = get_blocksize(sequence); 1774 const u8 *data = &sequence->data[0]; 1775 u8 current_id; 1776 u32 current_size; 1777 int header_size = sequence->version >= 3 ? 5 : 3; 1778 int index = 0; 1779 int i; 1780 1781 /* skip new block size */ 1782 if (sequence->version >= 3) 1783 data += 4; 1784 1785 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1786 if (index + header_size > total) { 1787 drm_err(display->drm, 1788 "Invalid sequence block (header)\n"); 1789 return NULL; 1790 } 1791 1792 current_id = *(data + index); 1793 if (sequence->version >= 3) 1794 current_size = *((const u32 *)(data + index + 1)); 1795 else 1796 current_size = *((const u16 *)(data + index + 1)); 1797 1798 index += header_size; 1799 1800 if (index + current_size > total) { 1801 drm_err(display->drm, "Invalid sequence block\n"); 1802 return NULL; 1803 } 1804 1805 if (current_id == panel_id) { 1806 *seq_size = current_size; 1807 return data + index; 1808 } 1809 1810 index += current_size; 1811 } 1812 1813 drm_err(display->drm, 1814 "Sequence block detected but no valid configuration\n"); 1815 1816 return NULL; 1817} 1818 1819static int goto_next_sequence(struct intel_display *display, 1820 const u8 *data, int index, int total) 1821{ 1822 u16 len; 1823 1824 /* Skip Sequence Byte. */ 1825 for (index = index + 1; index < total; index += len) { 1826 u8 operation_byte = *(data + index); 1827 index++; 1828 1829 switch (operation_byte) { 1830 case MIPI_SEQ_ELEM_END: 1831 return index; 1832 case MIPI_SEQ_ELEM_SEND_PKT: 1833 if (index + 4 > total) 1834 return 0; 1835 1836 len = *((const u16 *)(data + index + 2)) + 4; 1837 break; 1838 case MIPI_SEQ_ELEM_DELAY: 1839 len = 4; 1840 break; 1841 case MIPI_SEQ_ELEM_GPIO: 1842 len = 2; 1843 break; 1844 case MIPI_SEQ_ELEM_I2C: 1845 if (index + 7 > total) 1846 return 0; 1847 len = *(data + index + 6) + 7; 1848 break; 1849 default: 1850 drm_err(display->drm, "Unknown operation byte\n"); 1851 return 0; 1852 } 1853 } 1854 1855 return 0; 1856} 1857 1858static int goto_next_sequence_v3(struct intel_display *display, 1859 const u8 *data, int index, int total) 1860{ 1861 int seq_end; 1862 u16 len; 1863 u32 size_of_sequence; 1864 1865 /* 1866 * Could skip sequence based on Size of Sequence alone, but also do some 1867 * checking on the structure. 1868 */ 1869 if (total < 5) { 1870 drm_err(display->drm, "Too small sequence size\n"); 1871 return 0; 1872 } 1873 1874 /* Skip Sequence Byte. */ 1875 index++; 1876 1877 /* 1878 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1879 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1880 * byte. 1881 */ 1882 size_of_sequence = *((const u32 *)(data + index)); 1883 index += 4; 1884 1885 seq_end = index + size_of_sequence; 1886 if (seq_end > total) { 1887 drm_err(display->drm, "Invalid sequence size\n"); 1888 return 0; 1889 } 1890 1891 for (; index < total; index += len) { 1892 u8 operation_byte = *(data + index); 1893 index++; 1894 1895 if (operation_byte == MIPI_SEQ_ELEM_END) { 1896 if (index != seq_end) { 1897 drm_err(display->drm, 1898 "Invalid element structure\n"); 1899 return 0; 1900 } 1901 return index; 1902 } 1903 1904 len = *(data + index); 1905 index++; 1906 1907 /* 1908 * FIXME: Would be nice to check elements like for v1/v2 in 1909 * goto_next_sequence() above. 1910 */ 1911 switch (operation_byte) { 1912 case MIPI_SEQ_ELEM_SEND_PKT: 1913 case MIPI_SEQ_ELEM_DELAY: 1914 case MIPI_SEQ_ELEM_GPIO: 1915 case MIPI_SEQ_ELEM_I2C: 1916 case MIPI_SEQ_ELEM_SPI: 1917 case MIPI_SEQ_ELEM_PMIC: 1918 break; 1919 default: 1920 drm_err(display->drm, "Unknown operation byte %u\n", 1921 operation_byte); 1922 break; 1923 } 1924 } 1925 1926 return 0; 1927} 1928 1929/* 1930 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1931 * skip all delay + gpio operands and stop at the first DSI packet op. 1932 */ 1933static int get_init_otp_deassert_fragment_len(struct intel_display *display, 1934 struct intel_panel *panel) 1935{ 1936 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1937 int index, len; 1938 1939 if (drm_WARN_ON(display->drm, 1940 !data || panel->vbt.dsi.seq_version >= 3)) 1941 return 0; 1942 1943 /* index = 1 to skip sequence byte */ 1944 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1945 switch (data[index]) { 1946 case MIPI_SEQ_ELEM_SEND_PKT: 1947 return index == 1 ? 0 : index; 1948 case MIPI_SEQ_ELEM_DELAY: 1949 len = 5; /* 1 byte for operand + uint32 */ 1950 break; 1951 case MIPI_SEQ_ELEM_GPIO: 1952 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1953 break; 1954 default: 1955 return 0; 1956 } 1957 } 1958 1959 return 0; 1960} 1961 1962/* 1963 * Some v1/v2 VBT MIPI sequences do the deassert in the init OTP sequence. 1964 * The deassert must be done before calling intel_dsi_device_ready, so for 1965 * these devices we split the init OTP sequence into a deassert sequence and 1966 * the actual init OTP part. 1967 */ 1968static void vlv_fixup_mipi_sequences(struct intel_display *display, 1969 struct intel_panel *panel) 1970{ 1971 u8 *init_otp; 1972 int len; 1973 1974 /* Limit this to v1/v2 vid-mode sequences */ 1975 if (panel->vbt.dsi.config->is_cmd_mode || 1976 panel->vbt.dsi.seq_version >= 3) 1977 return; 1978 1979 /* Only do this if there are otp and assert seqs and no deassert seq */ 1980 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1981 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1982 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1983 return; 1984 1985 /* The deassert-sequence ends at the first DSI packet */ 1986 len = get_init_otp_deassert_fragment_len(display, panel); 1987 if (!len) 1988 return; 1989 1990 drm_dbg_kms(display->drm, 1991 "Using init OTP fragment to deassert reset\n"); 1992 1993 /* Copy the fragment, update seq byte and terminate it */ 1994 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1995 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1996 if (!panel->vbt.dsi.deassert_seq) 1997 return; 1998 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1999 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 2000 /* Use the copy for deassert */ 2001 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 2002 panel->vbt.dsi.deassert_seq; 2003 /* Replace the last byte of the fragment with init OTP seq byte */ 2004 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 2005 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 2006 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 2007} 2008 2009/* 2010 * Some machines (eg. Lenovo 82TQ) appear to have broken 2011 * VBT sequences: 2012 * - INIT_OTP is not present at all 2013 * - what should be in INIT_OTP is in DISPLAY_ON 2014 * - what should be in DISPLAY_ON is in BACKLIGHT_ON 2015 * (along with the actual backlight stuff) 2016 * 2017 * To make those work we simply swap DISPLAY_ON and INIT_OTP. 2018 * 2019 * TODO: Do we need to limit this to specific machines, 2020 * or examine the contents of the sequences to 2021 * avoid false positives? 2022 */ 2023static void icl_fixup_mipi_sequences(struct intel_display *display, 2024 struct intel_panel *panel) 2025{ 2026 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] && 2027 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) { 2028 drm_dbg_kms(display->drm, 2029 "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n"); 2030 2031 swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP], 2032 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]); 2033 } 2034} 2035 2036static void fixup_mipi_sequences(struct intel_display *display, 2037 struct intel_panel *panel) 2038{ 2039 if (DISPLAY_VER(display) >= 11) 2040 icl_fixup_mipi_sequences(display, panel); 2041 else if (display->platform.valleyview) 2042 vlv_fixup_mipi_sequences(display, panel); 2043} 2044 2045static void 2046parse_mipi_sequence(struct intel_display *display, 2047 struct intel_panel *panel) 2048{ 2049 int panel_type = panel->vbt.panel_type; 2050 const struct bdb_mipi_sequence *sequence; 2051 const u8 *seq_data; 2052 u32 seq_size; 2053 u8 *data; 2054 int index = 0; 2055 2056 /* Only our generic panel driver uses the sequence block. */ 2057 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 2058 return; 2059 2060 sequence = bdb_find_section(display, BDB_MIPI_SEQUENCE); 2061 if (!sequence) { 2062 drm_dbg_kms(display->drm, 2063 "No MIPI Sequence found, parsing complete\n"); 2064 return; 2065 } 2066 2067 /* Fail gracefully for forward incompatible sequence block. */ 2068 if (sequence->version >= 4) { 2069 drm_err(display->drm, 2070 "Unable to parse MIPI Sequence Block v%u\n", 2071 sequence->version); 2072 return; 2073 } 2074 2075 drm_dbg_kms(display->drm, "Found MIPI sequence block v%u\n", 2076 sequence->version); 2077 2078 seq_data = find_panel_sequence_block(display, sequence, panel_type, &seq_size); 2079 if (!seq_data) 2080 return; 2081 2082 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 2083 if (!data) 2084 return; 2085 2086 /* Parse the sequences, store pointers to each sequence. */ 2087 for (;;) { 2088 u8 seq_id = *(data + index); 2089 if (seq_id == MIPI_SEQ_END) 2090 break; 2091 2092 if (seq_id >= MIPI_SEQ_MAX) { 2093 drm_err(display->drm, "Unknown sequence %u\n", 2094 seq_id); 2095 goto err; 2096 } 2097 2098 /* Log about presence of sequences we won't run. */ 2099 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 2100 drm_dbg_kms(display->drm, 2101 "Unsupported sequence %u\n", seq_id); 2102 2103 panel->vbt.dsi.sequence[seq_id] = data + index; 2104 2105 if (sequence->version >= 3) 2106 index = goto_next_sequence_v3(display, data, index, seq_size); 2107 else 2108 index = goto_next_sequence(display, data, index, seq_size); 2109 if (!index) { 2110 drm_err(display->drm, "Invalid sequence %u\n", 2111 seq_id); 2112 goto err; 2113 } 2114 } 2115 2116 panel->vbt.dsi.data = data; 2117 panel->vbt.dsi.size = seq_size; 2118 panel->vbt.dsi.seq_version = sequence->version; 2119 2120 fixup_mipi_sequences(display, panel); 2121 2122 drm_dbg_kms(display->drm, "MIPI related VBT parsing complete\n"); 2123 return; 2124 2125err: 2126 kfree(data); 2127 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence)); 2128} 2129 2130static void 2131parse_compression_parameters(struct intel_display *display) 2132{ 2133 const struct bdb_compression_parameters *params; 2134 struct intel_bios_encoder_data *devdata; 2135 u16 block_size; 2136 int index; 2137 2138 if (display->vbt.version < 198) 2139 return; 2140 2141 params = bdb_find_section(display, BDB_COMPRESSION_PARAMETERS); 2142 if (params) { 2143 /* Sanity checks */ 2144 if (params->entry_size != sizeof(params->data[0])) { 2145 drm_dbg_kms(display->drm, 2146 "VBT: unsupported compression param entry size\n"); 2147 return; 2148 } 2149 2150 block_size = get_blocksize(params); 2151 if (block_size < sizeof(*params)) { 2152 drm_dbg_kms(display->drm, 2153 "VBT: expected 16 compression param entries\n"); 2154 return; 2155 } 2156 } 2157 2158 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 2159 const struct child_device_config *child = &devdata->child; 2160 2161 if (!child->compression_enable) 2162 continue; 2163 2164 if (!params) { 2165 drm_dbg_kms(display->drm, 2166 "VBT: compression params not available\n"); 2167 continue; 2168 } 2169 2170 if (child->compression_method_cps) { 2171 drm_dbg_kms(display->drm, 2172 "VBT: CPS compression not supported\n"); 2173 continue; 2174 } 2175 2176 index = child->compression_structure_index; 2177 2178 devdata->dsc = kmemdup(¶ms->data[index], 2179 sizeof(*devdata->dsc), GFP_KERNEL); 2180 } 2181} 2182 2183static u8 translate_iboost(struct intel_display *display, u8 val) 2184{ 2185 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 2186 2187 if (val >= ARRAY_SIZE(mapping)) { 2188 drm_dbg_kms(display->drm, 2189 "Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 2190 return 0; 2191 } 2192 return mapping[val]; 2193} 2194 2195static const u8 cnp_ddc_pin_map[] = { 2196 [0] = 0, /* N/A */ 2197 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B, 2198 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C, 2199 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */ 2200 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */ 2201}; 2202 2203static const u8 icp_ddc_pin_map[] = { 2204 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2205 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2206 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C, 2207 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1, 2208 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2, 2209 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3, 2210 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4, 2211 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5, 2212 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6, 2213}; 2214 2215static const u8 rkl_pch_tgp_ddc_pin_map[] = { 2216 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2217 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2218 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D, 2219 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E, 2220}; 2221 2222static const u8 adls_ddc_pin_map[] = { 2223 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2224 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1, 2225 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2, 2226 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3, 2227 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4, 2228}; 2229 2230static const u8 gen9bc_tgp_ddc_pin_map[] = { 2231 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B, 2232 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C, 2233 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D, 2234}; 2235 2236static const u8 adlp_ddc_pin_map[] = { 2237 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2238 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2239 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1, 2240 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2, 2241 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3, 2242 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4, 2243}; 2244 2245static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin) 2246{ 2247 const u8 *ddc_pin_map; 2248 int i, n_entries; 2249 2250 if (INTEL_PCH_TYPE(display) >= PCH_MTL || display->platform.alderlake_p) { 2251 ddc_pin_map = adlp_ddc_pin_map; 2252 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 2253 } else if (display->platform.alderlake_s) { 2254 ddc_pin_map = adls_ddc_pin_map; 2255 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 2256 } else if (INTEL_PCH_TYPE(display) >= PCH_DG1) { 2257 return vbt_pin; 2258 } else if (display->platform.rocketlake && INTEL_PCH_TYPE(display) == PCH_TGP) { 2259 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 2260 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 2261 } else if (HAS_PCH_TGP(display) && DISPLAY_VER(display) == 9) { 2262 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 2263 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 2264 } else if (INTEL_PCH_TYPE(display) >= PCH_ICP) { 2265 ddc_pin_map = icp_ddc_pin_map; 2266 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 2267 } else if (HAS_PCH_CNP(display)) { 2268 ddc_pin_map = cnp_ddc_pin_map; 2269 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 2270 } else { 2271 /* Assuming direct map */ 2272 return vbt_pin; 2273 } 2274 2275 for (i = 0; i < n_entries; i++) { 2276 if (ddc_pin_map[i] == vbt_pin) 2277 return i; 2278 } 2279 2280 drm_dbg_kms(display->drm, 2281 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 2282 vbt_pin); 2283 return 0; 2284} 2285 2286static u8 dvo_port_type(u8 dvo_port) 2287{ 2288 switch (dvo_port) { 2289 case DVO_PORT_HDMIA: 2290 case DVO_PORT_HDMIB: 2291 case DVO_PORT_HDMIC: 2292 case DVO_PORT_HDMID: 2293 case DVO_PORT_HDMIE: 2294 case DVO_PORT_HDMIF: 2295 case DVO_PORT_HDMIG: 2296 case DVO_PORT_HDMIH: 2297 case DVO_PORT_HDMII: 2298 return DVO_PORT_HDMIA; 2299 case DVO_PORT_DPA: 2300 case DVO_PORT_DPB: 2301 case DVO_PORT_DPC: 2302 case DVO_PORT_DPD: 2303 case DVO_PORT_DPE: 2304 case DVO_PORT_DPF: 2305 case DVO_PORT_DPG: 2306 case DVO_PORT_DPH: 2307 case DVO_PORT_DPI: 2308 return DVO_PORT_DPA; 2309 case DVO_PORT_MIPIA: 2310 case DVO_PORT_MIPIB: 2311 case DVO_PORT_MIPIC: 2312 case DVO_PORT_MIPID: 2313 return DVO_PORT_MIPIA; 2314 default: 2315 return dvo_port; 2316 } 2317} 2318 2319static enum port __dvo_port_to_port(int n_ports, int n_dvo, 2320 const int port_mapping[][3], u8 dvo_port) 2321{ 2322 enum port port; 2323 int i; 2324 2325 for (port = PORT_A; port < n_ports; port++) { 2326 for (i = 0; i < n_dvo; i++) { 2327 if (port_mapping[port][i] == -1) 2328 break; 2329 2330 if (dvo_port == port_mapping[port][i]) 2331 return port; 2332 } 2333 } 2334 2335 return PORT_NONE; 2336} 2337 2338static enum port dvo_port_to_port(struct intel_display *display, 2339 u8 dvo_port) 2340{ 2341 /* 2342 * Each DDI port can have more than one value on the "DVO Port" field, 2343 * so look for all the possible values for each port. 2344 */ 2345 static const int port_mapping[][3] = { 2346 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2347 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2348 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2349 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2350 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 2351 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2352 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2353 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2354 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2355 }; 2356 /* 2357 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 2358 * map to DDI A,B,TC1,TC2 respectively. 2359 */ 2360 static const int rkl_port_mapping[][3] = { 2361 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2362 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2363 [PORT_C] = { -1 }, 2364 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2365 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2366 }; 2367 /* 2368 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 2369 * PORT_F and PORT_G, we need to map that to correct VBT sections. 2370 */ 2371 static const int adls_port_mapping[][3] = { 2372 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2373 [PORT_B] = { -1 }, 2374 [PORT_C] = { -1 }, 2375 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2376 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2377 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2378 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2379 }; 2380 static const int xelpd_port_mapping[][3] = { 2381 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2382 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2383 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2384 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2385 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2386 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2387 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2388 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2389 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2390 }; 2391 2392 if (DISPLAY_VER(display) >= 13) 2393 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 2394 ARRAY_SIZE(xelpd_port_mapping[0]), 2395 xelpd_port_mapping, 2396 dvo_port); 2397 else if (display->platform.alderlake_s) 2398 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 2399 ARRAY_SIZE(adls_port_mapping[0]), 2400 adls_port_mapping, 2401 dvo_port); 2402 else if (display->platform.dg1 || display->platform.rocketlake) 2403 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 2404 ARRAY_SIZE(rkl_port_mapping[0]), 2405 rkl_port_mapping, 2406 dvo_port); 2407 else 2408 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 2409 ARRAY_SIZE(port_mapping[0]), 2410 port_mapping, 2411 dvo_port); 2412} 2413 2414static enum port 2415dsi_dvo_port_to_port(struct intel_display *display, u8 dvo_port) 2416{ 2417 switch (dvo_port) { 2418 case DVO_PORT_MIPIA: 2419 return PORT_A; 2420 case DVO_PORT_MIPIC: 2421 if (DISPLAY_VER(display) >= 11) 2422 return PORT_B; 2423 else 2424 return PORT_C; 2425 default: 2426 return PORT_NONE; 2427 } 2428} 2429 2430enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata) 2431{ 2432 struct intel_display *display = devdata->display; 2433 const struct child_device_config *child = &devdata->child; 2434 enum port port; 2435 2436 port = dvo_port_to_port(display, child->dvo_port); 2437 if (port == PORT_NONE && DISPLAY_VER(display) >= 11) 2438 port = dsi_dvo_port_to_port(display, child->dvo_port); 2439 2440 return port; 2441} 2442 2443static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 2444{ 2445 switch (vbt_max_link_rate) { 2446 default: 2447 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 2448 return 0; 2449 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 2450 return 2000000; 2451 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 2452 return 1350000; 2453 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 2454 return 1000000; 2455 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 2456 return 810000; 2457 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 2458 return 540000; 2459 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 2460 return 270000; 2461 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 2462 return 162000; 2463 } 2464} 2465 2466static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 2467{ 2468 switch (vbt_max_link_rate) { 2469 default: 2470 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 2471 return 810000; 2472 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 2473 return 540000; 2474 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 2475 return 270000; 2476 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 2477 return 162000; 2478 } 2479} 2480 2481static u32 edp_rate_override_mask(int rate) 2482{ 2483 switch (rate) { 2484 case 2000000: return BDB_263_VBT_EDP_LINK_RATE_20; 2485 case 1350000: return BDB_263_VBT_EDP_LINK_RATE_13_5; 2486 case 1000000: return BDB_263_VBT_EDP_LINK_RATE_10; 2487 case 810000: return BDB_263_VBT_EDP_LINK_RATE_8_1; 2488 case 675000: return BDB_263_VBT_EDP_LINK_RATE_6_75; 2489 case 540000: return BDB_263_VBT_EDP_LINK_RATE_5_4; 2490 case 432000: return BDB_263_VBT_EDP_LINK_RATE_4_32; 2491 case 324000: return BDB_263_VBT_EDP_LINK_RATE_3_24; 2492 case 270000: return BDB_263_VBT_EDP_LINK_RATE_2_7; 2493 case 243000: return BDB_263_VBT_EDP_LINK_RATE_2_43; 2494 case 216000: return BDB_263_VBT_EDP_LINK_RATE_2_16; 2495 case 162000: return BDB_263_VBT_EDP_LINK_RATE_1_62; 2496 default: return 0; 2497 } 2498} 2499 2500int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 2501{ 2502 if (!devdata || devdata->display->vbt.version < 216) 2503 return 0; 2504 2505 if (devdata->display->vbt.version >= 230) 2506 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 2507 else 2508 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 2509} 2510 2511int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata) 2512{ 2513 if (!devdata || devdata->display->vbt.version < 244) 2514 return 0; 2515 2516 return devdata->child.dp_max_lane_count + 1; 2517} 2518 2519bool 2520intel_bios_encoder_reject_edp_rate(const struct intel_bios_encoder_data *devdata, 2521 int rate) 2522{ 2523 if (!devdata || devdata->display->vbt.version < 263) 2524 return false; 2525 2526 if (devdata->child.edp_data_rate_override == BDB_263_VBT_EDP_RATES_MASK) 2527 return false; 2528 2529 return devdata->child.edp_data_rate_override & edp_rate_override_mask(rate); 2530} 2531 2532static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 2533 enum port port) 2534{ 2535 struct intel_display *display = devdata->display; 2536 bool is_hdmi; 2537 2538 if (port != PORT_A || DISPLAY_VER(display) >= 12) 2539 return; 2540 2541 if (!intel_bios_encoder_supports_dvi(devdata)) 2542 return; 2543 2544 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2545 2546 drm_dbg_kms(display->drm, "VBT claims port A supports DVI%s, ignoring\n", 2547 is_hdmi ? "/HDMI" : ""); 2548 2549 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2550 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2551} 2552 2553static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata, 2554 enum port port) 2555{ 2556 struct intel_display *display = devdata->display; 2557 2558 if (!intel_bios_encoder_supports_dvi(devdata)) 2559 return; 2560 2561 /* 2562 * Some BDW machines (eg. HP Pavilion 15-ab) shipped 2563 * with a HSW VBT where the level shifter value goes 2564 * up to 11, whereas the BDW max is 9. 2565 */ 2566 if (display->platform.broadwell && devdata->child.hdmi_level_shifter_value > 9) { 2567 drm_dbg_kms(display->drm, 2568 "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n", 2569 port_name(port), devdata->child.hdmi_level_shifter_value, 9); 2570 2571 devdata->child.hdmi_level_shifter_value = 9; 2572 } 2573} 2574 2575static bool 2576intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 2577{ 2578 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 2579} 2580 2581bool 2582intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 2583{ 2584 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 2585} 2586 2587bool 2588intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 2589{ 2590 return intel_bios_encoder_supports_dvi(devdata) && 2591 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 2592} 2593 2594bool 2595intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 2596{ 2597 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2598} 2599 2600bool 2601intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 2602{ 2603 return intel_bios_encoder_supports_dp(devdata) && 2604 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 2605} 2606 2607bool 2608intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata) 2609{ 2610 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT; 2611} 2612 2613bool 2614intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata) 2615{ 2616 return devdata && HAS_LSPCON(devdata->display) && devdata->child.lspcon; 2617} 2618 2619/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 2620int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 2621{ 2622 if (!devdata || devdata->display->vbt.version < 158 || 2623 DISPLAY_VER(devdata->display) >= 14) 2624 return -1; 2625 2626 return devdata->child.hdmi_level_shifter_value; 2627} 2628 2629int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 2630{ 2631 if (!devdata || devdata->display->vbt.version < 204) 2632 return 0; 2633 2634 switch (devdata->child.hdmi_max_data_rate) { 2635 default: 2636 MISSING_CASE(devdata->child.hdmi_max_data_rate); 2637 fallthrough; 2638 case HDMI_MAX_DATA_RATE_PLATFORM: 2639 return 0; 2640 case HDMI_MAX_DATA_RATE_594: 2641 return 594000; 2642 case HDMI_MAX_DATA_RATE_340: 2643 return 340000; 2644 case HDMI_MAX_DATA_RATE_300: 2645 return 300000; 2646 case HDMI_MAX_DATA_RATE_297: 2647 return 297000; 2648 case HDMI_MAX_DATA_RATE_165: 2649 return 165000; 2650 } 2651} 2652 2653static bool is_port_valid(struct intel_display *display, enum port port) 2654{ 2655 /* 2656 * On some ICL SKUs port F is not present, but broken VBTs mark 2657 * the port as present. Only try to initialize port F for the 2658 * SKUs that may actually have it. 2659 */ 2660 if (port == PORT_F && display->platform.icelake) 2661 return display->platform.icelake_port_f; 2662 2663 return true; 2664} 2665 2666static void print_ddi_port(const struct intel_bios_encoder_data *devdata) 2667{ 2668 struct intel_display *display = devdata->display; 2669 const struct child_device_config *child = &devdata->child; 2670 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt; 2671 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 2672 enum port port; 2673 2674 port = intel_bios_encoder_port(devdata); 2675 if (port == PORT_NONE) 2676 return; 2677 2678 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2679 is_dp = intel_bios_encoder_supports_dp(devdata); 2680 is_crt = intel_bios_encoder_supports_crt(devdata); 2681 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2682 is_edp = intel_bios_encoder_supports_edp(devdata); 2683 is_dsi = intel_bios_encoder_supports_dsi(devdata); 2684 2685 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2686 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2687 2688 drm_dbg_kms(display->drm, 2689 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2690 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi, 2691 intel_bios_encoder_supports_dp_dual_mode(devdata), 2692 intel_bios_encoder_is_lspcon(devdata), 2693 supports_typec_usb, supports_tbt, 2694 devdata->dsc != NULL); 2695 2696 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata); 2697 if (hdmi_level_shift >= 0) { 2698 drm_dbg_kms(display->drm, 2699 "Port %c VBT HDMI level shift: %d\n", 2700 port_name(port), hdmi_level_shift); 2701 } 2702 2703 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata); 2704 if (max_tmds_clock) 2705 drm_dbg_kms(display->drm, 2706 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2707 port_name(port), max_tmds_clock); 2708 2709 /* I_boost config for SKL and above */ 2710 dp_boost_level = intel_bios_dp_boost_level(devdata); 2711 if (dp_boost_level) 2712 drm_dbg_kms(display->drm, 2713 "Port %c VBT (e)DP boost level: %d\n", 2714 port_name(port), dp_boost_level); 2715 2716 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata); 2717 if (hdmi_boost_level) 2718 drm_dbg_kms(display->drm, 2719 "Port %c VBT HDMI boost level: %d\n", 2720 port_name(port), hdmi_boost_level); 2721 2722 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata); 2723 if (dp_max_link_rate) 2724 drm_dbg_kms(display->drm, 2725 "Port %c VBT DP max link rate: %d\n", 2726 port_name(port), dp_max_link_rate); 2727 2728 /* 2729 * FIXME need to implement support for VBT 2730 * vswing/preemph tables should this ever trigger. 2731 */ 2732 drm_WARN(display->drm, child->use_vbt_vswing, 2733 "Port %c asks to use VBT vswing/preemph tables\n", 2734 port_name(port)); 2735} 2736 2737static void parse_ddi_port(struct intel_bios_encoder_data *devdata) 2738{ 2739 struct intel_display *display = devdata->display; 2740 enum port port; 2741 2742 port = intel_bios_encoder_port(devdata); 2743 if (port == PORT_NONE) 2744 return; 2745 2746 if (!is_port_valid(display, port)) { 2747 drm_dbg_kms(display->drm, 2748 "VBT reports port %c as supported, but that can't be true: skipping\n", 2749 port_name(port)); 2750 return; 2751 } 2752 2753 sanitize_device_type(devdata, port); 2754 sanitize_hdmi_level_shift(devdata, port); 2755} 2756 2757static bool has_ddi_port_info(struct intel_display *display) 2758{ 2759 return DISPLAY_VER(display) >= 5 || display->platform.g4x; 2760} 2761 2762static void parse_ddi_ports(struct intel_display *display) 2763{ 2764 struct intel_bios_encoder_data *devdata; 2765 2766 if (!has_ddi_port_info(display)) 2767 return; 2768 2769 list_for_each_entry(devdata, &display->vbt.display_devices, node) 2770 parse_ddi_port(devdata); 2771 2772 list_for_each_entry(devdata, &display->vbt.display_devices, node) 2773 print_ddi_port(devdata); 2774} 2775 2776static int child_device_expected_size(u16 version) 2777{ 2778 BUILD_BUG_ON(sizeof(struct child_device_config) < 40); 2779 2780 if (version > 263) 2781 return -ENOENT; 2782 else if (version >= 263) 2783 return 44; 2784 else if (version >= 256) 2785 return 40; 2786 else if (version >= 216) 2787 return 39; 2788 else if (version >= 196) 2789 return 38; 2790 else if (version >= 195) 2791 return 37; 2792 else if (version >= 111) 2793 return LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2794 else if (version >= 106) 2795 return 27; 2796 else 2797 return 22; 2798} 2799 2800static bool child_device_size_valid(struct intel_display *display, int size) 2801{ 2802 int expected_size; 2803 2804 expected_size = child_device_expected_size(display->vbt.version); 2805 if (expected_size < 0) { 2806 expected_size = sizeof(struct child_device_config); 2807 drm_dbg_kms(display->drm, 2808 "Expected child device config size for VBT version %u not known; assuming %d\n", 2809 display->vbt.version, expected_size); 2810 } 2811 2812 /* Flag an error for unexpected size, but continue anyway. */ 2813 if (size != expected_size) 2814 drm_err(display->drm, 2815 "Unexpected child device config size %d (expected %d for VBT version %u)\n", 2816 size, expected_size, display->vbt.version); 2817 2818 /* The legacy sized child device config is the minimum we need. */ 2819 if (size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2820 drm_dbg_kms(display->drm, 2821 "Child device config size %d is too small.\n", 2822 size); 2823 return false; 2824 } 2825 2826 return true; 2827} 2828 2829static void 2830parse_general_definitions(struct intel_display *display) 2831{ 2832 const struct bdb_general_definitions *defs; 2833 struct intel_bios_encoder_data *devdata; 2834 const struct child_device_config *child; 2835 int i, child_device_num; 2836 u16 block_size; 2837 int bus_pin; 2838 2839 defs = bdb_find_section(display, BDB_GENERAL_DEFINITIONS); 2840 if (!defs) { 2841 drm_dbg_kms(display->drm, 2842 "No general definition block is found, no devices defined.\n"); 2843 return; 2844 } 2845 2846 block_size = get_blocksize(defs); 2847 if (block_size < sizeof(*defs)) { 2848 drm_dbg_kms(display->drm, 2849 "General definitions block too small (%u)\n", 2850 block_size); 2851 return; 2852 } 2853 2854 bus_pin = defs->crt_ddc_gmbus_pin; 2855 drm_dbg_kms(display->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2856 if (intel_gmbus_is_valid_pin(display, bus_pin)) 2857 display->vbt.crt_ddc_pin = bus_pin; 2858 2859 if (!child_device_size_valid(display, defs->child_dev_size)) 2860 return; 2861 2862 /* get the number of child device */ 2863 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2864 2865 for (i = 0; i < child_device_num; i++) { 2866 child = child_device_ptr(defs, i); 2867 if (!child->device_type) 2868 continue; 2869 2870 drm_dbg_kms(display->drm, 2871 "Found VBT child device with type 0x%x\n", 2872 child->device_type); 2873 2874 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2875 if (!devdata) 2876 break; 2877 2878 devdata->display = display; 2879 2880 /* 2881 * Copy as much as we know (sizeof) and is available 2882 * (child_dev_size) of the child device config. Accessing the 2883 * data must depend on VBT version. 2884 */ 2885 memcpy(&devdata->child, child, 2886 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2887 2888 list_add_tail(&devdata->node, &display->vbt.display_devices); 2889 } 2890 2891 if (list_empty(&display->vbt.display_devices)) 2892 drm_dbg_kms(display->drm, 2893 "no child dev is parsed from VBT\n"); 2894} 2895 2896/* Common defaults which may be overridden by VBT. */ 2897static void 2898init_vbt_defaults(struct intel_display *display) 2899{ 2900 display->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2901 2902 /* general features */ 2903 display->vbt.int_tv_support = 1; 2904 display->vbt.int_crt_support = 1; 2905 2906 /* driver features */ 2907 display->vbt.int_lvds_support = 1; 2908 2909 /* Default to using SSC */ 2910 display->vbt.lvds_use_ssc = 1; 2911 /* 2912 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2913 * clock for LVDS. 2914 */ 2915 display->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(display, 2916 !HAS_PCH_SPLIT(display)); 2917 drm_dbg_kms(display->drm, "Set default to SSC at %d kHz\n", 2918 display->vbt.lvds_ssc_freq); 2919} 2920 2921/* Common defaults which may be overridden by VBT. */ 2922static void 2923init_vbt_panel_defaults(struct intel_panel *panel) 2924{ 2925 /* Default to having backlight */ 2926 panel->vbt.backlight.present = true; 2927 2928 /* LFP panel data */ 2929 panel->vbt.lvds_dither = true; 2930} 2931 2932/* Defaults to initialize only if there is no VBT. */ 2933static void 2934init_vbt_missing_defaults(struct intel_display *display) 2935{ 2936 unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask; 2937 enum port port; 2938 2939 if (!HAS_DDI(display) && !display->platform.cherryview) 2940 return; 2941 2942 for_each_port_masked(port, ports) { 2943 struct intel_bios_encoder_data *devdata; 2944 struct child_device_config *child; 2945 enum phy phy = intel_port_to_phy(display, port); 2946 2947 /* 2948 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2949 * to detect it. 2950 */ 2951 if (intel_phy_is_tc(display, phy)) 2952 continue; 2953 2954 /* Create fake child device config */ 2955 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2956 if (!devdata) 2957 break; 2958 2959 devdata->display = display; 2960 child = &devdata->child; 2961 2962 if (port == PORT_F) 2963 child->dvo_port = DVO_PORT_HDMIF; 2964 else if (port == PORT_E) 2965 child->dvo_port = DVO_PORT_HDMIE; 2966 else 2967 child->dvo_port = DVO_PORT_HDMIA + port; 2968 2969 if (port != PORT_A && port != PORT_E) 2970 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2971 2972 if (port != PORT_E) 2973 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2974 2975 if (port == PORT_A) 2976 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2977 2978 list_add_tail(&devdata->node, &display->vbt.display_devices); 2979 2980 drm_dbg_kms(display->drm, 2981 "Generating default VBT child device with type 0x%04x on port %c\n", 2982 child->device_type, port_name(port)); 2983 } 2984 2985 /* Bypass some minimum baseline VBT version checks */ 2986 display->vbt.version = 155; 2987} 2988 2989static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2990{ 2991 const void *_vbt = vbt; 2992 2993 return _vbt + vbt->bdb_offset; 2994} 2995 2996static const char vbt_signature[] = "$VBT"; 2997static const int vbt_signature_len = 4; 2998 2999/** 3000 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 3001 * @display: display device 3002 * @buf: pointer to a buffer to validate 3003 * @size: size of the buffer 3004 * 3005 * Returns true on valid VBT. 3006 */ 3007bool intel_bios_is_valid_vbt(struct intel_display *display, 3008 const void *buf, size_t size) 3009{ 3010 const struct vbt_header *vbt = buf; 3011 const struct bdb_header *bdb; 3012 3013 if (!vbt) 3014 return false; 3015 3016 if (sizeof(struct vbt_header) > size) { 3017 drm_dbg_kms(display->drm, "VBT header incomplete\n"); 3018 return false; 3019 } 3020 3021 if (memcmp(vbt->signature, vbt_signature, vbt_signature_len)) { 3022 drm_dbg_kms(display->drm, "VBT invalid signature\n"); 3023 return false; 3024 } 3025 3026 if (vbt->vbt_size > size) { 3027 drm_dbg_kms(display->drm, 3028 "VBT incomplete (vbt_size overflows)\n"); 3029 return false; 3030 } 3031 3032 size = vbt->vbt_size; 3033 3034 if (range_overflows_t(size_t, 3035 vbt->bdb_offset, 3036 sizeof(struct bdb_header), 3037 size)) { 3038 drm_dbg_kms(display->drm, "BDB header incomplete\n"); 3039 return false; 3040 } 3041 3042 bdb = get_bdb_header(vbt); 3043 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 3044 drm_dbg_kms(display->drm, "BDB incomplete\n"); 3045 return false; 3046 } 3047 3048 return vbt; 3049} 3050 3051static struct vbt_header *firmware_get_vbt(struct intel_display *display, 3052 size_t *size) 3053{ 3054 struct vbt_header *vbt = NULL; 3055 const struct firmware *fw = NULL; 3056 const char *name = display->params.vbt_firmware; 3057 int ret; 3058 3059 if (!name || !*name) 3060 return NULL; 3061 3062 ret = request_firmware(&fw, name, display->drm->dev); 3063 if (ret) { 3064 drm_err(display->drm, 3065 "Requesting VBT firmware \"%s\" failed (%d)\n", 3066 name, ret); 3067 return NULL; 3068 } 3069 3070 if (intel_bios_is_valid_vbt(display, fw->data, fw->size)) { 3071 vbt = kmemdup(fw->data, fw->size, GFP_KERNEL); 3072 if (vbt) { 3073 drm_dbg_kms(display->drm, 3074 "Found valid VBT firmware \"%s\"\n", name); 3075 if (size) 3076 *size = fw->size; 3077 } 3078 } else { 3079 drm_dbg_kms(display->drm, "Invalid VBT firmware \"%s\"\n", 3080 name); 3081 } 3082 3083 release_firmware(fw); 3084 3085 return vbt; 3086} 3087 3088static struct vbt_header *oprom_get_vbt(struct intel_display *display, 3089 struct intel_rom *rom, 3090 size_t *size, const char *type) 3091{ 3092 struct vbt_header *vbt; 3093 size_t vbt_size; 3094 loff_t offset; 3095 3096 if (!rom) 3097 return NULL; 3098 3099 BUILD_BUG_ON(vbt_signature_len != sizeof(vbt_signature) - 1); 3100 BUILD_BUG_ON(vbt_signature_len != sizeof(u32)); 3101 3102 offset = intel_rom_find(rom, *(const u32 *)vbt_signature); 3103 if (offset < 0) 3104 goto err_free_rom; 3105 3106 if (sizeof(struct vbt_header) > intel_rom_size(rom) - offset) { 3107 drm_dbg_kms(display->drm, "VBT header incomplete\n"); 3108 goto err_free_rom; 3109 } 3110 3111 BUILD_BUG_ON(sizeof(vbt->vbt_size) != sizeof(u16)); 3112 3113 vbt_size = intel_rom_read16(rom, offset + offsetof(struct vbt_header, vbt_size)); 3114 if (vbt_size > intel_rom_size(rom) - offset) { 3115 drm_dbg_kms(display->drm, "VBT incomplete (vbt_size overflows)\n"); 3116 goto err_free_rom; 3117 } 3118 3119 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 3120 if (!vbt) 3121 goto err_free_rom; 3122 3123 intel_rom_read_block(rom, vbt, offset, vbt_size); 3124 3125 if (!intel_bios_is_valid_vbt(display, vbt, vbt_size)) 3126 goto err_free_vbt; 3127 3128 drm_dbg_kms(display->drm, "Found valid VBT in %s\n", type); 3129 3130 if (size) 3131 *size = vbt_size; 3132 3133 intel_rom_free(rom); 3134 3135 return vbt; 3136 3137err_free_vbt: 3138 kfree(vbt); 3139err_free_rom: 3140 intel_rom_free(rom); 3141 return NULL; 3142} 3143 3144static const struct vbt_header *intel_bios_get_vbt(struct intel_display *display, 3145 size_t *sizep) 3146{ 3147 const struct vbt_header *vbt = NULL; 3148 3149 vbt = firmware_get_vbt(display, sizep); 3150 3151 if (!vbt) 3152 vbt = intel_opregion_get_vbt(display, sizep); 3153 3154 /* 3155 * If the OpRegion does not have VBT, look in SPI flash 3156 * through MMIO or PCI mapping 3157 */ 3158 if (!vbt && display->platform.dgfx) 3159 with_intel_display_rpm(display) 3160 vbt = oprom_get_vbt(display, intel_rom_spi(display->drm), sizep, "SPI flash"); 3161 3162 if (!vbt) 3163 with_intel_display_rpm(display) 3164 vbt = oprom_get_vbt(display, intel_rom_pci(display->drm), sizep, "PCI ROM"); 3165 3166 return vbt; 3167} 3168 3169/** 3170 * intel_bios_init - find VBT and initialize settings from the BIOS 3171 * @display: display device instance 3172 * 3173 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 3174 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 3175 * initialize some defaults if the VBT is not present at all. 3176 */ 3177void intel_bios_init(struct intel_display *display) 3178{ 3179 const struct vbt_header *vbt; 3180 const struct bdb_header *bdb; 3181 3182 INIT_LIST_HEAD(&display->vbt.display_devices); 3183 INIT_LIST_HEAD(&display->vbt.bdb_blocks); 3184 3185 if (!HAS_DISPLAY(display)) { 3186 drm_dbg_kms(display->drm, 3187 "Skipping VBT init due to disabled display.\n"); 3188 return; 3189 } 3190 3191 init_vbt_defaults(display); 3192 3193 vbt = intel_bios_get_vbt(display, NULL); 3194 3195 if (!vbt) 3196 goto out; 3197 3198 bdb = get_bdb_header(vbt); 3199 display->vbt.version = bdb->version; 3200 3201 drm_dbg_kms(display->drm, 3202 "VBT signature \"%.*s\", BDB version %d\n", 3203 (int)sizeof(vbt->signature), vbt->signature, 3204 display->vbt.version); 3205 3206 init_bdb_blocks(display, bdb); 3207 3208 /* Grab useful general definitions */ 3209 parse_general_features(display); 3210 parse_general_definitions(display); 3211 parse_driver_features(display); 3212 3213 /* Depends on child device list */ 3214 parse_compression_parameters(display); 3215 3216out: 3217 if (!vbt) { 3218 drm_info(display->drm, 3219 "Failed to find VBIOS tables (VBT)\n"); 3220 init_vbt_missing_defaults(display); 3221 } 3222 3223 /* Further processing on pre-parsed or generated child device data */ 3224 parse_sdvo_device_mapping(display); 3225 parse_ddi_ports(display); 3226 3227 kfree(vbt); 3228} 3229 3230static void intel_bios_init_panel(struct intel_display *display, 3231 struct intel_panel *panel, 3232 const struct intel_bios_encoder_data *devdata, 3233 const struct drm_edid *drm_edid, 3234 bool use_fallback) 3235{ 3236 /* already have it? */ 3237 if (panel->vbt.panel_type >= 0) { 3238 drm_WARN_ON(display->drm, !use_fallback); 3239 return; 3240 } 3241 3242 panel->vbt.panel_type = get_panel_type(display, devdata, 3243 drm_edid, use_fallback); 3244 if (panel->vbt.panel_type < 0) { 3245 drm_WARN_ON(display->drm, use_fallback); 3246 return; 3247 } 3248 3249 init_vbt_panel_defaults(panel); 3250 3251 parse_panel_options(display, panel); 3252 parse_generic_dtd(display, panel); 3253 parse_lfp_data(display, panel); 3254 parse_lfp_backlight(display, panel); 3255 parse_sdvo_lvds_data(display, panel); 3256 parse_panel_driver_features(display, panel); 3257 parse_power_conservation_features(display, panel); 3258 parse_edp(display, panel); 3259 parse_psr(display, panel); 3260 parse_mipi_config(display, panel); 3261 parse_mipi_sequence(display, panel); 3262} 3263 3264void intel_bios_init_panel_early(struct intel_display *display, 3265 struct intel_panel *panel, 3266 const struct intel_bios_encoder_data *devdata) 3267{ 3268 intel_bios_init_panel(display, panel, devdata, NULL, false); 3269} 3270 3271void intel_bios_init_panel_late(struct intel_display *display, 3272 struct intel_panel *panel, 3273 const struct intel_bios_encoder_data *devdata, 3274 const struct drm_edid *drm_edid) 3275{ 3276 intel_bios_init_panel(display, panel, devdata, drm_edid, true); 3277} 3278 3279/** 3280 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 3281 * @display: display device instance 3282 */ 3283void intel_bios_driver_remove(struct intel_display *display) 3284{ 3285 struct intel_bios_encoder_data *devdata, *nd; 3286 struct bdb_block_entry *entry, *ne; 3287 3288 list_for_each_entry_safe(devdata, nd, &display->vbt.display_devices, 3289 node) { 3290 list_del(&devdata->node); 3291 kfree(devdata->dsc); 3292 kfree(devdata); 3293 } 3294 3295 list_for_each_entry_safe(entry, ne, &display->vbt.bdb_blocks, node) { 3296 list_del(&entry->node); 3297 kfree(entry); 3298 } 3299} 3300 3301void intel_bios_fini_panel(struct intel_panel *panel) 3302{ 3303 kfree(panel->vbt.sdvo_lvds_vbt_mode); 3304 panel->vbt.sdvo_lvds_vbt_mode = NULL; 3305 kfree(panel->vbt.lfp_vbt_mode); 3306 panel->vbt.lfp_vbt_mode = NULL; 3307 kfree(panel->vbt.dsi.data); 3308 panel->vbt.dsi.data = NULL; 3309 kfree(panel->vbt.dsi.pps); 3310 panel->vbt.dsi.pps = NULL; 3311 kfree(panel->vbt.dsi.config); 3312 panel->vbt.dsi.config = NULL; 3313 kfree(panel->vbt.dsi.deassert_seq); 3314 panel->vbt.dsi.deassert_seq = NULL; 3315} 3316 3317/** 3318 * intel_bios_is_tv_present - is integrated TV present in VBT 3319 * @display: display device instance 3320 * 3321 * Return true if TV is present. If no child devices were parsed from VBT, 3322 * assume TV is present. 3323 */ 3324bool intel_bios_is_tv_present(struct intel_display *display) 3325{ 3326 const struct intel_bios_encoder_data *devdata; 3327 3328 if (!display->vbt.int_tv_support) 3329 return false; 3330 3331 if (list_empty(&display->vbt.display_devices)) 3332 return true; 3333 3334 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3335 const struct child_device_config *child = &devdata->child; 3336 3337 /* 3338 * If the device type is not TV, continue. 3339 */ 3340 switch (child->device_type) { 3341 case DEVICE_TYPE_INT_TV: 3342 case DEVICE_TYPE_TV: 3343 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 3344 break; 3345 default: 3346 continue; 3347 } 3348 /* Only when the addin_offset is non-zero, it is regarded 3349 * as present. 3350 */ 3351 if (child->addin_offset) 3352 return true; 3353 } 3354 3355 return false; 3356} 3357 3358/** 3359 * intel_bios_is_lvds_present - is LVDS present in VBT 3360 * @display: display device instance 3361 * @i2c_pin: i2c pin for LVDS if present 3362 * 3363 * Return true if LVDS is present. If no child devices were parsed from VBT, 3364 * assume LVDS is present. 3365 */ 3366bool intel_bios_is_lvds_present(struct intel_display *display, u8 *i2c_pin) 3367{ 3368 const struct intel_bios_encoder_data *devdata; 3369 3370 if (list_empty(&display->vbt.display_devices)) 3371 return true; 3372 3373 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3374 const struct child_device_config *child = &devdata->child; 3375 3376 /* If the device type is not LFP, continue. 3377 * We have to check both the new identifiers as well as the 3378 * old for compatibility with some BIOSes. 3379 */ 3380 if (child->device_type != DEVICE_TYPE_INT_LFP && 3381 child->device_type != DEVICE_TYPE_LFP) 3382 continue; 3383 3384 if (intel_gmbus_is_valid_pin(display, child->i2c_pin)) 3385 *i2c_pin = child->i2c_pin; 3386 3387 /* However, we cannot trust the BIOS writers to populate 3388 * the VBT correctly. Since LVDS requires additional 3389 * information from AIM blocks, a non-zero addin offset is 3390 * a good indicator that the LVDS is actually present. 3391 */ 3392 if (child->addin_offset) 3393 return true; 3394 3395 /* But even then some BIOS writers perform some black magic 3396 * and instantiate the device without reference to any 3397 * additional data. Trust that if the VBT was written into 3398 * the OpRegion then they have validated the LVDS's existence. 3399 */ 3400 return intel_opregion_vbt_present(display); 3401 } 3402 3403 return false; 3404} 3405 3406/** 3407 * intel_bios_is_port_present - is the specified digital port present 3408 * @display: display device instance 3409 * @port: port to check 3410 * 3411 * Return true if the device in %port is present. 3412 */ 3413bool intel_bios_is_port_present(struct intel_display *display, enum port port) 3414{ 3415 const struct intel_bios_encoder_data *devdata; 3416 3417 if (WARN_ON(!has_ddi_port_info(display))) 3418 return true; 3419 3420 if (!is_port_valid(display, port)) 3421 return false; 3422 3423 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3424 const struct child_device_config *child = &devdata->child; 3425 3426 if (dvo_port_to_port(display, child->dvo_port) == port) 3427 return true; 3428 } 3429 3430 return false; 3431} 3432 3433bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 3434{ 3435 const struct child_device_config *child = &devdata->child; 3436 3437 if (!devdata) 3438 return false; 3439 3440 if (!intel_bios_encoder_supports_dp(devdata) || 3441 !intel_bios_encoder_supports_hdmi(devdata)) 3442 return false; 3443 3444 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 3445 return true; 3446 3447 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 3448 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 3449 child->aux_channel != 0) 3450 return true; 3451 3452 return false; 3453} 3454 3455/** 3456 * intel_bios_is_dsi_present - is DSI present in VBT 3457 * @display: display device instance 3458 * @port: port for DSI if present 3459 * 3460 * Return true if DSI is present, and return the port in %port. 3461 */ 3462bool intel_bios_is_dsi_present(struct intel_display *display, 3463 enum port *port) 3464{ 3465 const struct intel_bios_encoder_data *devdata; 3466 3467 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3468 const struct child_device_config *child = &devdata->child; 3469 u8 dvo_port = child->dvo_port; 3470 3471 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3472 continue; 3473 3474 if (dsi_dvo_port_to_port(display, dvo_port) == PORT_NONE) { 3475 drm_dbg_kms(display->drm, 3476 "VBT has unsupported DSI port %c\n", 3477 port_name(dvo_port - DVO_PORT_MIPIA)); 3478 continue; 3479 } 3480 3481 if (port) 3482 *port = dsi_dvo_port_to_port(display, dvo_port); 3483 return true; 3484 } 3485 3486 return false; 3487} 3488 3489static void fill_dsc(struct intel_crtc_state *crtc_state, 3490 struct dsc_compression_parameters_entry *dsc, 3491 int dsc_max_bpc) 3492{ 3493 struct intel_display *display = to_intel_display(crtc_state); 3494 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 3495 int bpc = 8; 3496 3497 vdsc_cfg->dsc_version_major = dsc->version_major; 3498 vdsc_cfg->dsc_version_minor = dsc->version_minor; 3499 3500 if (dsc->support_12bpc && dsc_max_bpc >= 12) 3501 bpc = 12; 3502 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 3503 bpc = 10; 3504 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 3505 bpc = 8; 3506 else 3507 drm_dbg_kms(display->drm, "VBT: Unsupported BPC %d for DCS\n", 3508 dsc_max_bpc); 3509 3510 crtc_state->pipe_bpp = bpc * 3; 3511 3512 crtc_state->dsc.compressed_bpp_x16 = fxp_q4_from_int(min(crtc_state->pipe_bpp, 3513 VBT_DSC_MAX_BPP(dsc->max_bpp))); 3514 3515 /* 3516 * FIXME: This is ugly, and slice count should take DSC engine 3517 * throughput etc. into account. 3518 * 3519 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 3520 */ 3521 if (dsc->slices_per_line & BIT(2)) { 3522 crtc_state->dsc.slice_count = 4; 3523 } else if (dsc->slices_per_line & BIT(1)) { 3524 crtc_state->dsc.slice_count = 2; 3525 } else { 3526 /* FIXME */ 3527 if (!(dsc->slices_per_line & BIT(0))) 3528 drm_dbg_kms(display->drm, 3529 "VBT: Unsupported DSC slice count for DSI\n"); 3530 3531 crtc_state->dsc.slice_count = 1; 3532 } 3533 3534 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 3535 crtc_state->dsc.slice_count != 0) 3536 drm_dbg_kms(display->drm, 3537 "VBT: DSC hdisplay %d not divisible by slice count %d\n", 3538 crtc_state->hw.adjusted_mode.crtc_hdisplay, 3539 crtc_state->dsc.slice_count); 3540 3541 /* 3542 * The VBT rc_buffer_block_size and rc_buffer_size definitions 3543 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 3544 */ 3545 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 3546 dsc->rc_buffer_size); 3547 3548 /* FIXME: DSI spec says bpc + 1 for this one */ 3549 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 3550 3551 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 3552 3553 vdsc_cfg->slice_height = dsc->slice_height; 3554} 3555 3556/* FIXME: initially DSI specific */ 3557bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 3558 struct intel_crtc_state *crtc_state, 3559 int dsc_max_bpc) 3560{ 3561 struct intel_display *display = to_intel_display(encoder); 3562 const struct intel_bios_encoder_data *devdata; 3563 3564 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3565 const struct child_device_config *child = &devdata->child; 3566 3567 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3568 continue; 3569 3570 if (dsi_dvo_port_to_port(display, child->dvo_port) == encoder->port) { 3571 if (!devdata->dsc) 3572 return false; 3573 3574 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 3575 3576 return true; 3577 } 3578 } 3579 3580 return false; 3581} 3582 3583static const u8 adlp_aux_ch_map[] = { 3584 [AUX_CH_A] = DP_AUX_A, 3585 [AUX_CH_B] = DP_AUX_B, 3586 [AUX_CH_C] = DP_AUX_C, 3587 [AUX_CH_D_XELPD] = DP_AUX_D, 3588 [AUX_CH_E_XELPD] = DP_AUX_E, 3589 [AUX_CH_USBC1] = DP_AUX_F, 3590 [AUX_CH_USBC2] = DP_AUX_G, 3591 [AUX_CH_USBC3] = DP_AUX_H, 3592 [AUX_CH_USBC4] = DP_AUX_I, 3593}; 3594 3595/* 3596 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 3597 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 3598 */ 3599static const u8 adls_aux_ch_map[] = { 3600 [AUX_CH_A] = DP_AUX_A, 3601 [AUX_CH_USBC1] = DP_AUX_B, 3602 [AUX_CH_USBC2] = DP_AUX_C, 3603 [AUX_CH_USBC3] = DP_AUX_D, 3604 [AUX_CH_USBC4] = DP_AUX_E, 3605}; 3606 3607/* 3608 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 3609 * map to DDI A,B,TC1,TC2 respectively. 3610 */ 3611static const u8 rkl_aux_ch_map[] = { 3612 [AUX_CH_A] = DP_AUX_A, 3613 [AUX_CH_B] = DP_AUX_B, 3614 [AUX_CH_USBC1] = DP_AUX_C, 3615 [AUX_CH_USBC2] = DP_AUX_D, 3616}; 3617 3618static const u8 direct_aux_ch_map[] = { 3619 [AUX_CH_A] = DP_AUX_A, 3620 [AUX_CH_B] = DP_AUX_B, 3621 [AUX_CH_C] = DP_AUX_C, 3622 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */ 3623 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */ 3624 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */ 3625 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */ 3626 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */ 3627 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */ 3628}; 3629 3630static enum aux_ch map_aux_ch(struct intel_display *display, u8 aux_channel) 3631{ 3632 const u8 *aux_ch_map; 3633 int i, n_entries; 3634 3635 if (DISPLAY_VER(display) >= 13) { 3636 aux_ch_map = adlp_aux_ch_map; 3637 n_entries = ARRAY_SIZE(adlp_aux_ch_map); 3638 } else if (display->platform.alderlake_s) { 3639 aux_ch_map = adls_aux_ch_map; 3640 n_entries = ARRAY_SIZE(adls_aux_ch_map); 3641 } else if (display->platform.dg1 || display->platform.rocketlake) { 3642 aux_ch_map = rkl_aux_ch_map; 3643 n_entries = ARRAY_SIZE(rkl_aux_ch_map); 3644 } else { 3645 aux_ch_map = direct_aux_ch_map; 3646 n_entries = ARRAY_SIZE(direct_aux_ch_map); 3647 } 3648 3649 for (i = 0; i < n_entries; i++) { 3650 if (aux_ch_map[i] == aux_channel) 3651 return i; 3652 } 3653 3654 drm_dbg_kms(display->drm, 3655 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n", 3656 aux_channel); 3657 3658 return AUX_CH_NONE; 3659} 3660 3661enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata) 3662{ 3663 if (!devdata || !devdata->child.aux_channel) 3664 return AUX_CH_NONE; 3665 3666 return map_aux_ch(devdata->display, devdata->child.aux_channel); 3667} 3668 3669bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata) 3670{ 3671 struct intel_display *display; 3672 u8 aux_channel; 3673 int count = 0; 3674 3675 if (!devdata || !devdata->child.aux_channel) 3676 return false; 3677 3678 display = devdata->display; 3679 aux_channel = devdata->child.aux_channel; 3680 3681 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3682 if (intel_bios_encoder_supports_dp(devdata) && 3683 aux_channel == devdata->child.aux_channel) 3684 count++; 3685 } 3686 3687 return count > 1; 3688} 3689 3690int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3691{ 3692 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost) 3693 return 0; 3694 3695 return translate_iboost(devdata->display, devdata->child.dp_iboost_level); 3696} 3697 3698int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3699{ 3700 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost) 3701 return 0; 3702 3703 return translate_iboost(devdata->display, devdata->child.hdmi_iboost_level); 3704} 3705 3706int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata) 3707{ 3708 if (!devdata || !devdata->child.ddc_pin) 3709 return 0; 3710 3711 return map_ddc_pin(devdata->display, devdata->child.ddc_pin); 3712} 3713 3714bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3715{ 3716 return devdata->display->vbt.version >= 195 && devdata->child.dp_usb_type_c; 3717} 3718 3719bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3720{ 3721 return devdata->display->vbt.version >= 209 && devdata->child.tbt; 3722} 3723 3724bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata) 3725{ 3726 return devdata && devdata->child.lane_reversal; 3727} 3728 3729bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata) 3730{ 3731 return devdata && devdata->child.hpd_invert; 3732} 3733 3734const struct intel_bios_encoder_data * 3735intel_bios_encoder_data_lookup(struct intel_display *display, enum port port) 3736{ 3737 struct intel_bios_encoder_data *devdata; 3738 3739 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3740 if (intel_bios_encoder_port(devdata) == port) 3741 return devdata; 3742 } 3743 3744 return NULL; 3745} 3746 3747void intel_bios_for_each_encoder(struct intel_display *display, 3748 void (*func)(struct intel_display *display, 3749 const struct intel_bios_encoder_data *devdata)) 3750{ 3751 struct intel_bios_encoder_data *devdata; 3752 3753 list_for_each_entry(devdata, &display->vbt.display_devices, node) 3754 func(display, devdata); 3755} 3756 3757static int intel_bios_vbt_show(struct seq_file *m, void *unused) 3758{ 3759 struct intel_display *display = m->private; 3760 const void *vbt; 3761 size_t vbt_size; 3762 3763 vbt = intel_bios_get_vbt(display, &vbt_size); 3764 3765 if (vbt) { 3766 seq_write(m, vbt, vbt_size); 3767 kfree(vbt); 3768 } 3769 3770 return 0; 3771} 3772 3773DEFINE_SHOW_ATTRIBUTE(intel_bios_vbt); 3774 3775void intel_bios_debugfs_register(struct intel_display *display) 3776{ 3777 debugfs_create_file("i915_vbt", 0444, display->drm->debugfs_root, 3778 display, &intel_bios_vbt_fops); 3779}
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