psb_intel_lvds.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright © 2006-2007 Intel Corporation
  4 *
  5 * Authors:
  6 *	Eric Anholt <eric@anholt.net>
  7 *	Dave Airlie <airlied@linux.ie>
  8 *	Jesse Barnes <jesse.barnes@intel.com>
  9 */
 10
 11#include <linux/i2c.h>
 12#include <linux/pm_runtime.h>
 13
 14#include <drm/drm_crtc_helper.h>
 15#include <drm/drm_modeset_helper_vtables.h>
 16#include <drm/drm_print.h>
 17#include <drm/drm_simple_kms_helper.h>
 18
 19#include "intel_bios.h"
 20#include "power.h"
 21#include "psb_drv.h"
 22#include "psb_intel_drv.h"
 23#include "psb_intel_reg.h"
 24
 25/*
 26 * LVDS I2C backlight control macros
 27 */
 28#define BRIGHTNESS_MAX_LEVEL 100
 29#define BRIGHTNESS_MASK 0xFF
 30#define BLC_I2C_TYPE	0x01
 31#define BLC_PWM_TYPT	0x02
 32
 33#define BLC_POLARITY_NORMAL 0
 34#define BLC_POLARITY_INVERSE 1
 35
 36#define PSB_BLC_MAX_PWM_REG_FREQ       (0xFFFE)
 37#define PSB_BLC_MIN_PWM_REG_FREQ	(0x2)
 38#define PSB_BLC_PWM_PRECISION_FACTOR	(10)
 39#define PSB_BACKLIGHT_PWM_CTL_SHIFT	(16)
 40#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
 41
 42struct psb_intel_lvds_priv {
 43	/*
 44	 * Saved LVDO output states
 45	 */
 46	uint32_t savePP_ON;
 47	uint32_t savePP_OFF;
 48	uint32_t saveLVDS;
 49	uint32_t savePP_CONTROL;
 50	uint32_t savePP_CYCLE;
 51	uint32_t savePFIT_CONTROL;
 52	uint32_t savePFIT_PGM_RATIOS;
 53	uint32_t saveBLC_PWM_CTL;
 54
 55	struct gma_i2c_chan *i2c_bus;
 56};
 57
 58
 59/*
 60 * Returns the maximum level of the backlight duty cycle field.
 61 */
 62static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
 63{
 64	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
 65	u32 ret;
 66
 67	if (gma_power_begin(dev, false)) {
 68		ret = REG_READ(BLC_PWM_CTL);
 69		gma_power_end(dev);
 70	} else /* Powered off, use the saved value */
 71		ret = dev_priv->regs.saveBLC_PWM_CTL;
 72
 73	/* Top 15bits hold the frequency mask */
 74	ret = (ret &  BACKLIGHT_MODULATION_FREQ_MASK) >>
 75					BACKLIGHT_MODULATION_FREQ_SHIFT;
 76
 77        ret *= 2;	/* Return a 16bit range as needed for setting */
 78        if (ret == 0)
 79                dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
 80                        REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
 81	return ret;
 82}
 83
 84/*
 85 * Set LVDS backlight level by I2C command
 86 *
 87 * FIXME: at some point we need to both track this for PM and also
 88 * disable runtime pm on MRST if the brightness is nil (ie blanked)
 89 */
 90static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
 91					unsigned int level)
 92{
 93	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
 94
 95	struct gma_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
 96	u8 out_buf[2];
 97	unsigned int blc_i2c_brightness;
 98
 99	struct i2c_msg msgs[] = {
100		{
101			.addr = lvds_i2c_bus->target_addr,
102			.flags = 0,
103			.len = 2,
104			.buf = out_buf,
105		}
106	};
107
108	blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
109			     BRIGHTNESS_MASK /
110			     BRIGHTNESS_MAX_LEVEL);
111
112	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
113		blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
114
115	out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
116	out_buf[1] = (u8)blc_i2c_brightness;
117
118	if (i2c_transfer(&lvds_i2c_bus->base, msgs, 1) == 1) {
119		dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
120			dev_priv->lvds_bl->brightnesscmd,
121			blc_i2c_brightness);
122		return 0;
123	}
124
125	dev_err(dev->dev, "I2C transfer error\n");
126	return -1;
127}
128
129
130static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
131{
132	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
133
134	u32 max_pwm_blc;
135	u32 blc_pwm_duty_cycle;
136
137	max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
138
139	/*BLC_PWM_CTL Should be initiated while backlight device init*/
140	BUG_ON(max_pwm_blc == 0);
141
142	blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
143
144	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
145		blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
146
147	blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
148	REG_WRITE(BLC_PWM_CTL,
149		  (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
150		  (blc_pwm_duty_cycle));
151
152        dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
153		  (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
154		  (blc_pwm_duty_cycle));
155
156	return 0;
157}
158
159/*
160 * Set LVDS backlight level either by I2C or PWM
161 */
162void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
163{
164	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
165
166	dev_dbg(dev->dev, "backlight level is %d\n", level);
167
168	if (!dev_priv->lvds_bl) {
169		dev_err(dev->dev, "NO LVDS backlight info\n");
170		return;
171	}
172
173	if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
174		psb_lvds_i2c_set_brightness(dev, level);
175	else
176		psb_lvds_pwm_set_brightness(dev, level);
177}
178
179/*
180 * Sets the backlight level.
181 *
182 * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
183 */
184static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
185{
186	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
187	u32 blc_pwm_ctl;
188
189	if (gma_power_begin(dev, false)) {
190		blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
191		blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
192		REG_WRITE(BLC_PWM_CTL,
193				(blc_pwm_ctl |
194				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
195		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
196					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
197		gma_power_end(dev);
198	} else {
199		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
200				~BACKLIGHT_DUTY_CYCLE_MASK;
201		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
202					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
203	}
204}
205
206/*
207 * Sets the power state for the panel.
208 */
209static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
210{
211	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
212	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
213	u32 pp_status;
214
215	if (!gma_power_begin(dev, true)) {
216	        dev_err(dev->dev, "set power, chip off!\n");
217		return;
218        }
219
220	if (on) {
221		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
222			  POWER_TARGET_ON);
223		do {
224			pp_status = REG_READ(PP_STATUS);
225		} while ((pp_status & PP_ON) == 0);
226
227		psb_intel_lvds_set_backlight(dev,
228					     mode_dev->backlight_duty_cycle);
229	} else {
230		psb_intel_lvds_set_backlight(dev, 0);
231
232		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
233			  ~POWER_TARGET_ON);
234		do {
235			pp_status = REG_READ(PP_STATUS);
236		} while (pp_status & PP_ON);
237	}
238
239	gma_power_end(dev);
240}
241
242static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
243{
244	struct drm_device *dev = encoder->dev;
245
246	if (mode == DRM_MODE_DPMS_ON)
247		psb_intel_lvds_set_power(dev, true);
248	else
249		psb_intel_lvds_set_power(dev, false);
250
251	/* XXX: We never power down the LVDS pairs. */
252}
253
254static void psb_intel_lvds_save(struct drm_connector *connector)
255{
256	struct drm_device *dev = connector->dev;
257	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
258	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
259	struct psb_intel_lvds_priv *lvds_priv =
260		(struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
261
262	lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
263	lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
264	lvds_priv->saveLVDS = REG_READ(LVDS);
265	lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
266	lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
267	/*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
268	lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
269	lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
270	lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
271
272	/*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
273	dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
274						BACKLIGHT_DUTY_CYCLE_MASK);
275
276	/*
277	 * If the light is off at server startup,
278	 * just make it full brightness
279	 */
280	if (dev_priv->backlight_duty_cycle == 0)
281		dev_priv->backlight_duty_cycle =
282		psb_intel_lvds_get_max_backlight(dev);
283
284	dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
285			lvds_priv->savePP_ON,
286			lvds_priv->savePP_OFF,
287			lvds_priv->saveLVDS,
288			lvds_priv->savePP_CONTROL,
289			lvds_priv->savePP_CYCLE,
290			lvds_priv->saveBLC_PWM_CTL);
291}
292
293static void psb_intel_lvds_restore(struct drm_connector *connector)
294{
295	struct drm_device *dev = connector->dev;
296	u32 pp_status;
297	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
298	struct psb_intel_lvds_priv *lvds_priv =
299		(struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
300
301	dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
302			lvds_priv->savePP_ON,
303			lvds_priv->savePP_OFF,
304			lvds_priv->saveLVDS,
305			lvds_priv->savePP_CONTROL,
306			lvds_priv->savePP_CYCLE,
307			lvds_priv->saveBLC_PWM_CTL);
308
309	REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
310	REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
311	REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
312	REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
313	REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
314	/*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
315	REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
316	REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
317	REG_WRITE(LVDS, lvds_priv->saveLVDS);
318
319	if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
320		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
321			POWER_TARGET_ON);
322		do {
323			pp_status = REG_READ(PP_STATUS);
324		} while ((pp_status & PP_ON) == 0);
325	} else {
326		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
327			~POWER_TARGET_ON);
328		do {
329			pp_status = REG_READ(PP_STATUS);
330		} while (pp_status & PP_ON);
331	}
332}
333
334enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
335				 const struct drm_display_mode *mode)
336{
337	struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
338	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
339	struct drm_display_mode *fixed_mode =
340					dev_priv->mode_dev.panel_fixed_mode;
341
342	if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
343		fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
344
345	/* just in case */
346	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
347		return MODE_NO_DBLESCAN;
348
349	/* just in case */
350	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
351		return MODE_NO_INTERLACE;
352
353	if (fixed_mode) {
354		if (mode->hdisplay > fixed_mode->hdisplay)
355			return MODE_PANEL;
356		if (mode->vdisplay > fixed_mode->vdisplay)
357			return MODE_PANEL;
358	}
359	return MODE_OK;
360}
361
362bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
363				  const struct drm_display_mode *mode,
364				  struct drm_display_mode *adjusted_mode)
365{
366	struct drm_device *dev = encoder->dev;
367	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
368	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
369	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
370	struct drm_encoder *tmp_encoder;
371	struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
372	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
373
374	if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
375		panel_fixed_mode = mode_dev->panel_fixed_mode2;
376
377	/* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
378	if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
379		pr_err("Can't support LVDS on pipe A\n");
380		return false;
381	}
382	if (IS_MRST(dev) && gma_crtc->pipe != 0) {
383		pr_err("Must use PIPE A\n");
384		return false;
385	}
386	/* Should never happen!! */
387	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
388			    head) {
389		if (tmp_encoder != encoder
390		    && tmp_encoder->crtc == encoder->crtc) {
391			pr_err("Can't enable LVDS and another encoder on the same pipe\n");
392			return false;
393		}
394	}
395
396	/*
397	 * If we have timings from the BIOS for the panel, put them in
398	 * to the adjusted mode.  The CRTC will be set up for this mode,
399	 * with the panel scaling set up to source from the H/VDisplay
400	 * of the original mode.
401	 */
402	if (panel_fixed_mode != NULL) {
403		adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
404		adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
405		adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
406		adjusted_mode->htotal = panel_fixed_mode->htotal;
407		adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
408		adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
409		adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
410		adjusted_mode->vtotal = panel_fixed_mode->vtotal;
411		adjusted_mode->clock = panel_fixed_mode->clock;
412		drm_mode_set_crtcinfo(adjusted_mode,
413				      CRTC_INTERLACE_HALVE_V);
414	}
415
416	/*
417	 * XXX: It would be nice to support lower refresh rates on the
418	 * panels to reduce power consumption, and perhaps match the
419	 * user's requested refresh rate.
420	 */
421
422	return true;
423}
424
425static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
426{
427	struct drm_device *dev = encoder->dev;
428	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
429	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
430
431	if (!gma_power_begin(dev, true))
432		return;
433
434	mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
435	mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
436					  BACKLIGHT_DUTY_CYCLE_MASK);
437
438	psb_intel_lvds_set_power(dev, false);
439
440	gma_power_end(dev);
441}
442
443static void psb_intel_lvds_commit(struct drm_encoder *encoder)
444{
445	struct drm_device *dev = encoder->dev;
446	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
447	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
448
449	if (mode_dev->backlight_duty_cycle == 0)
450		mode_dev->backlight_duty_cycle =
451		    psb_intel_lvds_get_max_backlight(dev);
452
453	psb_intel_lvds_set_power(dev, true);
454}
455
456static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
457				struct drm_display_mode *mode,
458				struct drm_display_mode *adjusted_mode)
459{
460	struct drm_device *dev = encoder->dev;
461	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
462	u32 pfit_control;
463
464	/*
465	 * The LVDS pin pair will already have been turned on in the
466	 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
467	 * settings.
468	 */
469
470	/*
471	 * Enable automatic panel scaling so that non-native modes fill the
472	 * screen.  Should be enabled before the pipe is enabled, according to
473	 * register description and PRM.
474	 */
475	if (mode->hdisplay != adjusted_mode->hdisplay ||
476	    mode->vdisplay != adjusted_mode->vdisplay)
477		pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
478				HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
479				HORIZ_INTERP_BILINEAR);
480	else
481		pfit_control = 0;
482
483	if (dev_priv->lvds_dither)
484		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
485
486	REG_WRITE(PFIT_CONTROL, pfit_control);
487}
488
489/*
490 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
491 */
492static int psb_intel_lvds_get_modes(struct drm_connector *connector)
493{
494	struct drm_device *dev = connector->dev;
495	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
496	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
497	int ret = 0;
498
499	if (!IS_MRST(dev))
500		ret = psb_intel_ddc_get_modes(connector, connector->ddc);
501
502	if (ret)
503		return ret;
504
505	if (mode_dev->panel_fixed_mode != NULL) {
506		struct drm_display_mode *mode =
507		    drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
508		if (!mode)
509			return 0;
510
511		drm_mode_probed_add(connector, mode);
512		return 1;
513	}
514
515	return 0;
516}
517
518void psb_intel_lvds_destroy(struct drm_connector *connector)
519{
520	struct gma_connector *gma_connector = to_gma_connector(connector);
521	struct gma_i2c_chan *ddc_bus = to_gma_i2c_chan(connector->ddc);
522
523	gma_i2c_destroy(ddc_bus);
524	drm_connector_cleanup(connector);
525	kfree(gma_connector);
526}
527
528int psb_intel_lvds_set_property(struct drm_connector *connector,
529				       struct drm_property *property,
530				       uint64_t value)
531{
532	struct drm_encoder *encoder = connector->encoder;
533
534	if (!encoder)
535		return -1;
536
537	if (!strcmp(property->name, "scaling mode")) {
538		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
539		uint64_t curval;
540
541		if (!crtc)
542			goto set_prop_error;
543
544		switch (value) {
545		case DRM_MODE_SCALE_FULLSCREEN:
546			break;
547		case DRM_MODE_SCALE_NO_SCALE:
548			break;
549		case DRM_MODE_SCALE_ASPECT:
550			break;
551		default:
552			goto set_prop_error;
553		}
554
555		if (drm_object_property_get_value(&connector->base,
556						     property,
557						     &curval))
558			goto set_prop_error;
559
560		if (curval == value)
561			goto set_prop_done;
562
563		if (drm_object_property_set_value(&connector->base,
564							property,
565							value))
566			goto set_prop_error;
567
568		if (crtc->saved_mode.hdisplay != 0 &&
569		    crtc->saved_mode.vdisplay != 0) {
570			if (!drm_crtc_helper_set_mode(encoder->crtc,
571						      &crtc->saved_mode,
572						      encoder->crtc->x,
573						      encoder->crtc->y,
574						      encoder->crtc->primary->fb))
575				goto set_prop_error;
576		}
577	} else if (!strcmp(property->name, "backlight")) {
578		if (drm_object_property_set_value(&connector->base,
579							property,
580							value))
581			goto set_prop_error;
582		else
583                        gma_backlight_set(encoder->dev, value);
584	} else if (!strcmp(property->name, "DPMS")) {
585		const struct drm_encoder_helper_funcs *hfuncs
586						= encoder->helper_private;
587		hfuncs->dpms(encoder, value);
588	}
589
590set_prop_done:
591	return 0;
592set_prop_error:
593	return -1;
594}
595
596static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
597	.dpms = psb_intel_lvds_encoder_dpms,
598	.mode_fixup = psb_intel_lvds_mode_fixup,
599	.prepare = psb_intel_lvds_prepare,
600	.mode_set = psb_intel_lvds_mode_set,
601	.commit = psb_intel_lvds_commit,
602};
603
604const struct drm_connector_helper_funcs
605				psb_intel_lvds_connector_helper_funcs = {
606	.get_modes = psb_intel_lvds_get_modes,
607	.mode_valid = psb_intel_lvds_mode_valid,
608	.best_encoder = gma_best_encoder,
609};
610
611const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
612	.dpms = drm_helper_connector_dpms,
613	.fill_modes = drm_helper_probe_single_connector_modes,
614	.set_property = psb_intel_lvds_set_property,
615	.destroy = psb_intel_lvds_destroy,
616};
617
618/**
619 * psb_intel_lvds_init - setup LVDS connectors on this device
620 * @dev: drm device
621 * @mode_dev: mode device
622 *
623 * Create the connector, register the LVDS DDC bus, and try to figure out what
624 * modes we can display on the LVDS panel (if present).
625 */
626void psb_intel_lvds_init(struct drm_device *dev,
627			 struct psb_intel_mode_device *mode_dev)
628{
629	struct gma_encoder *gma_encoder;
630	struct gma_connector *gma_connector;
631	struct psb_intel_lvds_priv *lvds_priv;
632	struct drm_connector *connector;
633	struct drm_encoder *encoder;
634	struct drm_display_mode *scan;	/* *modes, *bios_mode; */
635	struct drm_crtc *crtc;
636	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
637	struct gma_i2c_chan *ddc_bus;
638	u32 lvds;
639	int pipe;
640	int ret;
641
642	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
643	if (!gma_encoder) {
644		dev_err(dev->dev, "gma_encoder allocation error\n");
645		return;
646	}
647	encoder = &gma_encoder->base;
648
649	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
650	if (!gma_connector) {
651		dev_err(dev->dev, "gma_connector allocation error\n");
652		goto err_free_encoder;
653	}
654
655	lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
656	if (!lvds_priv) {
657		dev_err(dev->dev, "LVDS private allocation error\n");
658		goto err_free_connector;
659	}
660
661	gma_encoder->dev_priv = lvds_priv;
662
663	connector = &gma_connector->base;
664	gma_connector->save = psb_intel_lvds_save;
665	gma_connector->restore = psb_intel_lvds_restore;
666
667	/* Set up the DDC bus. */
668	ddc_bus = gma_i2c_create(dev, GPIOC, "LVDSDDC_C");
669	if (!ddc_bus) {
670		dev_printk(KERN_ERR, dev->dev,
671			   "DDC bus registration " "failed.\n");
672		goto err_free_lvds_priv;
673	}
674
675	ret = drm_connector_init_with_ddc(dev, connector,
676					  &psb_intel_lvds_connector_funcs,
677					  DRM_MODE_CONNECTOR_LVDS,
678					  &ddc_bus->base);
679	if (ret)
680		goto err_ddc_destroy;
681
682	ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
683	if (ret)
684		goto err_connector_cleanup;
685
686	gma_connector_attach_encoder(gma_connector, gma_encoder);
687	gma_encoder->type = INTEL_OUTPUT_LVDS;
688
689	drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
690	drm_connector_helper_add(connector,
691				 &psb_intel_lvds_connector_helper_funcs);
692	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
693	connector->interlace_allowed = false;
694	connector->doublescan_allowed = false;
695
696	/*Attach connector properties*/
697	drm_object_attach_property(&connector->base,
698				      dev->mode_config.scaling_mode_property,
699				      DRM_MODE_SCALE_FULLSCREEN);
700	drm_object_attach_property(&connector->base,
701				      dev_priv->backlight_property,
702				      BRIGHTNESS_MAX_LEVEL);
703
704	/*
705	 * Set up I2C bus
706	 * FIXME: distroy i2c_bus when exit
707	 */
708	lvds_priv->i2c_bus = gma_i2c_create(dev, GPIOB, "LVDSBLC_B");
709	if (!lvds_priv->i2c_bus) {
710		dev_printk(KERN_ERR,
711			dev->dev, "I2C bus registration failed.\n");
712		goto err_encoder_cleanup;
713	}
714	lvds_priv->i2c_bus->target_addr = 0x2C;
715	dev_priv->lvds_i2c_bus =  lvds_priv->i2c_bus;
716
717	/*
718	 * LVDS discovery:
719	 * 1) check for EDID on DDC
720	 * 2) check for VBT data
721	 * 3) check to see if LVDS is already on
722	 *    if none of the above, no panel
723	 * 4) make sure lid is open
724	 *    if closed, act like it's not there for now
725	 */
726
727	/*
728	 * Attempt to get the fixed panel mode from DDC.  Assume that the
729	 * preferred mode is the right one.
730	 */
731	mutex_lock(&dev->mode_config.mutex);
732	psb_intel_ddc_get_modes(connector, &ddc_bus->base);
733
734	list_for_each_entry(scan, &connector->probed_modes, head) {
735		if (scan->type & DRM_MODE_TYPE_PREFERRED) {
736			mode_dev->panel_fixed_mode =
737			    drm_mode_duplicate(dev, scan);
738			DRM_DEBUG_KMS("Using mode from DDC\n");
739			goto out;	/* FIXME: check for quirks */
740		}
741	}
742
743	/* Failed to get EDID, what about VBT? do we need this? */
744	if (dev_priv->lfp_lvds_vbt_mode) {
745		mode_dev->panel_fixed_mode =
746			drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
747
748		if (mode_dev->panel_fixed_mode) {
749			mode_dev->panel_fixed_mode->type |=
750				DRM_MODE_TYPE_PREFERRED;
751			DRM_DEBUG_KMS("Using mode from VBT\n");
752			goto out;
753		}
754	}
755
756	/*
757	 * If we didn't get EDID, try checking if the panel is already turned
758	 * on.	If so, assume that whatever is currently programmed is the
759	 * correct mode.
760	 */
761	lvds = REG_READ(LVDS);
762	pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
763	crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
764
765	if (crtc && (lvds & LVDS_PORT_EN)) {
766		mode_dev->panel_fixed_mode =
767		    psb_intel_crtc_mode_get(dev, crtc);
768		if (mode_dev->panel_fixed_mode) {
769			mode_dev->panel_fixed_mode->type |=
770			    DRM_MODE_TYPE_PREFERRED;
771			DRM_DEBUG_KMS("Using pre-programmed mode\n");
772			goto out;	/* FIXME: check for quirks */
773		}
774	}
775
776	/* If we still don't have a mode after all that, give up. */
777	if (!mode_dev->panel_fixed_mode) {
778		dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
779		goto err_unlock;
780	}
781
782	/*
783	 * Blacklist machines with BIOSes that list an LVDS panel without
784	 * actually having one.
785	 */
786out:
787	mutex_unlock(&dev->mode_config.mutex);
788	return;
789
790err_unlock:
791	mutex_unlock(&dev->mode_config.mutex);
792	gma_i2c_destroy(lvds_priv->i2c_bus);
793err_encoder_cleanup:
794	drm_encoder_cleanup(encoder);
795err_connector_cleanup:
796	drm_connector_cleanup(connector);
797err_ddc_destroy:
798	gma_i2c_destroy(ddc_bus);
799err_free_lvds_priv:
800	kfree(lvds_priv);
801err_free_connector:
802	kfree(gma_connector);
803err_free_encoder:
804	kfree(gma_encoder);
805}
806