psb_drv.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/**************************************************************************
  3 * Copyright (c) 2007-2011, Intel Corporation.
  4 * All Rights Reserved.
  5 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
  6 * All Rights Reserved.
  7 *
  8 **************************************************************************/
  9
 10#include <linux/aperture.h>
 11#include <linux/cpu.h>
 12#include <linux/module.h>
 13#include <linux/notifier.h>
 14#include <linux/pm_runtime.h>
 15#include <linux/spinlock.h>
 16#include <linux/delay.h>
 17
 18#include <asm/set_memory.h>
 19
 20#include <acpi/video.h>
 21
 22#include <drm/clients/drm_client_setup.h>
 23#include <drm/drm.h>
 24#include <drm/drm_drv.h>
 25#include <drm/drm_file.h>
 26#include <drm/drm_ioctl.h>
 27#include <drm/drm_pciids.h>
 28#include <drm/drm_print.h>
 29#include <drm/drm_vblank.h>
 30
 31#include "framebuffer.h"
 32#include "gem.h"
 33#include "intel_bios.h"
 34#include "mid_bios.h"
 35#include "power.h"
 36#include "psb_drv.h"
 37#include "psb_intel_reg.h"
 38#include "psb_irq.h"
 39#include "psb_reg.h"
 40
 41static const struct drm_driver driver;
 42static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
 43
 44/*
 45 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
 46 * to the different groups of PowerVR 5-series chip designs
 47 *
 48 * 0x8086 = Intel Corporation
 49 *
 50 * PowerVR SGX535    - Poulsbo    - Intel GMA 500, Intel Atom Z5xx
 51 * PowerVR SGX535    - Moorestown - Intel GMA 600
 52 * PowerVR SGX535    - Oaktrail   - Intel GMA 600, Intel Atom Z6xx, E6xx
 53 * PowerVR SGX545    - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
 54 * PowerVR SGX545    - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
 55 *                                  N2800
 56 */
 57static const struct pci_device_id pciidlist[] = {
 58	/* Poulsbo */
 59	{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
 60	{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
 61	/* Oak Trail */
 62	{ 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 63	{ 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 64	{ 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 65	{ 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 66	{ 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 67	{ 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 68	{ 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 69	{ 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 70	{ 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
 71	/* Cedar Trail */
 72	{ 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 73	{ 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 74	{ 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 75	{ 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 76	{ 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 77	{ 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 78	{ 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 79	{ 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 80	{ 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 81	{ 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 82	{ 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 83	{ 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 84	{ 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 85	{ 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 86	{ 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 87	{ 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
 88	{ 0, }
 89};
 90MODULE_DEVICE_TABLE(pci, pciidlist);
 91
 92/*
 93 * Standard IOCTLs.
 94 */
 95static const struct drm_ioctl_desc psb_ioctls[] = {
 96};
 97
 98/**
 99 *	psb_spank		-	reset the 2D engine
100 *	@dev_priv: our PSB DRM device
101 *
102 *	Soft reset the graphics engine and then reload the necessary registers.
103 */
104static void psb_spank(struct drm_psb_private *dev_priv)
105{
106	PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
107		_PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
108		_PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
109		_PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
110	PSB_RSGX32(PSB_CR_SOFT_RESET);
111
112	msleep(1);
113
114	PSB_WSGX32(0, PSB_CR_SOFT_RESET);
115	wmb();
116	PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
117		   PSB_CR_BIF_CTRL);
118	wmb();
119	(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
120
121	msleep(1);
122	PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
123		   PSB_CR_BIF_CTRL);
124	(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
125	PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
126}
127
128static int psb_do_init(struct drm_device *dev)
129{
130	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
131	struct psb_gtt *pg = &dev_priv->gtt;
132
133	uint32_t stolen_gtt;
134
135	if (pg->mmu_gatt_start & 0x0FFFFFFF) {
136		dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
137		return -EINVAL;
138	}
139
140	stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
141	stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
142	stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
143
144	dev_priv->gatt_free_offset = pg->mmu_gatt_start +
145	    (stolen_gtt << PAGE_SHIFT) * 1024;
146
147	spin_lock_init(&dev_priv->irqmask_lock);
148
149	PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
150	PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
151	PSB_RSGX32(PSB_CR_BIF_BANK1);
152
153	/* Do not bypass any MMU access, let them pagefault instead */
154	PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
155		   PSB_CR_BIF_CTRL);
156	PSB_RSGX32(PSB_CR_BIF_CTRL);
157
158	psb_spank(dev_priv);
159
160	/* mmu_gatt ?? */
161	PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
162	PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
163
164	return 0;
165}
166
167static void psb_driver_unload(struct drm_device *dev)
168{
169	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
170
171	/* TODO: Kill vblank etc here */
172
173	gma_backlight_exit(dev);
174	psb_modeset_cleanup(dev);
175
176	gma_irq_uninstall(dev);
177
178	if (dev_priv->ops->chip_teardown)
179		dev_priv->ops->chip_teardown(dev);
180
181	psb_intel_opregion_fini(dev);
182
183	if (dev_priv->pf_pd) {
184		psb_mmu_free_pagedir(dev_priv->pf_pd);
185		dev_priv->pf_pd = NULL;
186	}
187	if (dev_priv->mmu) {
188		struct psb_gtt *pg = &dev_priv->gtt;
189
190		psb_mmu_remove_pfn_sequence(
191			psb_mmu_get_default_pd
192			(dev_priv->mmu),
193			pg->mmu_gatt_start,
194			dev_priv->vram_stolen_size >> PAGE_SHIFT);
195		psb_mmu_driver_takedown(dev_priv->mmu);
196		dev_priv->mmu = NULL;
197	}
198	psb_gem_mm_fini(dev);
199	psb_gtt_fini(dev);
200	if (dev_priv->scratch_page) {
201		set_pages_wb(dev_priv->scratch_page, 1);
202		__free_page(dev_priv->scratch_page);
203		dev_priv->scratch_page = NULL;
204	}
205	if (dev_priv->vdc_reg) {
206		iounmap(dev_priv->vdc_reg);
207		dev_priv->vdc_reg = NULL;
208	}
209	if (dev_priv->sgx_reg) {
210		iounmap(dev_priv->sgx_reg);
211		dev_priv->sgx_reg = NULL;
212	}
213	if (dev_priv->aux_reg) {
214		iounmap(dev_priv->aux_reg);
215		dev_priv->aux_reg = NULL;
216	}
217	pci_dev_put(dev_priv->aux_pdev);
218	pci_dev_put(dev_priv->lpc_pdev);
219
220	/* Destroy VBT data */
221	psb_intel_destroy_bios(dev);
222
223	gma_power_uninit(dev);
224}
225
226static void psb_device_release(void *data)
227{
228	struct drm_device *dev = data;
229
230	psb_driver_unload(dev);
231}
232
233static int psb_driver_load(struct drm_device *dev, unsigned long flags)
234{
235	struct pci_dev *pdev = to_pci_dev(dev->dev);
236	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
237	unsigned long resource_start, resource_len;
238	unsigned long irqflags;
239	struct drm_connector_list_iter conn_iter;
240	struct drm_connector *connector;
241	struct gma_encoder *gma_encoder;
242	struct psb_gtt *pg;
243	int ret = -ENOMEM;
244
245	/* initializing driver private data */
246
247	dev_priv->ops = (struct psb_ops *)flags;
248
249	pg = &dev_priv->gtt;
250
251	pci_set_master(pdev);
252
253	dev_priv->num_pipe = dev_priv->ops->pipes;
254
255	resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
256
257	dev_priv->vdc_reg =
258	    ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
259	if (!dev_priv->vdc_reg)
260		goto out_err;
261
262	dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
263							PSB_SGX_SIZE);
264	if (!dev_priv->sgx_reg)
265		goto out_err;
266
267	if (IS_MRST(dev)) {
268		int domain = pci_domain_nr(pdev->bus);
269
270		dev_priv->aux_pdev =
271			pci_get_domain_bus_and_slot(domain, 0,
272						    PCI_DEVFN(3, 0));
273
274		if (dev_priv->aux_pdev) {
275			resource_start = pci_resource_start(dev_priv->aux_pdev,
276							    PSB_AUX_RESOURCE);
277			resource_len = pci_resource_len(dev_priv->aux_pdev,
278							PSB_AUX_RESOURCE);
279			dev_priv->aux_reg = ioremap(resource_start,
280							    resource_len);
281			if (!dev_priv->aux_reg)
282				goto out_err;
283
284			DRM_DEBUG_KMS("Found aux vdc");
285		} else {
286			/* Couldn't find the aux vdc so map to primary vdc */
287			dev_priv->aux_reg = dev_priv->vdc_reg;
288			DRM_DEBUG_KMS("Couldn't find aux pci device");
289		}
290		dev_priv->gmbus_reg = dev_priv->aux_reg;
291
292		dev_priv->lpc_pdev =
293			pci_get_domain_bus_and_slot(domain, 0,
294						    PCI_DEVFN(31, 0));
295		if (dev_priv->lpc_pdev) {
296			pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
297				&dev_priv->lpc_gpio_base);
298			pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
299				(u32)dev_priv->lpc_gpio_base | (1L<<31));
300			pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
301				&dev_priv->lpc_gpio_base);
302			dev_priv->lpc_gpio_base &= 0xffc0;
303			if (dev_priv->lpc_gpio_base)
304				DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
305						dev_priv->lpc_gpio_base);
306			else {
307				pci_dev_put(dev_priv->lpc_pdev);
308				dev_priv->lpc_pdev = NULL;
309			}
310		}
311	} else {
312		dev_priv->gmbus_reg = dev_priv->vdc_reg;
313	}
314
315	psb_intel_opregion_setup(dev);
316
317	ret = dev_priv->ops->chip_setup(dev);
318	if (ret)
319		goto out_err;
320
321	/* Init OSPM support */
322	gma_power_init(dev);
323
324	ret = -ENOMEM;
325
326	dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
327	if (!dev_priv->scratch_page)
328		goto out_err;
329
330	set_pages_uc(dev_priv->scratch_page, 1);
331
332	ret = psb_gtt_init(dev);
333	if (ret)
334		goto out_err;
335	ret = psb_gem_mm_init(dev);
336	if (ret)
337		goto out_err;
338
339	ret = -ENOMEM;
340
341	dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
342	if (!dev_priv->mmu)
343		goto out_err;
344
345	dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
346	if (!dev_priv->pf_pd)
347		goto out_err;
348
349	ret = psb_do_init(dev);
350	if (ret)
351		return ret;
352
353	/* Add stolen memory to SGX MMU */
354	ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
355					  dev_priv->stolen_base >> PAGE_SHIFT,
356					  pg->gatt_start,
357					  pg->stolen_size >> PAGE_SHIFT, 0);
358
359	psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
360	psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
361
362	PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
363	PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
364
365	acpi_video_register();
366
367	/* Setup vertical blanking handling */
368	ret = drm_vblank_init(dev, dev_priv->num_pipe);
369	if (ret)
370		goto out_err;
371
372	/*
373	 * Install interrupt handlers prior to powering off SGX or else we will
374	 * crash.
375	 */
376	dev_priv->vdc_irq_mask = 0;
377	dev_priv->pipestat[0] = 0;
378	dev_priv->pipestat[1] = 0;
379	dev_priv->pipestat[2] = 0;
380	spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
381	PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
382	PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
383	PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
384	spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
385
386	gma_irq_install(dev);
387
388	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
389
390	psb_modeset_init(dev);
391	drm_kms_helper_poll_init(dev);
392
393	/* Only add backlight support if we have LVDS or MIPI output */
394	drm_connector_list_iter_begin(dev, &conn_iter);
395	drm_for_each_connector_iter(connector, &conn_iter) {
396		gma_encoder = gma_attached_encoder(connector);
397
398		if (gma_encoder->type == INTEL_OUTPUT_LVDS ||
399		    gma_encoder->type == INTEL_OUTPUT_MIPI) {
400			ret = gma_backlight_init(dev);
401			if (ret == 0)
402				acpi_video_register_backlight();
403			break;
404		}
405	}
406	drm_connector_list_iter_end(&conn_iter);
407
408	if (ret)
409		return ret;
410	psb_intel_opregion_enable_asle(dev);
411
412	return devm_add_action_or_reset(dev->dev, psb_device_release, dev);
413
414out_err:
415	psb_driver_unload(dev);
416	return ret;
417}
418
419/*
420 * Hardware for gma500 is a hybrid device, which both acts as a PCI
421 * device (for legacy vga functionality) but also more like an
422 * integrated display on a SoC where the framebuffer simply
423 * resides in main memory and not in a special PCI bar (that
424 * internally redirects to a stolen range of main memory) like all
425 * other integrated PCI display devices implement it.
426 *
427 * To catch all cases we need to remove conflicting firmware devices
428 * for the stolen system memory and for the VGA functionality. As we
429 * currently cannot easily find the framebuffer's location in stolen
430 * memory, we remove all framebuffers here.
431 *
432 * TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then
433 *       we might be able to read the framebuffer range from the
434 *       device.
435 */
436static int gma_remove_conflicting_framebuffers(struct pci_dev *pdev,
437					       const struct drm_driver *req_driver)
438{
439	resource_size_t base = 0;
440	resource_size_t size = U32_MAX; /* 4 GiB HW limit */
441	const char *name = req_driver->name;
442	int ret;
443
444	ret = aperture_remove_conflicting_devices(base, size, name);
445	if (ret)
446		return ret;
447
448	return __aperture_remove_legacy_vga_devices(pdev);
449}
450
451static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
452{
453	struct drm_psb_private *dev_priv;
454	struct drm_device *dev;
455	int ret;
456
457	ret = gma_remove_conflicting_framebuffers(pdev, &driver);
458	if (ret)
459		return ret;
460
461	ret = pcim_enable_device(pdev);
462	if (ret)
463		return ret;
464
465	dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev);
466	if (IS_ERR(dev_priv))
467		return PTR_ERR(dev_priv);
468	dev = &dev_priv->dev;
469
470	pci_set_drvdata(pdev, dev);
471
472	ret = psb_driver_load(dev, ent->driver_data);
473	if (ret)
474		return ret;
475
476	ret = drm_dev_register(dev, ent->driver_data);
477	if (ret)
478		return ret;
479
480	drm_client_setup(dev, NULL);
481
482	return 0;
483}
484
485static void psb_pci_remove(struct pci_dev *pdev)
486{
487	struct drm_device *dev = pci_get_drvdata(pdev);
488
489	drm_dev_unregister(dev);
490}
491
492static DEFINE_RUNTIME_DEV_PM_OPS(psb_pm_ops, gma_power_suspend, gma_power_resume, NULL);
493
494static const struct file_operations psb_gem_fops = {
495	.owner = THIS_MODULE,
496	.open = drm_open,
497	.release = drm_release,
498	.unlocked_ioctl = drm_ioctl,
499	.compat_ioctl = drm_compat_ioctl,
500	.mmap = drm_gem_mmap,
501	.poll = drm_poll,
502	.read = drm_read,
503	.fop_flags = FOP_UNSIGNED_OFFSET,
504};
505
506static const struct drm_driver driver = {
507	.driver_features = DRIVER_MODESET | DRIVER_GEM,
508
509	.num_ioctls = ARRAY_SIZE(psb_ioctls),
510
511	.dumb_create = psb_gem_dumb_create,
512	PSB_FBDEV_DRIVER_OPS,
513	.ioctls = psb_ioctls,
514	.fops = &psb_gem_fops,
515	.name = DRIVER_NAME,
516	.desc = DRIVER_DESC,
517	.major = DRIVER_MAJOR,
518	.minor = DRIVER_MINOR,
519	.patchlevel = DRIVER_PATCHLEVEL
520};
521
522static struct pci_driver psb_pci_driver = {
523	.name = DRIVER_NAME,
524	.id_table = pciidlist,
525	.probe = psb_pci_probe,
526	.remove = psb_pci_remove,
527	.driver.pm = &psb_pm_ops,
528};
529
530static int __init psb_init(void)
531{
532	if (drm_firmware_drivers_only())
533		return -ENODEV;
534
535	return pci_register_driver(&psb_pci_driver);
536}
537
538static void __exit psb_exit(void)
539{
540	pci_unregister_driver(&psb_pci_driver);
541}
542
543late_initcall(psb_init);
544module_exit(psb_exit);
545
546MODULE_AUTHOR(DRIVER_AUTHOR);
547MODULE_DESCRIPTION(DRIVER_DESC);
548MODULE_LICENSE("GPL");