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drm_displayid_internal.h

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linux-6.19.14/drivers/gpu/drm/drm_displayid_internal.h C
  1/*
  2 * Copyright © 2014 Red Hat Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 */
 22
 23#ifndef __DRM_DISPLAYID_INTERNAL_H__
 24#define __DRM_DISPLAYID_INTERNAL_H__
 25
 26#include <linux/types.h>
 27#include <linux/bits.h>
 28
 29struct drm_edid;
 30
 31#define VESA_IEEE_OUI				0x3a0292
 32
 33/* DisplayID Structure versions */
 34#define DISPLAY_ID_STRUCTURE_VER_20		0x20
 35
 36/* DisplayID Structure v1r2 Data Blocks */
 37#define DATA_BLOCK_PRODUCT_ID			0x00
 38#define DATA_BLOCK_DISPLAY_PARAMETERS		0x01
 39#define DATA_BLOCK_COLOR_CHARACTERISTICS	0x02
 40#define DATA_BLOCK_TYPE_1_DETAILED_TIMING	0x03
 41#define DATA_BLOCK_TYPE_2_DETAILED_TIMING	0x04
 42#define DATA_BLOCK_TYPE_3_SHORT_TIMING		0x05
 43#define DATA_BLOCK_TYPE_4_DMT_TIMING		0x06
 44#define DATA_BLOCK_VESA_TIMING			0x07
 45#define DATA_BLOCK_CEA_TIMING			0x08
 46#define DATA_BLOCK_VIDEO_TIMING_RANGE		0x09
 47#define DATA_BLOCK_PRODUCT_SERIAL_NUMBER	0x0a
 48#define DATA_BLOCK_GP_ASCII_STRING		0x0b
 49#define DATA_BLOCK_DISPLAY_DEVICE_DATA		0x0c
 50#define DATA_BLOCK_INTERFACE_POWER_SEQUENCING	0x0d
 51#define DATA_BLOCK_TRANSFER_CHARACTERISTICS	0x0e
 52#define DATA_BLOCK_DISPLAY_INTERFACE		0x0f
 53#define DATA_BLOCK_STEREO_DISPLAY_INTERFACE	0x10
 54#define DATA_BLOCK_TILED_DISPLAY		0x12
 55#define DATA_BLOCK_VENDOR_SPECIFIC		0x7f
 56#define DATA_BLOCK_CTA				0x81
 57
 58/* DisplayID Structure v2r0 Data Blocks */
 59#define DATA_BLOCK_2_PRODUCT_ID			0x20
 60#define DATA_BLOCK_2_DISPLAY_PARAMETERS		0x21
 61#define DATA_BLOCK_2_TYPE_7_DETAILED_TIMING	0x22
 62#define DATA_BLOCK_2_TYPE_8_ENUMERATED_TIMING	0x23
 63#define DATA_BLOCK_2_TYPE_9_FORMULA_TIMING	0x24
 64#define DATA_BLOCK_2_DYNAMIC_VIDEO_TIMING	0x25
 65#define DATA_BLOCK_2_DISPLAY_INTERFACE_FEATURES	0x26
 66#define DATA_BLOCK_2_STEREO_DISPLAY_INTERFACE	0x27
 67#define DATA_BLOCK_2_TILED_DISPLAY_TOPOLOGY	0x28
 68#define DATA_BLOCK_2_CONTAINER_ID		0x29
 69#define DATA_BLOCK_2_TYPE_10_FORMULA_TIMING	0x2a
 70#define DATA_BLOCK_2_VENDOR_SPECIFIC		0x7e
 71#define DATA_BLOCK_2_CTA_DISPLAY_ID		0x81
 72
 73/* DisplayID Structure v1r2 Product Type */
 74#define PRODUCT_TYPE_EXTENSION			0
 75#define PRODUCT_TYPE_TEST			1
 76#define PRODUCT_TYPE_PANEL			2
 77#define PRODUCT_TYPE_MONITOR			3
 78#define PRODUCT_TYPE_TV				4
 79#define PRODUCT_TYPE_REPEATER			5
 80#define PRODUCT_TYPE_DIRECT_DRIVE		6
 81
 82/* DisplayID Structure v2r0 Display Product Primary Use Case (~Product Type) */
 83#define PRIMARY_USE_EXTENSION			0
 84#define PRIMARY_USE_TEST			1
 85#define PRIMARY_USE_GENERIC			2
 86#define PRIMARY_USE_TV				3
 87#define PRIMARY_USE_DESKTOP_PRODUCTIVITY	4
 88#define PRIMARY_USE_DESKTOP_GAMING		5
 89#define PRIMARY_USE_PRESENTATION		6
 90#define PRIMARY_USE_HEAD_MOUNTED_VR		7
 91#define PRIMARY_USE_HEAD_MOUNTED_AR		8
 92
 93struct displayid_header {
 94	u8 rev;
 95	u8 bytes;
 96	u8 prod_id;
 97	u8 ext_count;
 98} __packed;
 99
100struct displayid_block {
101	u8 tag;
102	u8 rev;
103	u8 num_bytes;
104} __packed;
105
106struct displayid_tiled_block {
107	struct displayid_block base;
108	u8 tile_cap;
109	u8 topo[3];
110	u8 tile_size[4];
111	u8 tile_pixel_bezel[5];
112	u8 topology_id[8];
113} __packed;
114
115struct displayid_detailed_timings_1 {
116	u8 pixel_clock[3];
117	u8 flags;
118	__le16 hactive;
119	__le16 hblank;
120	__le16 hsync;
121	__le16 hsw;
122	__le16 vactive;
123	__le16 vblank;
124	__le16 vsync;
125	__le16 vsw;
126} __packed;
127
128struct displayid_detailed_timing_block {
129	struct displayid_block base;
130	struct displayid_detailed_timings_1 timings[];
131} __packed;
132
133struct displayid_formula_timings_9 {
134	u8 flags;
135	__le16 hactive;
136	__le16 vactive;
137	u8 vrefresh;
138} __packed;
139
140struct displayid_formula_timing_block {
141	struct displayid_block base;
142	struct displayid_formula_timings_9 timings[];
143} __packed;
144
145#define DISPLAYID_VESA_MSO_OVERLAP	GENMASK(3, 0)
146#define DISPLAYID_VESA_MSO_MODE		GENMASK(6, 5)
147
148struct displayid_vesa_vendor_specific_block {
149	struct displayid_block base;
150	u8 oui[3];
151	u8 data_structure_type;
152	u8 mso;
153} __packed;
154
155/*
156 * DisplayID iteration.
157 *
158 * Do not access directly, this is private.
159 */
160struct displayid_iter {
161	const struct drm_edid *drm_edid;
162
163	const u8 *section;
164	int length;
165	int idx;
166	int ext_index;
167
168	u8 version;
169	u8 primary_use;
170
171	u8 quirks;
172};
173
174void displayid_iter_edid_begin(const struct drm_edid *drm_edid,
175			       struct displayid_iter *iter);
176const struct displayid_block *
177__displayid_iter_next(struct displayid_iter *iter);
178#define displayid_iter_for_each(__block, __iter) \
179	while (((__block) = __displayid_iter_next(__iter)))
180void displayid_iter_end(struct displayid_iter *iter);
181
182u8 displayid_version(const struct displayid_iter *iter);
183u8 displayid_primary_use(const struct displayid_iter *iter);
184
185#endif
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