smu_v11_8_pmfw.h

  1/*
  2 * Copyright 2021 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 */
 23
 24#ifndef __SMU_V11_8_0_PMFW_H__
 25#define __SMU_V11_8_0_PMFW_H__
 26
 27#pragma pack(push, 1)
 28
 29#define ENABLE_DEBUG_FEATURES
 30
 31// Feature Control Defines
 32#define FEATURE_CCLK_CONTROLLER_BIT       0
 33#define FEATURE_GFXCLK_EFFT_FREQ_BIT      1
 34#define FEATURE_DATA_CALCULATION_BIT      2
 35#define FEATURE_THERMAL_BIT               3
 36#define FEATURE_PLL_POWER_DOWN_BIT        4
 37#define FEATURE_FCLK_DPM_BIT              5
 38#define FEATURE_GFX_DPM_BIT               6
 39#define FEATURE_DS_GFXCLK_BIT             7
 40#define FEATURE_DS_SOCCLK_BIT             8
 41#define FEATURE_DS_LCLK_BIT               9
 42#define FEATURE_CORE_CSTATES_BIT          10
 43#define FEATURE_G6_SSC_BIT                11 //G6 memory UCLK and UCLK_DIV SS
 44#define FEATURE_RM_BIT                    12
 45#define FEATURE_SOC_DPM_BIT               13
 46#define FEATURE_DS_SMNCLK_BIT             14
 47#define FEATURE_DS_MP1CLK_BIT             15
 48#define FEATURE_DS_MP0CLK_BIT             16
 49#define FEATURE_MGCG_BIT                  17
 50#define FEATURE_DS_FUSE_SRAM_BIT          18
 51#define FEATURE_GFX_CKS_BIT               19
 52#define FEATURE_FP_THROTTLING_BIT         20
 53#define FEATURE_PROCHOT_BIT               21
 54#define FEATURE_CPUOFF_BIT                22
 55#define FEATURE_UMC_THROTTLE_BIT          23
 56#define FEATURE_DF_THROTTLE_BIT           24
 57#define FEATURE_DS_MP3CLK_BIT             25
 58#define FEATURE_DS_SHUBCLK_BIT            26
 59#define FEATURE_TDC_BIT                   27 //Legacy APM_BIT
 60#define FEATURE_UMC_CAL_SHARING_BIT       28
 61#define FEATURE_DFLL_BTC_CALIBRATION_BIT  29
 62#define FEATURE_EDC_BIT                   30
 63#define FEATURE_DLDO_BIT                  31
 64#define FEATURE_MEAS_DRAM_BLACKOUT_BIT    32
 65#define FEATURE_CC1_BIT                   33
 66#define FEATURE_PPT_BIT                   34
 67#define FEATURE_STAPM_BIT                 35
 68#define FEATURE_CSTATE_BOOST_BIT          36
 69#define FEATURE_SPARE_37_BIT              37
 70#define FEATURE_SPARE_38_BIT              38
 71#define FEATURE_SPARE_39_BIT              39
 72#define FEATURE_SPARE_40_BIT              40
 73#define FEATURE_SPARE_41_BIT              41
 74#define FEATURE_SPARE_42_BIT              42
 75#define FEATURE_SPARE_43_BIT              43
 76#define FEATURE_SPARE_44_BIT              44
 77#define FEATURE_SPARE_45_BIT              45
 78#define FEATURE_SPARE_46_BIT              46
 79#define FEATURE_SPARE_47_BIT              47
 80#define FEATURE_SPARE_48_BIT              48
 81#define FEATURE_SPARE_49_BIT              49
 82#define FEATURE_SPARE_50_BIT              50
 83#define FEATURE_SPARE_51_BIT              51
 84#define FEATURE_SPARE_52_BIT              52
 85#define FEATURE_SPARE_53_BIT              53
 86#define FEATURE_SPARE_54_BIT              54
 87#define FEATURE_SPARE_55_BIT              55
 88#define FEATURE_SPARE_56_BIT              56
 89#define FEATURE_SPARE_57_BIT              57
 90#define FEATURE_SPARE_58_BIT              58
 91#define FEATURE_SPARE_59_BIT              59
 92#define FEATURE_SPARE_60_BIT              60
 93#define FEATURE_SPARE_61_BIT              61
 94#define FEATURE_SPARE_62_BIT              62
 95#define FEATURE_SPARE_63_BIT              63
 96
 97#define NUM_FEATURES                      64
 98
 99#define FEATURE_CCLK_CONTROLLER_MASK  (1 << FEATURE_CCLK_CONTROLLER_BIT)
100#define FEATURE_DATA_CALCULATION_MASK (1 << FEATURE_DATA_CALCULATION_BIT)
101#define FEATURE_THERMAL_MASK          (1 << FEATURE_THERMAL_BIT)
102#define FEATURE_PLL_POWER_DOWN_MASK   (1 << FEATURE_PLL_POWER_DOWN_BIT)
103#define FEATURE_FCLK_DPM_MASK         (1 << FEATURE_FCLK_DPM_BIT)
104#define FEATURE_GFX_DPM_MASK          (1 << FEATURE_GFX_DPM_BIT)
105#define FEATURE_DS_GFXCLK_MASK        (1 << FEATURE_DS_GFXCLK_BIT)
106#define FEATURE_DS_SOCCLK_MASK        (1 << FEATURE_DS_SOCCLK_BIT)
107#define FEATURE_DS_LCLK_MASK          (1 << FEATURE_DS_LCLK_BIT)
108#define FEATURE_RM_MASK               (1 << FEATURE_RM_BIT)
109#define FEATURE_DS_SMNCLK_MASK        (1 << FEATURE_DS_SMNCLK_BIT)
110#define FEATURE_DS_MP1CLK_MASK        (1 << FEATURE_DS_MP1CLK_BIT)
111#define FEATURE_DS_MP0CLK_MASK        (1 << FEATURE_DS_MP0CLK_BIT)
112#define FEATURE_MGCG_MASK             (1 << FEATURE_MGCG_BIT)
113#define FEATURE_DS_FUSE_SRAM_MASK     (1 << FEATURE_DS_FUSE_SRAM_BIT)
114#define FEATURE_PROCHOT_MASK          (1 << FEATURE_PROCHOT_BIT)
115#define FEATURE_CPUOFF_MASK           (1 << FEATURE_CPUOFF_BIT)
116#define FEATURE_GFX_CKS_MASK          (1 << FEATURE_GFX_CKS_BIT)
117#define FEATURE_UMC_THROTTLE_MASK     (1 << FEATURE_UMC_THROTTLE_BIT)
118#define FEATURE_DF_THROTTLE_MASK      (1 << FEATURE_DF_THROTTLE_BIT)
119#define FEATURE_SOC_DPM_MASK          (1 << FEATURE_SOC_DPM_BIT)
120
121typedef struct {
122	// MP1_EXT_SCRATCH0
123	uint32_t SPARE1            : 4;
124	uint32_t SPARE2            : 4;
125	uint32_t SPARE3            : 4;
126	uint32_t CurrLevel_LCLK    : 4;
127	uint32_t CurrLevel_MP0CLK  : 4;
128	uint32_t CurrLevel_FCLK    : 4;
129	uint32_t CurrLevel_SOCCLK  : 4;
130	uint32_t CurrLevel_DCEFCLK : 4;
131	// MP1_EXT_SCRATCH1
132	uint32_t SPARE4            : 4;
133	uint32_t SPARE5            : 4;
134	uint32_t SPARE6            : 4;
135	uint32_t TargLevel_LCLK    : 4;
136	uint32_t TargLevel_MP0CLK  : 4;
137	uint32_t TargLevel_FCLK    : 4;
138	uint32_t TargLevel_SOCCLK  : 4;
139	uint32_t TargLevel_DCEFCLK : 4;
140	// MP1_EXT_SCRATCH2
141	uint32_t CurrLevel_SHUBCLK  : 4;
142	uint32_t TargLevel_SHUBCLK  : 4;
143	uint32_t Reserved          : 24;
144	// MP1_EXT_SCRATCH3-4
145	uint32_t Reserved2[2];
146	// MP1_EXT_SCRATCH5
147	uint32_t FeatureStatus[NUM_FEATURES / 32];
148} FwStatus_t;
149
150#pragma pack(pop)
151
152#endif