FILE
mp_13_0_8_offset.h
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linux-6.19.14/drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_8_offset.h
1/* 2 * Copyright 2022 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 25#ifndef _mp_13_0_8_OFFSET_HEADER 26#define _mp_13_0_8_OFFSET_HEADER 27 28 29 30// addressBlock: mp_SmuMp0_SmnDec 31// base address: 0x0 32#define regMP0_SMN_C2PMSG_32 0x0060 33#define regMP0_SMN_C2PMSG_32_BASE_IDX 0 34#define regMP0_SMN_C2PMSG_33 0x0061 35#define regMP0_SMN_C2PMSG_33_BASE_IDX 0 36#define regMP0_SMN_C2PMSG_34 0x0062 37#define regMP0_SMN_C2PMSG_34_BASE_IDX 0 38#define regMP0_SMN_C2PMSG_35 0x0063 39#define regMP0_SMN_C2PMSG_35_BASE_IDX 0 40#define regMP0_SMN_C2PMSG_36 0x0064 41#define regMP0_SMN_C2PMSG_36_BASE_IDX 0 42#define regMP0_SMN_C2PMSG_37 0x0065 43#define regMP0_SMN_C2PMSG_37_BASE_IDX 0 44#define regMP0_SMN_C2PMSG_38 0x0066 45#define regMP0_SMN_C2PMSG_38_BASE_IDX 0 46#define regMP0_SMN_C2PMSG_39 0x0067 47#define regMP0_SMN_C2PMSG_39_BASE_IDX 0 48#define regMP0_SMN_C2PMSG_40 0x0068 49#define regMP0_SMN_C2PMSG_40_BASE_IDX 0 50#define regMP0_SMN_C2PMSG_41 0x0069 51#define regMP0_SMN_C2PMSG_41_BASE_IDX 0 52#define regMP0_SMN_C2PMSG_42 0x006a 53#define regMP0_SMN_C2PMSG_42_BASE_IDX 0 54#define regMP0_SMN_C2PMSG_43 0x006b 55#define regMP0_SMN_C2PMSG_43_BASE_IDX 0 56#define regMP0_SMN_C2PMSG_44 0x006c 57#define regMP0_SMN_C2PMSG_44_BASE_IDX 0 58#define regMP0_SMN_C2PMSG_45 0x006d 59#define regMP0_SMN_C2PMSG_45_BASE_IDX 0 60#define regMP0_SMN_C2PMSG_46 0x006e 61#define regMP0_SMN_C2PMSG_46_BASE_IDX 0 62#define regMP0_SMN_C2PMSG_47 0x006f 63#define regMP0_SMN_C2PMSG_47_BASE_IDX 0 64#define regMP0_SMN_C2PMSG_48 0x0070 65#define regMP0_SMN_C2PMSG_48_BASE_IDX 0 66#define regMP0_SMN_C2PMSG_49 0x0071 67#define regMP0_SMN_C2PMSG_49_BASE_IDX 0 68#define regMP0_SMN_C2PMSG_50 0x0072 69#define regMP0_SMN_C2PMSG_50_BASE_IDX 0 70#define regMP0_SMN_C2PMSG_51 0x0073 71#define regMP0_SMN_C2PMSG_51_BASE_IDX 0 72#define regMP0_SMN_C2PMSG_52 0x0074 73#define regMP0_SMN_C2PMSG_52_BASE_IDX 0 74#define regMP0_SMN_C2PMSG_53 0x0075 75#define regMP0_SMN_C2PMSG_53_BASE_IDX 0 76#define regMP0_SMN_C2PMSG_54 0x0076 77#define regMP0_SMN_C2PMSG_54_BASE_IDX 0 78#define regMP0_SMN_C2PMSG_55 0x0077 79#define regMP0_SMN_C2PMSG_55_BASE_IDX 0 80#define regMP0_SMN_C2PMSG_56 0x0078 81#define regMP0_SMN_C2PMSG_56_BASE_IDX 0 82#define regMP0_SMN_C2PMSG_57 0x0079 83#define regMP0_SMN_C2PMSG_57_BASE_IDX 0 84#define regMP0_SMN_C2PMSG_58 0x007a 85#define regMP0_SMN_C2PMSG_58_BASE_IDX 0 86#define regMP0_SMN_C2PMSG_59 0x007b 87#define regMP0_SMN_C2PMSG_59_BASE_IDX 0 88#define regMP0_SMN_C2PMSG_60 0x007c 89#define regMP0_SMN_C2PMSG_60_BASE_IDX 0 90#define regMP0_SMN_C2PMSG_61 0x007d 91#define regMP0_SMN_C2PMSG_61_BASE_IDX 0 92#define regMP0_SMN_C2PMSG_62 0x007e 93#define regMP0_SMN_C2PMSG_62_BASE_IDX 0 94#define regMP0_SMN_C2PMSG_63 0x007f 95#define regMP0_SMN_C2PMSG_63_BASE_IDX 0 96#define regMP0_SMN_C2PMSG_64 0x0080 97#define regMP0_SMN_C2PMSG_64_BASE_IDX 0 98#define regMP0_SMN_C2PMSG_65 0x0081 99#define regMP0_SMN_C2PMSG_65_BASE_IDX 0 100#define regMP0_SMN_C2PMSG_66 0x0082 101#define regMP0_SMN_C2PMSG_66_BASE_IDX 0 102#define regMP0_SMN_C2PMSG_67 0x0083 103#define regMP0_SMN_C2PMSG_67_BASE_IDX 0 104#define regMP0_SMN_C2PMSG_68 0x0084 105#define regMP0_SMN_C2PMSG_68_BASE_IDX 0 106#define regMP0_SMN_C2PMSG_69 0x0085 107#define regMP0_SMN_C2PMSG_69_BASE_IDX 0 108#define regMP0_SMN_C2PMSG_70 0x0086 109#define regMP0_SMN_C2PMSG_70_BASE_IDX 0 110#define regMP0_SMN_C2PMSG_71 0x0087 111#define regMP0_SMN_C2PMSG_71_BASE_IDX 0 112#define regMP0_SMN_C2PMSG_72 0x0088 113#define regMP0_SMN_C2PMSG_72_BASE_IDX 0 114#define regMP0_SMN_C2PMSG_73 0x0089 115#define regMP0_SMN_C2PMSG_73_BASE_IDX 0 116#define regMP0_SMN_C2PMSG_74 0x008a 117#define regMP0_SMN_C2PMSG_74_BASE_IDX 0 118#define regMP0_SMN_C2PMSG_75 0x008b 119#define regMP0_SMN_C2PMSG_75_BASE_IDX 0 120#define regMP0_SMN_C2PMSG_76 0x008c 121#define regMP0_SMN_C2PMSG_76_BASE_IDX 0 122#define regMP0_SMN_C2PMSG_77 0x008d 123#define regMP0_SMN_C2PMSG_77_BASE_IDX 0 124#define regMP0_SMN_C2PMSG_78 0x008e 125#define regMP0_SMN_C2PMSG_78_BASE_IDX 0 126#define regMP0_SMN_C2PMSG_79 0x008f 127#define regMP0_SMN_C2PMSG_79_BASE_IDX 0 128#define regMP0_SMN_C2PMSG_80 0x0090 129#define regMP0_SMN_C2PMSG_80_BASE_IDX 0 130#define regMP0_SMN_C2PMSG_81 0x0091 131#define regMP0_SMN_C2PMSG_81_BASE_IDX 0 132#define regMP0_SMN_C2PMSG_82 0x0092 133#define regMP0_SMN_C2PMSG_82_BASE_IDX 0 134#define regMP0_SMN_C2PMSG_83 0x0093 135#define regMP0_SMN_C2PMSG_83_BASE_IDX 0 136#define regMP0_SMN_C2PMSG_84 0x0094 137#define regMP0_SMN_C2PMSG_84_BASE_IDX 0 138#define regMP0_SMN_C2PMSG_85 0x0095 139#define regMP0_SMN_C2PMSG_85_BASE_IDX 0 140#define regMP0_SMN_C2PMSG_86 0x0096 141#define regMP0_SMN_C2PMSG_86_BASE_IDX 0 142#define regMP0_SMN_C2PMSG_87 0x0097 143#define regMP0_SMN_C2PMSG_87_BASE_IDX 0 144#define regMP0_SMN_C2PMSG_88 0x0098 145#define regMP0_SMN_C2PMSG_88_BASE_IDX 0 146#define regMP0_SMN_C2PMSG_89 0x0099 147#define regMP0_SMN_C2PMSG_89_BASE_IDX 0 148#define regMP0_SMN_C2PMSG_90 0x009a 149#define regMP0_SMN_C2PMSG_90_BASE_IDX 0 150#define regMP0_SMN_C2PMSG_91 0x009b 151#define regMP0_SMN_C2PMSG_91_BASE_IDX 0 152#define regMP0_SMN_C2PMSG_92 0x009c 153#define regMP0_SMN_C2PMSG_92_BASE_IDX 0 154#define regMP0_SMN_C2PMSG_93 0x009d 155#define regMP0_SMN_C2PMSG_93_BASE_IDX 0 156#define regMP0_SMN_C2PMSG_94 0x009e 157#define regMP0_SMN_C2PMSG_94_BASE_IDX 0 158#define regMP0_SMN_C2PMSG_95 0x009f 159#define regMP0_SMN_C2PMSG_95_BASE_IDX 0 160#define regMP0_SMN_C2PMSG_96 0x00a0 161#define regMP0_SMN_C2PMSG_96_BASE_IDX 0 162#define regMP0_SMN_C2PMSG_97 0x00a1 163#define regMP0_SMN_C2PMSG_97_BASE_IDX 0 164#define regMP0_SMN_C2PMSG_98 0x00a2 165#define regMP0_SMN_C2PMSG_98_BASE_IDX 0 166#define regMP0_SMN_C2PMSG_99 0x00a3 167#define regMP0_SMN_C2PMSG_99_BASE_IDX 0 168#define regMP0_SMN_C2PMSG_100 0x00a4 169#define regMP0_SMN_C2PMSG_100_BASE_IDX 0 170#define regMP0_SMN_C2PMSG_101 0x00a5 171#define regMP0_SMN_C2PMSG_101_BASE_IDX 0 172#define regMP0_SMN_C2PMSG_102 0x00a6 173#define regMP0_SMN_C2PMSG_102_BASE_IDX 0 174#define regMP0_SMN_C2PMSG_103 0x00a7 175#define regMP0_SMN_C2PMSG_103_BASE_IDX 0 176#define regMP0_SMN_IH_CREDIT 0x00c1 177#define regMP0_SMN_IH_CREDIT_BASE_IDX 0 178#define regMP0_SMN_IH_SW_INT 0x00c2 179#define regMP0_SMN_IH_SW_INT_BASE_IDX 0 180#define regMP0_SMN_IH_SW_INT_CTRL 0x00c3 181#define regMP0_SMN_IH_SW_INT_CTRL_BASE_IDX 0 182 183 184// addressBlock: mp_SmuMp1_SmnDec 185// base address: 0x0 186#define regMP1_SMN_C2PMSG_32 0x0260 187#define regMP1_SMN_C2PMSG_32_BASE_IDX 0 188#define regMP1_SMN_C2PMSG_33 0x0261 189#define regMP1_SMN_C2PMSG_33_BASE_IDX 0 190#define regMP1_SMN_C2PMSG_34 0x0262 191#define regMP1_SMN_C2PMSG_34_BASE_IDX 0 192#define regMP1_SMN_C2PMSG_35 0x0263 193#define regMP1_SMN_C2PMSG_35_BASE_IDX 0 194#define regMP1_SMN_C2PMSG_36 0x0264 195#define regMP1_SMN_C2PMSG_36_BASE_IDX 0 196#define regMP1_SMN_C2PMSG_37 0x0265 197#define regMP1_SMN_C2PMSG_37_BASE_IDX 0 198#define regMP1_SMN_C2PMSG_38 0x0266 199#define regMP1_SMN_C2PMSG_38_BASE_IDX 0 200#define regMP1_SMN_C2PMSG_39 0x0267 201#define regMP1_SMN_C2PMSG_39_BASE_IDX 0 202#define regMP1_SMN_C2PMSG_40 0x0268 203#define regMP1_SMN_C2PMSG_40_BASE_IDX 0 204#define regMP1_SMN_C2PMSG_41 0x0269 205#define regMP1_SMN_C2PMSG_41_BASE_IDX 0 206#define regMP1_SMN_C2PMSG_42 0x026a 207#define regMP1_SMN_C2PMSG_42_BASE_IDX 0 208#define regMP1_SMN_C2PMSG_43 0x026b 209#define regMP1_SMN_C2PMSG_43_BASE_IDX 0 210#define regMP1_SMN_C2PMSG_44 0x026c 211#define regMP1_SMN_C2PMSG_44_BASE_IDX 0 212#define regMP1_SMN_C2PMSG_45 0x026d 213#define regMP1_SMN_C2PMSG_45_BASE_IDX 0 214#define regMP1_SMN_C2PMSG_46 0x026e 215#define regMP1_SMN_C2PMSG_46_BASE_IDX 0 216#define regMP1_SMN_C2PMSG_47 0x026f 217#define regMP1_SMN_C2PMSG_47_BASE_IDX 0 218#define regMP1_SMN_C2PMSG_48 0x0270 219#define regMP1_SMN_C2PMSG_48_BASE_IDX 0 220#define regMP1_SMN_C2PMSG_49 0x0271 221#define regMP1_SMN_C2PMSG_49_BASE_IDX 0 222#define regMP1_SMN_C2PMSG_50 0x0272 223#define regMP1_SMN_C2PMSG_50_BASE_IDX 0 224#define regMP1_SMN_C2PMSG_51 0x0273 225#define regMP1_SMN_C2PMSG_51_BASE_IDX 0 226#define regMP1_SMN_C2PMSG_52 0x0274 227#define regMP1_SMN_C2PMSG_52_BASE_IDX 0 228#define regMP1_SMN_C2PMSG_53 0x0275 229#define regMP1_SMN_C2PMSG_53_BASE_IDX 0 230#define regMP1_SMN_C2PMSG_54 0x0276 231#define regMP1_SMN_C2PMSG_54_BASE_IDX 0 232#define regMP1_SMN_C2PMSG_55 0x0277 233#define regMP1_SMN_C2PMSG_55_BASE_IDX 0 234#define regMP1_SMN_C2PMSG_56 0x0278 235#define regMP1_SMN_C2PMSG_56_BASE_IDX 0 236#define regMP1_SMN_C2PMSG_57 0x0279 237#define regMP1_SMN_C2PMSG_57_BASE_IDX 0 238#define regMP1_SMN_C2PMSG_58 0x027a 239#define regMP1_SMN_C2PMSG_58_BASE_IDX 0 240#define regMP1_SMN_C2PMSG_59 0x027b 241#define regMP1_SMN_C2PMSG_59_BASE_IDX 0 242#define regMP1_SMN_C2PMSG_60 0x027c 243#define regMP1_SMN_C2PMSG_60_BASE_IDX 0 244#define regMP1_SMN_C2PMSG_61 0x027d 245#define regMP1_SMN_C2PMSG_61_BASE_IDX 0 246#define regMP1_SMN_C2PMSG_62 0x027e 247#define regMP1_SMN_C2PMSG_62_BASE_IDX 0 248#define regMP1_SMN_C2PMSG_63 0x027f 249#define regMP1_SMN_C2PMSG_63_BASE_IDX 0 250#define regMP1_SMN_C2PMSG_64 0x0280 251#define regMP1_SMN_C2PMSG_64_BASE_IDX 0 252#define regMP1_SMN_C2PMSG_65 0x0281 253#define regMP1_SMN_C2PMSG_65_BASE_IDX 0 254#define regMP1_SMN_C2PMSG_66 0x0282 255#define regMP1_SMN_C2PMSG_66_BASE_IDX 0 256#define regMP1_SMN_C2PMSG_67 0x0283 257#define regMP1_SMN_C2PMSG_67_BASE_IDX 0 258#define regMP1_SMN_C2PMSG_68 0x0284 259#define regMP1_SMN_C2PMSG_68_BASE_IDX 0 260#define regMP1_SMN_C2PMSG_69 0x0285 261#define regMP1_SMN_C2PMSG_69_BASE_IDX 0 262#define regMP1_SMN_C2PMSG_70 0x0286 263#define regMP1_SMN_C2PMSG_70_BASE_IDX 0 264#define regMP1_SMN_C2PMSG_71 0x0287 265#define regMP1_SMN_C2PMSG_71_BASE_IDX 0 266#define regMP1_SMN_C2PMSG_72 0x0288 267#define regMP1_SMN_C2PMSG_72_BASE_IDX 0 268#define regMP1_SMN_C2PMSG_73 0x0289 269#define regMP1_SMN_C2PMSG_73_BASE_IDX 0 270#define regMP1_SMN_C2PMSG_74 0x028a 271#define regMP1_SMN_C2PMSG_74_BASE_IDX 0 272#define regMP1_SMN_C2PMSG_75 0x028b 273#define regMP1_SMN_C2PMSG_75_BASE_IDX 0 274#define regMP1_SMN_C2PMSG_76 0x028c 275#define regMP1_SMN_C2PMSG_76_BASE_IDX 0 276#define regMP1_SMN_C2PMSG_77 0x028d 277#define regMP1_SMN_C2PMSG_77_BASE_IDX 0 278#define regMP1_SMN_C2PMSG_78 0x028e 279#define regMP1_SMN_C2PMSG_78_BASE_IDX 0 280#define regMP1_SMN_C2PMSG_79 0x028f 281#define regMP1_SMN_C2PMSG_79_BASE_IDX 0 282#define regMP1_SMN_C2PMSG_80 0x0290 283#define regMP1_SMN_C2PMSG_80_BASE_IDX 0 284#define regMP1_SMN_C2PMSG_81 0x0291 285#define regMP1_SMN_C2PMSG_81_BASE_IDX 0 286#define regMP1_SMN_C2PMSG_82 0x0292 287#define regMP1_SMN_C2PMSG_82_BASE_IDX 0 288#define regMP1_SMN_C2PMSG_83 0x0293 289#define regMP1_SMN_C2PMSG_83_BASE_IDX 0 290#define regMP1_SMN_C2PMSG_84 0x0294 291#define regMP1_SMN_C2PMSG_84_BASE_IDX 0 292#define regMP1_SMN_C2PMSG_85 0x0295 293#define regMP1_SMN_C2PMSG_85_BASE_IDX 0 294#define regMP1_SMN_C2PMSG_86 0x0296 295#define regMP1_SMN_C2PMSG_86_BASE_IDX 0 296#define regMP1_SMN_C2PMSG_87 0x0297 297#define regMP1_SMN_C2PMSG_87_BASE_IDX 0 298#define regMP1_SMN_C2PMSG_88 0x0298 299#define regMP1_SMN_C2PMSG_88_BASE_IDX 0 300#define regMP1_SMN_C2PMSG_89 0x0299 301#define regMP1_SMN_C2PMSG_89_BASE_IDX 0 302#define regMP1_SMN_C2PMSG_90 0x029a 303#define regMP1_SMN_C2PMSG_90_BASE_IDX 0 304#define regMP1_SMN_C2PMSG_91 0x029b 305#define regMP1_SMN_C2PMSG_91_BASE_IDX 0 306#define regMP1_SMN_C2PMSG_92 0x029c 307#define regMP1_SMN_C2PMSG_92_BASE_IDX 0 308#define regMP1_SMN_C2PMSG_93 0x029d 309#define regMP1_SMN_C2PMSG_93_BASE_IDX 0 310#define regMP1_SMN_C2PMSG_94 0x029e 311#define regMP1_SMN_C2PMSG_94_BASE_IDX 0 312#define regMP1_SMN_C2PMSG_95 0x029f 313#define regMP1_SMN_C2PMSG_95_BASE_IDX 0 314#define regMP1_SMN_C2PMSG_96 0x02a0 315#define regMP1_SMN_C2PMSG_96_BASE_IDX 0 316#define regMP1_SMN_C2PMSG_97 0x02a1 317#define regMP1_SMN_C2PMSG_97_BASE_IDX 0 318#define regMP1_SMN_C2PMSG_98 0x02a2 319#define regMP1_SMN_C2PMSG_98_BASE_IDX 0 320#define regMP1_SMN_C2PMSG_99 0x02a3 321#define regMP1_SMN_C2PMSG_99_BASE_IDX 0 322#define regMP1_SMN_C2PMSG_100 0x02a4 323#define regMP1_SMN_C2PMSG_100_BASE_IDX 0 324#define regMP1_SMN_C2PMSG_101 0x02a5 325#define regMP1_SMN_C2PMSG_101_BASE_IDX 0 326#define regMP1_SMN_C2PMSG_102 0x02a6 327#define regMP1_SMN_C2PMSG_102_BASE_IDX 0 328#define regMP1_SMN_C2PMSG_103 0x02a7 329#define regMP1_SMN_C2PMSG_103_BASE_IDX 0 330#define regMP1_SMN_C2PMSG_104 0x02a8 331#define regMP1_SMN_C2PMSG_104_BASE_IDX 0 332#define regMP1_SMN_C2PMSG_105 0x02a9 333#define regMP1_SMN_C2PMSG_105_BASE_IDX 0 334#define regMP1_SMN_C2PMSG_106 0x02aa 335#define regMP1_SMN_C2PMSG_106_BASE_IDX 0 336#define regMP1_SMN_C2PMSG_107 0x02ab 337#define regMP1_SMN_C2PMSG_107_BASE_IDX 0 338#define regMP1_SMN_C2PMSG_108 0x02ac 339#define regMP1_SMN_C2PMSG_108_BASE_IDX 0 340#define regMP1_SMN_C2PMSG_109 0x02ad 341#define regMP1_SMN_C2PMSG_109_BASE_IDX 0 342#define regMP1_SMN_C2PMSG_110 0x02ae 343#define regMP1_SMN_C2PMSG_110_BASE_IDX 0 344#define regMP1_SMN_C2PMSG_111 0x02af 345#define regMP1_SMN_C2PMSG_111_BASE_IDX 0 346#define regMP1_SMN_C2PMSG_112 0x02b0 347#define regMP1_SMN_C2PMSG_112_BASE_IDX 0 348#define regMP1_SMN_C2PMSG_113 0x02b1 349#define regMP1_SMN_C2PMSG_113_BASE_IDX 0 350#define regMP1_SMN_C2PMSG_114 0x02b2 351#define regMP1_SMN_C2PMSG_114_BASE_IDX 0 352#define regMP1_SMN_C2PMSG_115 0x02b3 353#define regMP1_SMN_C2PMSG_115_BASE_IDX 0 354#define regMP1_SMN_C2PMSG_116 0x02b4 355#define regMP1_SMN_C2PMSG_116_BASE_IDX 0 356#define regMP1_SMN_C2PMSG_117 0x02b5 357#define regMP1_SMN_C2PMSG_117_BASE_IDX 0 358#define regMP1_SMN_C2PMSG_118 0x02b6 359#define regMP1_SMN_C2PMSG_118_BASE_IDX 0 360#define regMP1_SMN_C2PMSG_119 0x02b7 361#define regMP1_SMN_C2PMSG_119_BASE_IDX 0 362#define regMP1_SMN_C2PMSG_120 0x02b8 363#define regMP1_SMN_C2PMSG_120_BASE_IDX 0 364#define regMP1_SMN_C2PMSG_121 0x02b9 365#define regMP1_SMN_C2PMSG_121_BASE_IDX 0 366#define regMP1_SMN_C2PMSG_122 0x02ba 367#define regMP1_SMN_C2PMSG_122_BASE_IDX 0 368#define regMP1_SMN_C2PMSG_123 0x02bb 369#define regMP1_SMN_C2PMSG_123_BASE_IDX 0 370#define regMP1_SMN_C2PMSG_124 0x02bc 371#define regMP1_SMN_C2PMSG_124_BASE_IDX 0 372#define regMP1_SMN_C2PMSG_125 0x02bd 373#define regMP1_SMN_C2PMSG_125_BASE_IDX 0 374#define regMP1_SMN_C2PMSG_126 0x02be 375#define regMP1_SMN_C2PMSG_126_BASE_IDX 0 376#define regMP1_SMN_C2PMSG_127 0x02bf 377#define regMP1_SMN_C2PMSG_127_BASE_IDX 0 378#define regMP1_SMN_IH_CREDIT 0x02c1 379#define regMP1_SMN_IH_CREDIT_BASE_IDX 0 380#define regMP1_SMN_IH_SW_INT 0x02c2 381#define regMP1_SMN_IH_SW_INT_BASE_IDX 0 382#define regMP1_SMN_IH_SW_INT_CTRL 0x02c3 383#define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0 384#define regMP1_SMN_FPS_CNT 0x02c4 385#define regMP1_SMN_FPS_CNT_BASE_IDX 0 386#define regMP1_SMN_EXT_SCRATCH0 0x0340 387#define regMP1_SMN_EXT_SCRATCH0_BASE_IDX 0 388#define regMP1_SMN_EXT_SCRATCH1 0x0341 389#define regMP1_SMN_EXT_SCRATCH1_BASE_IDX 0 390#define regMP1_SMN_EXT_SCRATCH2 0x0342 391#define regMP1_SMN_EXT_SCRATCH2_BASE_IDX 0 392#define regMP1_SMN_EXT_SCRATCH3 0x0343 393#define regMP1_SMN_EXT_SCRATCH3_BASE_IDX 0 394#define regMP1_SMN_EXT_SCRATCH4 0x0344 395#define regMP1_SMN_EXT_SCRATCH4_BASE_IDX 0 396#define regMP1_SMN_EXT_SCRATCH5 0x0345 397#define regMP1_SMN_EXT_SCRATCH5_BASE_IDX 0 398#define regMP1_SMN_EXT_SCRATCH6 0x0346 399#define regMP1_SMN_EXT_SCRATCH6_BASE_IDX 0 400#define regMP1_SMN_EXT_SCRATCH7 0x0347 401#define regMP1_SMN_EXT_SCRATCH7_BASE_IDX 0 402 403 404// addressBlock: mp_SmuMp1Pub_CruDec 405// base address: 0x0 406#define regMP1_FIRMWARE_FLAGS 0xbee009 407#define regMP1_FIRMWARE_FLAGS_BASE_IDX 0 408 409 410#endif
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