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mmhub_2_3_0_default.h
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linux-6.19.14/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_2_3_0_default.h
1/* 2 * Copyright (C) 2020 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 */ 21#ifndef _mmhub_2_3_0_DEFAULT_HEADER 22#define _mmhub_2_3_0_DEFAULT_HEADER 23 24 25// addressBlock: mmhub_dagbdec 26#define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9 27#define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9 28#define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9 29#define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9 30#define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9 31#define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9 32#define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9 33#define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9 34#define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9 35#define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9 36#define mmDAGB0_RDCLI10_DEFAULT 0xfe5fe0f9 37#define mmDAGB0_RDCLI11_DEFAULT 0xfe5fe0f9 38#define mmDAGB0_RDCLI12_DEFAULT 0xfe5fe0f9 39#define mmDAGB0_RDCLI13_DEFAULT 0xfe5fe0f9 40#define mmDAGB0_RDCLI14_DEFAULT 0xfe5fe0f9 41#define mmDAGB0_RDCLI15_DEFAULT 0xfe5fe0f9 42#define mmDAGB0_RDCLI16_DEFAULT 0xfe5fe0f9 43#define mmDAGB0_RDCLI17_DEFAULT 0xfe5fe0f9 44#define mmDAGB0_RDCLI18_DEFAULT 0xfe5fe0f9 45#define mmDAGB0_RDCLI19_DEFAULT 0xfe5fe0f9 46#define mmDAGB0_RDCLI20_DEFAULT 0xfe5fe0f9 47#define mmDAGB0_RDCLI21_DEFAULT 0xfe5fe0f9 48#define mmDAGB0_RDCLI22_DEFAULT 0xfe5fe0f9 49#define mmDAGB0_RDCLI23_DEFAULT 0xfe5fe0f9 50#define mmDAGB0_RDCLI24_DEFAULT 0xfe5fe0f9 51#define mmDAGB0_RDCLI25_DEFAULT 0xfe5fe0f9 52#define mmDAGB0_RDCLI26_DEFAULT 0xfe5fe0f9 53#define mmDAGB0_RDCLI27_DEFAULT 0xfe5fe0f9 54#define mmDAGB0_RDCLI28_DEFAULT 0xfe5fe0f9 55#define mmDAGB0_RDCLI29_DEFAULT 0xfe5fe0f9 56#define mmDAGB0_RDCLI30_DEFAULT 0xfe5fe0f9 57#define mmDAGB0_RD_CNTL_DEFAULT 0x03527df8 58#define mmDAGB0_RD_GMI_CNTL_DEFAULT 0x00003046 59#define mmDAGB0_RD_ADDR_DAGB_DEFAULT 0x00002039 60#define mmDAGB0_RD_OUTPUT_DAGB_MAX_BURST_DEFAULT 0x88888888 61#define mmDAGB0_RD_OUTPUT_DAGB_LAZY_TIMER_DEFAULT 0x11111111 62#define mmDAGB0_RD_CGTT_CLK_CTRL_DEFAULT 0x08000100 63#define mmDAGB0_L1TLB_RD_CGTT_CLK_CTRL_DEFAULT 0x08000100 64#define mmDAGB0_ATCVM_RD_CGTT_CLK_CTRL_DEFAULT 0x08000100 65#define mmDAGB0_RD_ADDR_DAGB_MAX_BURST0_DEFAULT 0x88888888 66#define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER0_DEFAULT 0x11111111 67#define mmDAGB0_RD_ADDR_DAGB_MAX_BURST1_DEFAULT 0x88888888 68#define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER1_DEFAULT 0x11111111 69#define mmDAGB0_RD_ADDR_DAGB_MAX_BURST2_DEFAULT 0x88888888 70#define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER2_DEFAULT 0x11111111 71#define mmDAGB0_RD_ADDR_DAGB_MAX_BURST3_DEFAULT 0x88888888 72#define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER3_DEFAULT 0x11111111 73#define mmDAGB0_RD_VC0_CNTL_DEFAULT 0xff2ff082 74#define mmDAGB0_RD_VC1_CNTL_DEFAULT 0xff2ff082 75#define mmDAGB0_RD_VC2_CNTL_DEFAULT 0xff2ff082 76#define mmDAGB0_RD_VC3_CNTL_DEFAULT 0xff2ff082 77#define mmDAGB0_RD_VC4_CNTL_DEFAULT 0xff2ff082 78#define mmDAGB0_RD_VC5_CNTL_DEFAULT 0xff2ff082 79#define mmDAGB0_RD_VC6_CNTL_DEFAULT 0xff2ff082 80#define mmDAGB0_RD_VC7_CNTL_DEFAULT 0xff2ff082 81#define mmDAGB0_RD_CNTL_MISC_DEFAULT 0x01a0e408 82#define mmDAGB0_RD_TLB_CREDIT_DEFAULT 0x2f7bdef7 83#define mmDAGB0_RD_RDRET_CREDIT_CNTL_DEFAULT 0xc1041041 84#define mmDAGB0_RD_RDRET_CREDIT_CNTL2_DEFAULT 0x0000001a 85#define mmDAGB0_RDCLI_ASK_PENDING_DEFAULT 0x00000000 86#define mmDAGB0_RDCLI_GO_PENDING_DEFAULT 0x00000000 87#define mmDAGB0_RDCLI_GBLSEND_PENDING_DEFAULT 0x00000000 88#define mmDAGB0_RDCLI_TLB_PENDING_DEFAULT 0x00000000 89#define mmDAGB0_RDCLI_OARB_PENDING_DEFAULT 0x00000000 90#define mmDAGB0_RDCLI_OSD_PENDING_DEFAULT 0x00000000 91#define mmDAGB0_WRCLI0_DEFAULT 0xfe5fe0f9 92#define mmDAGB0_WRCLI1_DEFAULT 0xfe5fe0f9 93#define mmDAGB0_WRCLI2_DEFAULT 0xfe5fe0f9 94#define mmDAGB0_WRCLI3_DEFAULT 0xfe5fe0f9 95#define mmDAGB0_WRCLI4_DEFAULT 0xfe5fe0f9 96#define mmDAGB0_WRCLI5_DEFAULT 0xfe5fe0f9 97#define mmDAGB0_WRCLI6_DEFAULT 0xfe5fe0f9 98#define mmDAGB0_WRCLI7_DEFAULT 0xfe5fe0f9 99#define mmDAGB0_WRCLI8_DEFAULT 0xfe5fe0f9 100#define mmDAGB0_WRCLI9_DEFAULT 0xfe5fe0f9 101#define mmDAGB0_WRCLI10_DEFAULT 0xfe5fe0f9 102#define mmDAGB0_WRCLI11_DEFAULT 0xfe5fe0f9 103#define mmDAGB0_WRCLI12_DEFAULT 0xfe5fe0f9 104#define mmDAGB0_WRCLI13_DEFAULT 0xfe5fe0f9 105#define mmDAGB0_WRCLI14_DEFAULT 0xfe5fe0f9 106#define mmDAGB0_WRCLI15_DEFAULT 0xfe5fe0f9 107#define mmDAGB0_WRCLI16_DEFAULT 0xfe5fe0f9 108#define mmDAGB0_WRCLI17_DEFAULT 0xfe5fe0f9 109#define mmDAGB0_WRCLI18_DEFAULT 0xfe5fe0f9 110#define mmDAGB0_WRCLI19_DEFAULT 0xfe5fe0f9 111#define mmDAGB0_WRCLI20_DEFAULT 0xfe5fe0f9 112#define mmDAGB0_WRCLI21_DEFAULT 0xfe5fe0f9 113#define mmDAGB0_WRCLI22_DEFAULT 0xfe5fe0f9 114#define mmDAGB0_WRCLI23_DEFAULT 0xfe5fe0f9 115#define mmDAGB0_WRCLI24_DEFAULT 0xfe5fe0f9 116#define mmDAGB0_WRCLI25_DEFAULT 0xfe5fe0f9 117#define mmDAGB0_WRCLI26_DEFAULT 0xfe5fe0f9 118#define mmDAGB0_WRCLI27_DEFAULT 0xfe5fe0f9 119#define mmDAGB0_WRCLI28_DEFAULT 0xfe5fe0f9 120#define mmDAGB0_WRCLI29_DEFAULT 0xfe5fe0f9 121#define mmDAGB0_WRCLI30_DEFAULT 0xfe5fe0f9 122#define mmDAGB0_WR_CNTL_DEFAULT 0x03527df8 123#define mmDAGB0_WR_GMI_CNTL_DEFAULT 0x00003046 124#define mmDAGB0_WR_ADDR_DAGB_DEFAULT 0x00002039 125#define mmDAGB0_WR_OUTPUT_DAGB_MAX_BURST_DEFAULT 0x88888888 126#define mmDAGB0_WR_OUTPUT_DAGB_LAZY_TIMER_DEFAULT 0x11111111 127#define mmDAGB0_WR_CGTT_CLK_CTRL_DEFAULT 0x08000100 128#define mmDAGB0_L1TLB_WR_CGTT_CLK_CTRL_DEFAULT 0x08000100 129#define mmDAGB0_ATCVM_WR_CGTT_CLK_CTRL_DEFAULT 0x08000100 130#define mmDAGB0_WR_ADDR_DAGB_MAX_BURST0_DEFAULT 0x88888888 131#define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER0_DEFAULT 0x11111111 132#define mmDAGB0_WR_ADDR_DAGB_MAX_BURST1_DEFAULT 0x88888888 133#define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER1_DEFAULT 0x11111111 134#define mmDAGB0_WR_ADDR_DAGB_MAX_BURST2_DEFAULT 0x88888888 135#define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER2_DEFAULT 0x11111111 136#define mmDAGB0_WR_ADDR_DAGB_MAX_BURST3_DEFAULT 0x88888888 137#define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER3_DEFAULT 0x11111111 138#define mmDAGB0_WR_DATA_DAGB_DEFAULT 0x00000039 139#define mmDAGB0_WR_DATA_DAGB_MAX_BURST0_DEFAULT 0x11111111 140#define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER0_DEFAULT 0x00000000 141#define mmDAGB0_WR_DATA_DAGB_MAX_BURST1_DEFAULT 0x11111111 142#define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER1_DEFAULT 0x00000000 143#define mmDAGB0_WR_DATA_DAGB_MAX_BURST2_DEFAULT 0x11111111 144#define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER2_DEFAULT 0x00000000 145#define mmDAGB0_WR_DATA_DAGB_MAX_BURST3_DEFAULT 0x11111111 146#define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER3_DEFAULT 0x00000000 147#define mmDAGB0_WR_VC0_CNTL_DEFAULT 0xff2ff082 148#define mmDAGB0_WR_VC1_CNTL_DEFAULT 0xff2ff082 149#define mmDAGB0_WR_VC2_CNTL_DEFAULT 0xff2ff082 150#define mmDAGB0_WR_VC3_CNTL_DEFAULT 0xff2ff082 151#define mmDAGB0_WR_VC4_CNTL_DEFAULT 0xff2ff082 152#define mmDAGB0_WR_VC5_CNTL_DEFAULT 0xff2ff082 153#define mmDAGB0_WR_VC6_CNTL_DEFAULT 0xff2ff082 154#define mmDAGB0_WR_VC7_CNTL_DEFAULT 0xff2ff082 155#define mmDAGB0_WR_CNTL_MISC_DEFAULT 0x01a0e408 156#define mmDAGB0_WR_TLB_CREDIT_DEFAULT 0x2f7bdef7 157#define mmDAGB0_WR_DATA_CREDIT_DEFAULT 0x60606070 158#define mmDAGB0_WR_MISC_CREDIT_DEFAULT 0x0078dc87 159#define mmDAGB0_WR_OSD_CREDIT_CNTL1_DEFAULT 0x10024424 160#define mmDAGB0_WR_OSD_CREDIT_CNTL2_DEFAULT 0x00000004 161#define mmDAGB0_WR_DATA_FIFO_CREDIT_CNTL1_DEFAULT 0x3ef21084 162#define mmDAGB0_WR_DATA_FIFO_CREDIT_CNTL2_DEFAULT 0x00088888 163#define mmDAGB0_WR_ATOMIC_FIFO_CREDIT_CNTL1_DEFAULT 0x3fe00800 164#define mmDAGB0_WRCLI_ASK_PENDING_DEFAULT 0x00000000 165#define mmDAGB0_WRCLI_GO_PENDING_DEFAULT 0x00000000 166#define mmDAGB0_WRCLI_GBLSEND_PENDING_DEFAULT 0x00000000 167#define mmDAGB0_WRCLI_TLB_PENDING_DEFAULT 0x00000000 168#define mmDAGB0_WRCLI_OARB_PENDING_DEFAULT 0x00000000 169#define mmDAGB0_WRCLI_OSD_PENDING_DEFAULT 0x00000000 170#define mmDAGB0_WRCLI_DBUS_ASK_PENDING_DEFAULT 0x00000000 171#define mmDAGB0_WRCLI_DBUS_GO_PENDING_DEFAULT 0x00000000 172#define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_DEFAULT 0x00000000 173#define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_DEFAULT 0x00000000 174#define mmDAGB0_DAGB_DLY_DEFAULT 0x00000000 175#define mmDAGB0_CNTL_MISC_DEFAULT 0xcf7c1ffa 176#define mmDAGB0_CNTL_MISC2_DEFAULT 0x00fbd000 177#define mmDAGB0_FIFO_EMPTY_DEFAULT 0x00ffffff 178#define mmDAGB0_FIFO_FULL_DEFAULT 0x00000000 179#define mmDAGB0_WR_CREDITS_FULL_DEFAULT 0x1fffffff 180#define mmDAGB0_RD_CREDITS_FULL_DEFAULT 0x0003ffff 181#define mmDAGB0_PERFCOUNTER_LO_DEFAULT 0x00000000 182#define mmDAGB0_PERFCOUNTER_HI_DEFAULT 0x00000000 183#define mmDAGB0_PERFCOUNTER0_CFG_DEFAULT 0x00000000 184#define mmDAGB0_PERFCOUNTER1_CFG_DEFAULT 0x00000000 185#define mmDAGB0_PERFCOUNTER2_CFG_DEFAULT 0x00000000 186#define mmDAGB0_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 187#define mmDAGB0_RESERVE0_DEFAULT 0xffffffff 188#define mmDAGB0_RESERVE1_DEFAULT 0xffffffff 189#define mmDAGB0_RESERVE2_DEFAULT 0xffffffff 190#define mmDAGB0_RESERVE3_DEFAULT 0xffffffff 191#define mmDAGB0_RESERVE4_DEFAULT 0xffffffff 192#define mmDAGB0_RESERVE5_DEFAULT 0xffffffff 193#define mmDAGB0_RESERVE6_DEFAULT 0xffffffff 194#define mmDAGB0_RESERVE7_DEFAULT 0xffffffff 195#define mmDAGB0_RESERVE8_DEFAULT 0xffffffff 196#define mmDAGB0_RESERVE9_DEFAULT 0xffffffff 197 198 199// addressBlock: mmhub_mmea_mmeadec0 200#define mmMMEA0_DRAM_RD_CLI2GRP_MAP0_DEFAULT 0x55555555 201#define mmMMEA0_DRAM_RD_CLI2GRP_MAP1_DEFAULT 0x55555555 202#define mmMMEA0_DRAM_WR_CLI2GRP_MAP0_DEFAULT 0x55555555 203#define mmMMEA0_DRAM_WR_CLI2GRP_MAP1_DEFAULT 0x55555555 204#define mmMMEA0_DRAM_RD_GRP2VC_MAP_DEFAULT 0x00000e25 205#define mmMMEA0_DRAM_WR_GRP2VC_MAP_DEFAULT 0x00000e25 206#define mmMMEA0_DRAM_RD_LAZY_DEFAULT 0x78000924 207#define mmMMEA0_DRAM_WR_LAZY_DEFAULT 0x78000924 208#define mmMMEA0_DRAM_RD_CAM_CNTL_DEFAULT 0x16db4444 209#define mmMMEA0_DRAM_WR_CAM_CNTL_DEFAULT 0x16db4444 210#define mmMMEA0_DRAM_PAGE_BURST_DEFAULT 0x20002000 211#define mmMMEA0_DRAM_RD_PRI_AGE_DEFAULT 0x00db6249 212#define mmMMEA0_DRAM_WR_PRI_AGE_DEFAULT 0x00db6249 213#define mmMMEA0_DRAM_RD_PRI_QUEUING_DEFAULT 0x00000db6 214#define mmMMEA0_DRAM_WR_PRI_QUEUING_DEFAULT 0x00000db6 215#define mmMMEA0_DRAM_RD_PRI_FIXED_DEFAULT 0x00000924 216#define mmMMEA0_DRAM_WR_PRI_FIXED_DEFAULT 0x00000924 217#define mmMMEA0_DRAM_RD_PRI_URGENCY_DEFAULT 0x0000fdb6 218#define mmMMEA0_DRAM_WR_PRI_URGENCY_DEFAULT 0x0000fdb6 219#define mmMMEA0_DRAM_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 220#define mmMMEA0_DRAM_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 221#define mmMMEA0_DRAM_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff 222#define mmMMEA0_DRAM_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 223#define mmMMEA0_DRAM_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 224#define mmMMEA0_DRAM_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff 225#define mmMMEA0_ADDRNORM_BASE_ADDR0_DEFAULT 0x00000000 226#define mmMMEA0_ADDRNORM_LIMIT_ADDR0_DEFAULT 0x00000000 227#define mmMMEA0_ADDRNORM_BASE_ADDR1_DEFAULT 0x00000000 228#define mmMMEA0_ADDRNORM_LIMIT_ADDR1_DEFAULT 0x00000000 229#define mmMMEA0_ADDRNORM_OFFSET_ADDR1_DEFAULT 0x00000000 230#define mmMMEA0_ADDRNORMDRAM_HOLE_CNTL_DEFAULT 0x00000000 231#define mmMMEA0_ADDRNORMDRAM_NP2_CHANNEL_CFG_DEFAULT 0x00000000 232#define mmMMEA0_ADDRDEC_BANK_CFG_DEFAULT 0x000003cf 233#define mmMMEA0_ADDRDEC_MISC_CFG_DEFAULT 0xfffff000 234#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK0_DEFAULT 0x00000000 235#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK1_DEFAULT 0x00000000 236#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK2_DEFAULT 0x00000000 237#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK3_DEFAULT 0x00000000 238#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK4_DEFAULT 0x00000000 239#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK5_DEFAULT 0x00000000 240#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_PC_DEFAULT 0x00000000 241#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_PC2_DEFAULT 0x00000000 242#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_CS0_DEFAULT 0x00000000 243#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_CS1_DEFAULT 0x00000000 244#define mmMMEA0_ADDRDECDRAM_HARVEST_ENABLE_DEFAULT 0x00000000 245#define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_START0_DEFAULT 0x00000000 246#define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_END0_DEFAULT 0x00000000 247#define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_START1_DEFAULT 0x00000000 248#define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_END1_DEFAULT 0x00000000 249#define mmMMEA0_ADDRDEC0_BASE_ADDR_CS0_DEFAULT 0x00000000 250#define mmMMEA0_ADDRDEC0_BASE_ADDR_CS1_DEFAULT 0x00000000 251#define mmMMEA0_ADDRDEC0_BASE_ADDR_CS2_DEFAULT 0x00000000 252#define mmMMEA0_ADDRDEC0_BASE_ADDR_CS3_DEFAULT 0x00000000 253#define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS0_DEFAULT 0x00000000 254#define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS1_DEFAULT 0x00000000 255#define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS2_DEFAULT 0x00000000 256#define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS3_DEFAULT 0x00000000 257#define mmMMEA0_ADDRDEC0_ADDR_MASK_CS01_DEFAULT 0xfffffffe 258#define mmMMEA0_ADDRDEC0_ADDR_MASK_CS23_DEFAULT 0xfffffffe 259#define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS01_DEFAULT 0xfffffffe 260#define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS23_DEFAULT 0xfffffffe 261#define mmMMEA0_ADDRDEC0_ADDR_CFG_CS01_DEFAULT 0x00050408 262#define mmMMEA0_ADDRDEC0_ADDR_CFG_CS23_DEFAULT 0x00050408 263#define mmMMEA0_ADDRDEC0_ADDR_SEL_CS01_DEFAULT 0x04076543 264#define mmMMEA0_ADDRDEC0_ADDR_SEL_CS23_DEFAULT 0x04076543 265#define mmMMEA0_ADDRDEC0_ADDR_SEL2_CS01_DEFAULT 0x00000008 266#define mmMMEA0_ADDRDEC0_ADDR_SEL2_CS23_DEFAULT 0x00000008 267#define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS01_DEFAULT 0x87654321 268#define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS23_DEFAULT 0x87654321 269#define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS01_DEFAULT 0xa9876543 270#define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS23_DEFAULT 0xa9876543 271#define mmMMEA0_ADDRDEC0_RM_SEL_CS01_DEFAULT 0x00000000 272#define mmMMEA0_ADDRDEC0_RM_SEL_CS23_DEFAULT 0x00000000 273#define mmMMEA0_ADDRDEC0_RM_SEL_CS1_DEFAULT 0x00000000 274#define mmMMEA0_ADDRDEC0_RM_SEL_CS3_DEFAULT 0x00000000 275#define mmMMEA0_ADDRDEC1_BASE_ADDR_CS0_DEFAULT 0x00000000 276#define mmMMEA0_ADDRDEC1_BASE_ADDR_CS1_DEFAULT 0x00000000 277#define mmMMEA0_ADDRDEC1_BASE_ADDR_CS2_DEFAULT 0x00000000 278#define mmMMEA0_ADDRDEC1_BASE_ADDR_CS3_DEFAULT 0x00000000 279#define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS0_DEFAULT 0x00000000 280#define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS1_DEFAULT 0x00000000 281#define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS2_DEFAULT 0x00000000 282#define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS3_DEFAULT 0x00000000 283#define mmMMEA0_ADDRDEC1_ADDR_MASK_CS01_DEFAULT 0xfffffffe 284#define mmMMEA0_ADDRDEC1_ADDR_MASK_CS23_DEFAULT 0xfffffffe 285#define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS01_DEFAULT 0xfffffffe 286#define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS23_DEFAULT 0xfffffffe 287#define mmMMEA0_ADDRDEC1_ADDR_CFG_CS01_DEFAULT 0x00050408 288#define mmMMEA0_ADDRDEC1_ADDR_CFG_CS23_DEFAULT 0x00050408 289#define mmMMEA0_ADDRDEC1_ADDR_SEL_CS01_DEFAULT 0x04076543 290#define mmMMEA0_ADDRDEC1_ADDR_SEL_CS23_DEFAULT 0x04076543 291#define mmMMEA0_ADDRDEC1_ADDR_SEL2_CS01_DEFAULT 0x00000008 292#define mmMMEA0_ADDRDEC1_ADDR_SEL2_CS23_DEFAULT 0x00000008 293#define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS01_DEFAULT 0x87654321 294#define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS23_DEFAULT 0x87654321 295#define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS01_DEFAULT 0xa9876543 296#define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS23_DEFAULT 0xa9876543 297#define mmMMEA0_ADDRDEC1_RM_SEL_CS01_DEFAULT 0x00000000 298#define mmMMEA0_ADDRDEC1_RM_SEL_CS23_DEFAULT 0x00000000 299#define mmMMEA0_ADDRDEC1_RM_SEL_CS1_DEFAULT 0x00000000 300#define mmMMEA0_ADDRDEC1_RM_SEL_CS3_DEFAULT 0x00000000 301#define mmMMEA0_ADDRNORMDRAM_GLOBAL_CNTL_DEFAULT 0x00600000 302#define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ0_DEFAULT 0x00000000 303#define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ1_DEFAULT 0x00000000 304#define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ2_DEFAULT 0x00000000 305#define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ3_DEFAULT 0x00000000 306#define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ4_DEFAULT 0x00000000 307#define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ5_DEFAULT 0x00000000 308#define mmMMEA0_ADDRDEC0_ADDR_MASK_CS1_DEFAULT 0xfffffffe 309#define mmMMEA0_ADDRDEC0_ADDR_MASK_CS3_DEFAULT 0xfffffffe 310#define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS1_DEFAULT 0xfffffffe 311#define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS3_DEFAULT 0xfffffffe 312#define mmMMEA0_ADDRDEC0_ADDR_CFG_CS1_DEFAULT 0x00050408 313#define mmMMEA0_ADDRDEC0_ADDR_CFG_CS3_DEFAULT 0x00050408 314#define mmMMEA0_ADDRDEC0_ADDR_SEL_CS1_DEFAULT 0x04076543 315#define mmMMEA0_ADDRDEC0_ADDR_SEL_CS3_DEFAULT 0x04076543 316#define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS1_DEFAULT 0x87654321 317#define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS3_DEFAULT 0x87654321 318#define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS1_DEFAULT 0xa9876543 319#define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS3_DEFAULT 0xa9876543 320#define mmMMEA0_ADDRDEC1_ADDR_MASK_CS1_DEFAULT 0xfffffffe 321#define mmMMEA0_ADDRDEC1_ADDR_MASK_CS3_DEFAULT 0xfffffffe 322#define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS1_DEFAULT 0xfffffffe 323#define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS3_DEFAULT 0xfffffffe 324#define mmMMEA0_ADDRDEC1_ADDR_CFG_CS1_DEFAULT 0x00050408 325#define mmMMEA0_ADDRDEC1_ADDR_CFG_CS3_DEFAULT 0x00050408 326#define mmMMEA0_ADDRDEC1_ADDR_SEL_CS1_DEFAULT 0x04076543 327#define mmMMEA0_ADDRDEC1_ADDR_SEL_CS3_DEFAULT 0x04076543 328#define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS1_DEFAULT 0x87654321 329#define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS3_DEFAULT 0x87654321 330#define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS1_DEFAULT 0xa9876543 331#define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS3_DEFAULT 0xa9876543 332#define mmMMEA0_ADDRNORMDRAM_MASKING_DEFAULT 0x00000fff 333#define mmMMEA0_IO_RD_CLI2GRP_MAP0_DEFAULT 0xe4e4e4e4 334#define mmMMEA0_IO_RD_CLI2GRP_MAP1_DEFAULT 0xe4e4e4e4 335#define mmMMEA0_IO_WR_CLI2GRP_MAP0_DEFAULT 0xe4e4e4e4 336#define mmMMEA0_IO_WR_CLI2GRP_MAP1_DEFAULT 0xe4e4e4e4 337#define mmMMEA0_IO_RD_COMBINE_FLUSH_DEFAULT 0x00007777 338#define mmMMEA0_IO_WR_COMBINE_FLUSH_DEFAULT 0x00017777 339#define mmMMEA0_IO_GROUP_BURST_DEFAULT 0x1f031f03 340#define mmMMEA0_IO_RD_PRI_AGE_DEFAULT 0x00db6249 341#define mmMMEA0_IO_WR_PRI_AGE_DEFAULT 0x00db6249 342#define mmMMEA0_IO_RD_PRI_QUEUING_DEFAULT 0x00000db6 343#define mmMMEA0_IO_WR_PRI_QUEUING_DEFAULT 0x00000db6 344#define mmMMEA0_IO_RD_PRI_FIXED_DEFAULT 0x00000924 345#define mmMMEA0_IO_WR_PRI_FIXED_DEFAULT 0x00000924 346#define mmMMEA0_IO_RD_PRI_URGENCY_DEFAULT 0x00000492 347#define mmMMEA0_IO_WR_PRI_URGENCY_DEFAULT 0x00000492 348#define mmMMEA0_IO_RD_PRI_URGENCY_MASKING_DEFAULT 0xffffffff 349#define mmMMEA0_IO_WR_PRI_URGENCY_MASKING_DEFAULT 0xffffffff 350#define mmMMEA0_IO_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 351#define mmMMEA0_IO_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 352#define mmMMEA0_IO_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff 353#define mmMMEA0_IO_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 354#define mmMMEA0_IO_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 355#define mmMMEA0_IO_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff 356#define mmMMEA0_SDP_ARB_DRAM_DEFAULT 0x00101e40 357#define mmMMEA0_SDP_ARB_FINAL_DEFAULT 0x00007fff 358#define mmMMEA0_SDP_DRAM_PRIORITY_DEFAULT 0x00000000 359#define mmMMEA0_SDP_IO_PRIORITY_DEFAULT 0x00000000 360#define mmMMEA0_SDP_CREDITS_DEFAULT 0x000101bf 361#define mmMMEA0_SDP_TAG_RESERVE0_DEFAULT 0x00000000 362#define mmMMEA0_SDP_TAG_RESERVE1_DEFAULT 0x00000000 363#define mmMMEA0_SDP_VCC_RESERVE0_DEFAULT 0x00000000 364#define mmMMEA0_SDP_VCC_RESERVE1_DEFAULT 0x00000000 365#define mmMMEA0_SDP_VCD_RESERVE0_DEFAULT 0x00000000 366#define mmMMEA0_SDP_VCD_RESERVE1_DEFAULT 0x00000000 367#define mmMMEA0_SDP_REQ_CNTL_DEFAULT 0x0000001f 368#define mmMMEA0_MISC_DEFAULT 0x0c00a070 369#define mmMMEA0_LATENCY_SAMPLING_DEFAULT 0x00000000 370#define mmMMEA0_PERFCOUNTER_LO_DEFAULT 0x00000000 371#define mmMMEA0_PERFCOUNTER_HI_DEFAULT 0x00000000 372#define mmMMEA0_PERFCOUNTER0_CFG_DEFAULT 0x00000000 373#define mmMMEA0_PERFCOUNTER1_CFG_DEFAULT 0x00000000 374#define mmMMEA0_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 375#define mmMMEA0_EDC_CNT_DEFAULT 0x00000000 376#define mmMMEA0_EDC_CNT2_DEFAULT 0x00000000 377#define mmMMEA0_DSM_CNTL_DEFAULT 0x00000000 378#define mmMMEA0_DSM_CNTLA_DEFAULT 0x00000000 379#define mmMMEA0_DSM_CNTLB_DEFAULT 0x00000000 380#define mmMMEA0_DSM_CNTL2_DEFAULT 0x00000000 381#define mmMMEA0_DSM_CNTL2A_DEFAULT 0x00000000 382#define mmMMEA0_DSM_CNTL2B_DEFAULT 0x00000000 383#define mmMMEA0_CGTT_CLK_CTRL_DEFAULT 0x08000100 384#define mmMMEA0_EDC_MODE_DEFAULT 0x00000000 385#define mmMMEA0_ERR_STATUS_DEFAULT 0x00010300 386#define mmMMEA0_MISC2_DEFAULT 0x00000000 387#define mmMMEA0_ADDRDEC_SELECT_DEFAULT 0x00000000 388#define mmMMEA0_EDC_CNT3_DEFAULT 0x00000000 389#define mmMMEA0_SDP_PRIORITY_OVERRIDE_DEFAULT 0x00000000 390#define mmMMEA0_MISC_AON_DEFAULT 0x00000001 391 392 393// addressBlock: mmhub_pctldec 394#define mmPCTL_CTRL_DEFAULT 0x00088270 395#define mmPCTL_MMHUB_DEEPSLEEP_IB_DEFAULT 0x00000000 396#define mmPCTL_MMHUB_DEEPSLEEP_OVERRIDE_DEFAULT 0x00000000 397#define mmPCTL_MMHUB_DEEPSLEEP_OVERRIDE_IB_DEFAULT 0x00000000 398#define mmPCTL_PG_IGNORE_DEEPSLEEP_DEFAULT 0x00000000 399#define mmPCTL_PG_IGNORE_DEEPSLEEP_IB_DEFAULT 0x00000000 400#define mmPCTL_SLICE0_CFG_DAGB_WRBUSY_DEFAULT 0x00000000 401#define mmPCTL_SLICE0_CFG_DAGB_RDBUSY_DEFAULT 0x00000000 402#define mmPCTL_SLICE0_CFG_DS_ALLOW_DEFAULT 0x00000000 403#define mmPCTL_SLICE0_CFG_DS_ALLOW_IB_DEFAULT 0x00000000 404#define mmPCTL_SLICE1_CFG_DAGB_WRBUSY_DEFAULT 0x00000000 405#define mmPCTL_SLICE1_CFG_DAGB_RDBUSY_DEFAULT 0x00000000 406#define mmPCTL_SLICE1_CFG_DS_ALLOW_DEFAULT 0x00000000 407#define mmPCTL_SLICE1_CFG_DS_ALLOW_IB_DEFAULT 0x00000000 408#define mmPCTL_UTCL2_MISC_DEFAULT 0x00051000 409#define mmPCTL_SLICE0_MISC_DEFAULT 0x00040800 410#define mmPCTL_SLICE1_MISC_DEFAULT 0x00040800 411#define mmPCTL_RENG_CTRL_DEFAULT 0x00000000 412#define mmPCTL_UTCL2_RENG_EXECUTE_DEFAULT 0x00000000 413#define mmPCTL_SLICE0_RENG_EXECUTE_DEFAULT 0x00000000 414#define mmPCTL_SLICE1_RENG_EXECUTE_DEFAULT 0x00000000 415#define mmPCTL_UTCL2_RENG_RAM_INDEX_DEFAULT 0x00000000 416#define mmPCTL_UTCL2_RENG_RAM_DATA_DEFAULT 0x00000000 417#define mmPCTL_SLICE0_RENG_RAM_INDEX_DEFAULT 0x00000000 418#define mmPCTL_SLICE0_RENG_RAM_DATA_DEFAULT 0x00000000 419#define mmPCTL_SLICE1_RENG_RAM_INDEX_DEFAULT 0x00000000 420#define mmPCTL_SLICE1_RENG_RAM_DATA_DEFAULT 0x00000000 421#define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x00000000 422#define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x00000000 423#define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000 424#define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT 0x00000000 425#define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT 0x00000000 426#define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_EXCL_SET0_DEFAULT 0xffffffff 427#define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff 428#define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x00000000 429#define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x00000000 430#define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000 431#define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT 0x00000000 432#define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT 0x00000000 433#define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_EXCL_SET0_DEFAULT 0xffffffff 434#define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff 435#define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x00000000 436#define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x00000000 437#define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000 438#define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT 0x00000000 439#define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT 0x00000000 440#define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_EXCL_SET0_DEFAULT 0xffffffff 441#define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff 442#define mmPCTL_STATUS_DEFAULT 0x00000000 443#define mmPCTL_PERFCOUNTER_LO_DEFAULT 0x00000000 444#define mmPCTL_PERFCOUNTER_HI_DEFAULT 0x00000000 445#define mmPCTL_PERFCOUNTER0_CFG_DEFAULT 0x00000000 446#define mmPCTL_PERFCOUNTER1_CFG_DEFAULT 0x00000000 447#define mmPCTL_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 448#define mmPCTL_RESERVED_0_DEFAULT 0x00000000 449#define mmPCTL_RESERVED_1_DEFAULT 0x00000000 450#define mmPCTL_RESERVED_2_DEFAULT 0x00000000 451#define mmPCTL_RESERVED_3_DEFAULT 0x00000000 452 453 454// addressBlock: mmhub_l1tlb_mmutcl1pfdec 455#define mmMMMC_VM_MX_L1_TLB0_STATUS_DEFAULT 0x00000000 456#define mmMMMC_VM_MX_L1_TLB1_STATUS_DEFAULT 0x00000000 457#define mmMMMC_VM_MX_L1_TLB2_STATUS_DEFAULT 0x00000000 458#define mmMMMC_VM_MX_L1_TLB3_STATUS_DEFAULT 0x00000000 459#define mmMMMC_VM_MX_L1_TLB4_STATUS_DEFAULT 0x00000000 460#define mmMMMC_VM_MX_L1_TLB5_STATUS_DEFAULT 0x00000000 461#define mmMMMC_VM_MX_L1_TLB6_STATUS_DEFAULT 0x00000000 462#define mmMMMC_VM_MX_L1_TLB7_STATUS_DEFAULT 0x00000000 463 464 465// addressBlock: mmhub_l1tlb_mmutcl1pldec 466#define mmMMMC_VM_MX_L1_PERFCOUNTER0_CFG_DEFAULT 0x00000000 467#define mmMMMC_VM_MX_L1_PERFCOUNTER1_CFG_DEFAULT 0x00000000 468#define mmMMMC_VM_MX_L1_PERFCOUNTER2_CFG_DEFAULT 0x00000000 469#define mmMMMC_VM_MX_L1_PERFCOUNTER3_CFG_DEFAULT 0x00000000 470#define mmMMMC_VM_MX_L1_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 471 472 473// addressBlock: mmhub_l1tlb_mmutcl1prdec 474#define mmMMMC_VM_MX_L1_PERFCOUNTER_LO_DEFAULT 0x00000000 475#define mmMMMC_VM_MX_L1_PERFCOUNTER_HI_DEFAULT 0x00000000 476 477 478// addressBlock: mmhub_l1tlb_mmvmtlspfdec 479#define mmMMMC_VM_MX_L1_TLS0_CNTL_DEFAULT 0xa5a50004 480#define mmMMMC_VM_MX_L1_TLS0_CNTL0_DEFAULT 0x00000000 481#define mmMMMC_VM_MX_L1_TLS0_CNTL1_DEFAULT 0x00000000 482#define mmMMMC_VM_MX_L1_TLS0_CNTL2_DEFAULT 0x00000000 483#define mmMMMC_VM_MX_L1_TLS0_CNTL3_DEFAULT 0x00000000 484#define mmMMMC_VM_MX_L1_TLS0_CNTL4_DEFAULT 0x00000000 485#define mmMMMC_VM_MX_L1_TLS0_CNTL5_DEFAULT 0x00000000 486#define mmMMMC_VM_MX_L1_TLS0_CNTL6_DEFAULT 0x00000000 487#define mmMMMC_VM_MX_L1_TLS0_CNTL7_DEFAULT 0x00000000 488#define mmMMMC_VM_MX_L1_TLS0_CNTL8_DEFAULT 0x00000000 489#define mmMMMC_VM_MX_L1_TLS0_CNTL9_DEFAULT 0x00000000 490#define mmMMMC_VM_MX_L1_TLS0_CNTL10_DEFAULT 0x00000000 491#define mmMMMC_VM_MX_L1_TLS0_CNTL11_DEFAULT 0x00000000 492#define mmMMMC_VM_MX_L1_TLS0_CNTL12_DEFAULT 0x00000000 493#define mmMMMC_VM_MX_L1_TLS0_CNTL13_DEFAULT 0x00000000 494#define mmMMMC_VM_MX_L1_TLS0_CNTL14_DEFAULT 0x00000000 495#define mmMMMC_VM_MX_L1_TLS0_CNTL15_DEFAULT 0x00000000 496#define mmMMMC_VM_MX_L1_TLS0_CNTL16_DEFAULT 0x00000000 497#define mmMMMC_VM_MX_L1_TLS0_CNTL17_DEFAULT 0x00000000 498#define mmMMMC_VM_MX_L1_TLS0_CNTL18_DEFAULT 0x00000000 499#define mmMMMC_VM_MX_L1_TLS0_CNTL19_DEFAULT 0x00000000 500#define mmMMMC_VM_MX_L1_TLS0_CNTL20_DEFAULT 0x00000000 501#define mmMMMC_VM_MX_L1_TLS0_CNTL21_DEFAULT 0x00000000 502#define mmMMMC_VM_MX_L1_TLS0_CNTL22_DEFAULT 0x00000000 503#define mmMMMC_VM_MX_L1_TLS0_CNTL23_DEFAULT 0x00000000 504#define mmMMMC_VM_MX_L1_TLS0_CNTL24_DEFAULT 0x00000000 505#define mmMMMC_VM_MX_L1_TLS0_CNTL25_DEFAULT 0x00000000 506#define mmMMMC_VM_MX_L1_TLS0_CNTL26_DEFAULT 0x00000000 507#define mmMMMC_VM_MX_L1_TLS0_CNTL27_DEFAULT 0x00000000 508#define mmMMMC_VM_MX_L1_TLS0_CNTL28_DEFAULT 0x00000000 509#define mmMMMC_VM_MX_L1_TLS0_CNTL29_DEFAULT 0x00000000 510#define mmMMMC_VM_MX_L1_TLS0_CNTL30_DEFAULT 0x00000000 511#define mmMMMC_VM_MX_L1_TLS0_CNTL31_DEFAULT 0x00000000 512#define mmMMMC_VM_MX_L1_TLS0_CNTL32_DEFAULT 0x00000000 513#define mmMMMC_VM_MX_L1_TLS0_CNTL33_DEFAULT 0x00000000 514#define mmMMMC_VM_MX_L1_TLS0_CNTL34_DEFAULT 0x00000000 515#define mmMMMC_VM_MX_L1_TLS0_CNTL35_DEFAULT 0x00000000 516#define mmMMMC_VM_MX_L1_TLS0_CNTL36_DEFAULT 0x00000000 517#define mmMMMC_VM_MX_L1_TLS0_CNTL37_DEFAULT 0x00000000 518#define mmMMMC_VM_MX_L1_TLS0_START_ADDR0_LO32_DEFAULT 0x00000000 519#define mmMMMC_VM_MX_L1_TLS0_START_ADDR0_HI32_DEFAULT 0x00000000 520#define mmMMMC_VM_MX_L1_TLS0_START_ADDR1_LO32_DEFAULT 0x00000000 521#define mmMMMC_VM_MX_L1_TLS0_START_ADDR1_HI32_DEFAULT 0x00000000 522#define mmMMMC_VM_MX_L1_TLS0_START_ADDR2_LO32_DEFAULT 0x00000000 523#define mmMMMC_VM_MX_L1_TLS0_START_ADDR2_HI32_DEFAULT 0x00000000 524#define mmMMMC_VM_MX_L1_TLS0_START_ADDR3_LO32_DEFAULT 0x00000000 525#define mmMMMC_VM_MX_L1_TLS0_START_ADDR3_HI32_DEFAULT 0x00000000 526#define mmMMMC_VM_MX_L1_TLS0_START_ADDR4_LO32_DEFAULT 0x00000000 527#define mmMMMC_VM_MX_L1_TLS0_START_ADDR4_HI32_DEFAULT 0x00000000 528#define mmMMMC_VM_MX_L1_TLS0_START_ADDR5_LO32_DEFAULT 0x00000000 529#define mmMMMC_VM_MX_L1_TLS0_START_ADDR5_HI32_DEFAULT 0x00000000 530#define mmMMMC_VM_MX_L1_TLS0_START_ADDR6_LO32_DEFAULT 0x00000000 531#define mmMMMC_VM_MX_L1_TLS0_START_ADDR6_HI32_DEFAULT 0x00000000 532#define mmMMMC_VM_MX_L1_TLS0_START_ADDR7_LO32_DEFAULT 0x00000000 533#define mmMMMC_VM_MX_L1_TLS0_START_ADDR7_HI32_DEFAULT 0x00000000 534#define mmMMMC_VM_MX_L1_TLS0_START_ADDR8_LO32_DEFAULT 0x00000000 535#define mmMMMC_VM_MX_L1_TLS0_START_ADDR8_HI32_DEFAULT 0x00000000 536#define mmMMMC_VM_MX_L1_TLS0_START_ADDR9_LO32_DEFAULT 0x00000000 537#define mmMMMC_VM_MX_L1_TLS0_START_ADDR9_HI32_DEFAULT 0x00000000 538#define mmMMMC_VM_MX_L1_TLS0_START_ADDR10_LO32_DEFAULT 0x00000000 539#define mmMMMC_VM_MX_L1_TLS0_START_ADDR10_HI32_DEFAULT 0x00000000 540#define mmMMMC_VM_MX_L1_TLS0_START_ADDR11_LO32_DEFAULT 0x00000000 541#define mmMMMC_VM_MX_L1_TLS0_START_ADDR11_HI32_DEFAULT 0x00000000 542#define mmMMMC_VM_MX_L1_TLS0_START_ADDR12_LO32_DEFAULT 0x00000000 543#define mmMMMC_VM_MX_L1_TLS0_START_ADDR12_HI32_DEFAULT 0x00000000 544#define mmMMMC_VM_MX_L1_TLS0_START_ADDR13_LO32_DEFAULT 0x00000000 545#define mmMMMC_VM_MX_L1_TLS0_START_ADDR13_HI32_DEFAULT 0x00000000 546#define mmMMMC_VM_MX_L1_TLS0_START_ADDR14_LO32_DEFAULT 0x00000000 547#define mmMMMC_VM_MX_L1_TLS0_START_ADDR14_HI32_DEFAULT 0x00000000 548#define mmMMMC_VM_MX_L1_TLS0_START_ADDR15_LO32_DEFAULT 0x00000000 549#define mmMMMC_VM_MX_L1_TLS0_START_ADDR15_HI32_DEFAULT 0x00000000 550#define mmMMMC_VM_MX_L1_TLS0_START_ADDR16_LO32_DEFAULT 0x00000000 551#define mmMMMC_VM_MX_L1_TLS0_START_ADDR16_HI32_DEFAULT 0x00000000 552#define mmMMMC_VM_MX_L1_TLS0_START_ADDR17_LO32_DEFAULT 0x00000000 553#define mmMMMC_VM_MX_L1_TLS0_START_ADDR17_HI32_DEFAULT 0x00000000 554#define mmMMMC_VM_MX_L1_TLS0_START_ADDR18_LO32_DEFAULT 0x00000000 555#define mmMMMC_VM_MX_L1_TLS0_START_ADDR18_HI32_DEFAULT 0x00000000 556#define mmMMMC_VM_MX_L1_TLS0_START_ADDR19_LO32_DEFAULT 0x00000000 557#define mmMMMC_VM_MX_L1_TLS0_START_ADDR19_HI32_DEFAULT 0x00000000 558#define mmMMMC_VM_MX_L1_TLS0_START_ADDR20_LO32_DEFAULT 0x00000000 559#define mmMMMC_VM_MX_L1_TLS0_START_ADDR20_HI32_DEFAULT 0x00000000 560#define mmMMMC_VM_MX_L1_TLS0_START_ADDR21_LO32_DEFAULT 0x00000000 561#define mmMMMC_VM_MX_L1_TLS0_START_ADDR21_HI32_DEFAULT 0x00000000 562#define mmMMMC_VM_MX_L1_TLS0_START_ADDR22_LO32_DEFAULT 0x00000000 563#define mmMMMC_VM_MX_L1_TLS0_START_ADDR22_HI32_DEFAULT 0x00000000 564#define mmMMMC_VM_MX_L1_TLS0_START_ADDR23_LO32_DEFAULT 0x00000000 565#define mmMMMC_VM_MX_L1_TLS0_START_ADDR23_HI32_DEFAULT 0x00000000 566#define mmMMMC_VM_MX_L1_TLS0_START_ADDR24_LO32_DEFAULT 0x00000000 567#define mmMMMC_VM_MX_L1_TLS0_START_ADDR24_HI32_DEFAULT 0x00000000 568#define mmMMMC_VM_MX_L1_TLS0_START_ADDR25_LO32_DEFAULT 0x00000000 569#define mmMMMC_VM_MX_L1_TLS0_START_ADDR25_HI32_DEFAULT 0x00000000 570#define mmMMMC_VM_MX_L1_TLS0_START_ADDR26_LO32_DEFAULT 0x00000000 571#define mmMMMC_VM_MX_L1_TLS0_START_ADDR26_HI32_DEFAULT 0x00000000 572#define mmMMMC_VM_MX_L1_TLS0_START_ADDR27_LO32_DEFAULT 0x00000000 573#define mmMMMC_VM_MX_L1_TLS0_START_ADDR27_HI32_DEFAULT 0x00000000 574#define mmMMMC_VM_MX_L1_TLS0_START_ADDR28_LO32_DEFAULT 0x00000000 575#define mmMMMC_VM_MX_L1_TLS0_START_ADDR28_HI32_DEFAULT 0x00000000 576#define mmMMMC_VM_MX_L1_TLS0_START_ADDR29_LO32_DEFAULT 0x00000000 577#define mmMMMC_VM_MX_L1_TLS0_START_ADDR29_HI32_DEFAULT 0x00000000 578#define mmMMMC_VM_MX_L1_TLS0_START_ADDR30_LO32_DEFAULT 0x00000000 579#define mmMMMC_VM_MX_L1_TLS0_START_ADDR30_HI32_DEFAULT 0x00000000 580#define mmMMMC_VM_MX_L1_TLS0_START_ADDR31_LO32_DEFAULT 0x00000000 581#define mmMMMC_VM_MX_L1_TLS0_START_ADDR31_HI32_DEFAULT 0x00000000 582#define mmMMMC_VM_MX_L1_TLS0_START_ADDR32_LO32_DEFAULT 0x00000000 583#define mmMMMC_VM_MX_L1_TLS0_START_ADDR32_HI32_DEFAULT 0x00000000 584#define mmMMMC_VM_MX_L1_TLS0_START_ADDR33_LO32_DEFAULT 0x00000000 585#define mmMMMC_VM_MX_L1_TLS0_START_ADDR33_HI32_DEFAULT 0x00000000 586#define mmMMMC_VM_MX_L1_TLS0_START_ADDR34_LO32_DEFAULT 0x00000000 587#define mmMMMC_VM_MX_L1_TLS0_START_ADDR34_HI32_DEFAULT 0x00000000 588#define mmMMMC_VM_MX_L1_TLS0_START_ADDR35_LO32_DEFAULT 0x00000000 589#define mmMMMC_VM_MX_L1_TLS0_START_ADDR35_HI32_DEFAULT 0x00000000 590#define mmMMMC_VM_MX_L1_TLS0_START_ADDR36_LO32_DEFAULT 0x00000000 591#define mmMMMC_VM_MX_L1_TLS0_START_ADDR36_HI32_DEFAULT 0x00000000 592#define mmMMMC_VM_MX_L1_TLS0_START_ADDR37_LO32_DEFAULT 0x00000000 593#define mmMMMC_VM_MX_L1_TLS0_START_ADDR37_HI32_DEFAULT 0x00000000 594#define mmMMMC_VM_MX_L1_TLS0_END_ADDR0_LO32_DEFAULT 0x00000000 595#define mmMMMC_VM_MX_L1_TLS0_END_ADDR0_HI32_DEFAULT 0x00000000 596#define mmMMMC_VM_MX_L1_TLS0_END_ADDR1_LO32_DEFAULT 0x00000000 597#define mmMMMC_VM_MX_L1_TLS0_END_ADDR1_HI32_DEFAULT 0x00000000 598#define mmMMMC_VM_MX_L1_TLS0_END_ADDR2_LO32_DEFAULT 0x00000000 599#define mmMMMC_VM_MX_L1_TLS0_END_ADDR2_HI32_DEFAULT 0x00000000 600#define mmMMMC_VM_MX_L1_TLS0_END_ADDR3_LO32_DEFAULT 0x00000000 601#define mmMMMC_VM_MX_L1_TLS0_END_ADDR3_HI32_DEFAULT 0x00000000 602#define mmMMMC_VM_MX_L1_TLS0_END_ADDR4_LO32_DEFAULT 0x00000000 603#define mmMMMC_VM_MX_L1_TLS0_END_ADDR4_HI32_DEFAULT 0x00000000 604#define mmMMMC_VM_MX_L1_TLS0_END_ADDR5_LO32_DEFAULT 0x00000000 605#define mmMMMC_VM_MX_L1_TLS0_END_ADDR5_HI32_DEFAULT 0x00000000 606#define mmMMMC_VM_MX_L1_TLS0_END_ADDR6_LO32_DEFAULT 0x00000000 607#define mmMMMC_VM_MX_L1_TLS0_END_ADDR6_HI32_DEFAULT 0x00000000 608#define mmMMMC_VM_MX_L1_TLS0_END_ADDR7_LO32_DEFAULT 0x00000000 609#define mmMMMC_VM_MX_L1_TLS0_END_ADDR7_HI32_DEFAULT 0x00000000 610#define mmMMMC_VM_MX_L1_TLS0_END_ADDR8_LO32_DEFAULT 0x00000000 611#define mmMMMC_VM_MX_L1_TLS0_END_ADDR8_HI32_DEFAULT 0x00000000 612#define mmMMMC_VM_MX_L1_TLS0_END_ADDR9_LO32_DEFAULT 0x00000000 613#define mmMMMC_VM_MX_L1_TLS0_END_ADDR9_HI32_DEFAULT 0x00000000 614#define mmMMMC_VM_MX_L1_TLS0_END_ADDR10_LO32_DEFAULT 0x00000000 615#define mmMMMC_VM_MX_L1_TLS0_END_ADDR10_HI32_DEFAULT 0x00000000 616#define mmMMMC_VM_MX_L1_TLS0_END_ADDR11_LO32_DEFAULT 0x00000000 617#define mmMMMC_VM_MX_L1_TLS0_END_ADDR11_HI32_DEFAULT 0x00000000 618#define mmMMMC_VM_MX_L1_TLS0_END_ADDR12_LO32_DEFAULT 0x00000000 619#define mmMMMC_VM_MX_L1_TLS0_END_ADDR12_HI32_DEFAULT 0x00000000 620#define mmMMMC_VM_MX_L1_TLS0_END_ADDR13_LO32_DEFAULT 0x00000000 621#define mmMMMC_VM_MX_L1_TLS0_END_ADDR13_HI32_DEFAULT 0x00000000 622#define mmMMMC_VM_MX_L1_TLS0_END_ADDR14_LO32_DEFAULT 0x00000000 623#define mmMMMC_VM_MX_L1_TLS0_END_ADDR14_HI32_DEFAULT 0x00000000 624#define mmMMMC_VM_MX_L1_TLS0_END_ADDR15_LO32_DEFAULT 0x00000000 625#define mmMMMC_VM_MX_L1_TLS0_END_ADDR15_HI32_DEFAULT 0x00000000 626#define mmMMMC_VM_MX_L1_TLS0_END_ADDR16_LO32_DEFAULT 0x00000000 627#define mmMMMC_VM_MX_L1_TLS0_END_ADDR16_HI32_DEFAULT 0x00000000 628#define mmMMMC_VM_MX_L1_TLS0_END_ADDR17_LO32_DEFAULT 0x00000000 629#define mmMMMC_VM_MX_L1_TLS0_END_ADDR17_HI32_DEFAULT 0x00000000 630#define mmMMMC_VM_MX_L1_TLS0_END_ADDR18_LO32_DEFAULT 0x00000000 631#define mmMMMC_VM_MX_L1_TLS0_END_ADDR18_HI32_DEFAULT 0x00000000 632#define mmMMMC_VM_MX_L1_TLS0_END_ADDR19_LO32_DEFAULT 0x00000000 633#define mmMMMC_VM_MX_L1_TLS0_END_ADDR19_HI32_DEFAULT 0x00000000 634#define mmMMMC_VM_MX_L1_TLS0_END_ADDR20_LO32_DEFAULT 0x00000000 635#define mmMMMC_VM_MX_L1_TLS0_END_ADDR20_HI32_DEFAULT 0x00000000 636#define mmMMMC_VM_MX_L1_TLS0_END_ADDR21_LO32_DEFAULT 0x00000000 637#define mmMMMC_VM_MX_L1_TLS0_END_ADDR21_HI32_DEFAULT 0x00000000 638#define mmMMMC_VM_MX_L1_TLS0_END_ADDR22_LO32_DEFAULT 0x00000000 639#define mmMMMC_VM_MX_L1_TLS0_END_ADDR22_HI32_DEFAULT 0x00000000 640#define mmMMMC_VM_MX_L1_TLS0_END_ADDR23_LO32_DEFAULT 0x00000000 641#define mmMMMC_VM_MX_L1_TLS0_END_ADDR23_HI32_DEFAULT 0x00000000 642#define mmMMMC_VM_MX_L1_TLS0_END_ADDR24_LO32_DEFAULT 0x00000000 643#define mmMMMC_VM_MX_L1_TLS0_END_ADDR24_HI32_DEFAULT 0x00000000 644#define mmMMMC_VM_MX_L1_TLS0_END_ADDR25_LO32_DEFAULT 0x00000000 645#define mmMMMC_VM_MX_L1_TLS0_END_ADDR25_HI32_DEFAULT 0x00000000 646#define mmMMMC_VM_MX_L1_TLS0_END_ADDR26_LO32_DEFAULT 0x00000000 647#define mmMMMC_VM_MX_L1_TLS0_END_ADDR26_HI32_DEFAULT 0x00000000 648#define mmMMMC_VM_MX_L1_TLS0_END_ADDR27_LO32_DEFAULT 0x00000000 649#define mmMMMC_VM_MX_L1_TLS0_END_ADDR27_HI32_DEFAULT 0x00000000 650#define mmMMMC_VM_MX_L1_TLS0_END_ADDR28_LO32_DEFAULT 0x00000000 651#define mmMMMC_VM_MX_L1_TLS0_END_ADDR28_HI32_DEFAULT 0x00000000 652#define mmMMMC_VM_MX_L1_TLS0_END_ADDR29_LO32_DEFAULT 0x00000000 653#define mmMMMC_VM_MX_L1_TLS0_END_ADDR29_HI32_DEFAULT 0x00000000 654#define mmMMMC_VM_MX_L1_TLS0_END_ADDR30_LO32_DEFAULT 0x00000000 655#define mmMMMC_VM_MX_L1_TLS0_END_ADDR30_HI32_DEFAULT 0x00000000 656#define mmMMMC_VM_MX_L1_TLS0_END_ADDR31_LO32_DEFAULT 0x00000000 657#define mmMMMC_VM_MX_L1_TLS0_END_ADDR31_HI32_DEFAULT 0x00000000 658#define mmMMMC_VM_MX_L1_TLS0_END_ADDR32_LO32_DEFAULT 0x00000000 659#define mmMMMC_VM_MX_L1_TLS0_END_ADDR32_HI32_DEFAULT 0x00000000 660#define mmMMMC_VM_MX_L1_TLS0_END_ADDR33_LO32_DEFAULT 0x00000000 661#define mmMMMC_VM_MX_L1_TLS0_END_ADDR33_HI32_DEFAULT 0x00000000 662#define mmMMMC_VM_MX_L1_TLS0_END_ADDR34_LO32_DEFAULT 0x00000000 663#define mmMMMC_VM_MX_L1_TLS0_END_ADDR34_HI32_DEFAULT 0x00000000 664#define mmMMMC_VM_MX_L1_TLS0_END_ADDR35_LO32_DEFAULT 0x00000000 665#define mmMMMC_VM_MX_L1_TLS0_END_ADDR35_HI32_DEFAULT 0x00000000 666#define mmMMMC_VM_MX_L1_TLS0_END_ADDR36_LO32_DEFAULT 0x00000000 667#define mmMMMC_VM_MX_L1_TLS0_END_ADDR36_HI32_DEFAULT 0x00000000 668#define mmMMMC_VM_MX_L1_TLS0_END_ADDR37_LO32_DEFAULT 0x00000000 669#define mmMMMC_VM_MX_L1_TLS0_END_ADDR37_HI32_DEFAULT 0x00000000 670#define mmMMMC_VM_MX_L1_TLS0_INVALIDATE_STREAM_LO32_DEFAULT 0x00000000 671#define mmMMMC_VM_MX_L1_TLS0_INVALIDATE_STREAM_HI32_DEFAULT 0x00000000 672#define mmMMMC_VM_MX_L1_TLS0_INVALIDATE_REQUEST_PENDING_LO32_DEFAULT 0x00000000 673#define mmMMMC_VM_MX_L1_TLS0_INVALIDATE_REQUEST_PENDING_HI32_DEFAULT 0x00000000 674#define mmMMMC_VM_MX_L1_TLS0_PROTECTION_FAULT_STATUS_DEFAULT 0x00000000 675#define mmMMMC_VM_MX_L1_TLS0_PROTECTION_FAULT_ADDR_LO32_DEFAULT 0x00000000 676#define mmMMMC_VM_MX_L1_TLS0_PROTECTION_FAULT_ADDR_HI32_DEFAULT 0x00000000 677#define mmMMVM_L2_SAW_CNTL_DEFAULT 0x0c0b8602 678#define mmMMVM_L2_SAW_CNTL2_DEFAULT 0x00000000 679#define mmMMVM_L2_SAW_CNTL3_DEFAULT 0x80100004 680#define mmMMVM_L2_SAW_CNTL4_DEFAULT 0x00000001 681#define mmMMVM_L2_SAW_CONTEXT0_CNTL_DEFAULT 0x00fffed8 682#define mmMMVM_L2_SAW_CONTEXT0_CNTL2_DEFAULT 0x00000000 683#define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 684#define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 685#define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 686#define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 687#define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 688#define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 689#define mmMMVM_L2_SAW_CONTEXTS_DISABLE_DEFAULT 0x00000000 690#define mmMMVM_L2_SAW_PIPES_BUSY_LO32_DEFAULT 0x00000000 691#define mmMMVM_L2_SAW_PIPES_BUSY_HI32_DEFAULT 0x00000000 692#define mmMMMC_VM_MX_L1_TLS0_IOMMU_FAULT_STATUS_DEFAULT 0x00000000 693#define mmMMMC_VM_MX_L1_TLS0_IOMMU_FAULT_GVADDR_LO32_DEFAULT 0x00000000 694#define mmMMMC_VM_MX_L1_TLS0_IOMMU_FAULT_GVADDR_HI32_DEFAULT 0x00000000 695 696 697// addressBlock: mmhub_mmutcl2_mmatcl2dec 698#define mmMM_ATC_L2_CNTL_DEFAULT 0x05311b00 699#define mmMM_ATC_L2_CNTL2_DEFAULT 0x00000100 700#define mmMM_ATC_L2_CACHE_DATA0_DEFAULT 0x00000000 701#define mmMM_ATC_L2_CACHE_DATA1_DEFAULT 0x00000000 702#define mmMM_ATC_L2_CACHE_DATA2_DEFAULT 0x00000000 703#define mmMM_ATC_L2_CNTL3_DEFAULT 0x07e090c0 704#define mmMM_ATC_L2_CNTL4_DEFAULT 0x000090c0 705#define mmMM_ATC_L2_CNTL5_DEFAULT 0x00000000 706#define mmMM_ATC_L2_MM_GROUP_RT_CLASSES_DEFAULT 0x00000005 707#define mmMM_ATC_L2_STATUS_DEFAULT 0x00000000 708#define mmMM_ATC_L2_STATUS2_DEFAULT 0x00000000 709#define mmMM_ATC_L2_MISC_CG_DEFAULT 0x00000200 710#define mmMM_ATC_L2_MEM_POWER_LS_DEFAULT 0x00000208 711#define mmMM_ATC_L2_CGTT_CLK_CTRL_DEFAULT 0x00008080 712#define mmMM_ATC_L2_SDPPORT_CTRL_DEFAULT 0x000003ff 713 714 715// addressBlock: mmhub_mmutcl2_mmvml2pfdec 716#define mmMMVM_L2_CNTL_DEFAULT 0x00080602 717#define mmMMVM_L2_CNTL2_DEFAULT 0x00000000 718#define mmMMVM_L2_CNTL3_DEFAULT 0x80100007 719#define mmMMVM_L2_STATUS_DEFAULT 0x00000000 720#define mmMMVM_DUMMY_PAGE_FAULT_CNTL_DEFAULT 0x00000090 721#define mmMMVM_DUMMY_PAGE_FAULT_ADDR_LO32_DEFAULT 0x00000000 722#define mmMMVM_DUMMY_PAGE_FAULT_ADDR_HI32_DEFAULT 0x00000000 723#define mmMMVM_INVALIDATE_CNTL_DEFAULT 0x0000010f 724#define mmMMVM_L2_PROTECTION_FAULT_CNTL_DEFAULT 0x3ffffffc 725#define mmMMVM_L2_PROTECTION_FAULT_CNTL2_DEFAULT 0x000a0000 726#define mmMMVM_L2_PROTECTION_FAULT_MM_CNTL3_DEFAULT 0xffffffff 727#define mmMMVM_L2_PROTECTION_FAULT_MM_CNTL4_DEFAULT 0xffffffff 728#define mmMMVM_L2_PROTECTION_FAULT_STATUS_DEFAULT 0x00000000 729#define mmMMVM_L2_PROTECTION_FAULT_ADDR_LO32_DEFAULT 0x00000000 730#define mmMMVM_L2_PROTECTION_FAULT_ADDR_HI32_DEFAULT 0x00000000 731#define mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32_DEFAULT 0x00000000 732#define mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32_DEFAULT 0x00000000 733#define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32_DEFAULT 0x00000000 734#define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32_DEFAULT 0x00000000 735#define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32_DEFAULT 0x00000000 736#define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32_DEFAULT 0x00000000 737#define mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32_DEFAULT 0x00000000 738#define mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32_DEFAULT 0x00000000 739#define mmMMVM_L2_CNTL4_DEFAULT 0x000000c1 740#define mmMMVM_L2_MM_GROUP_RT_CLASSES_DEFAULT 0x00000000 741#define mmMMVM_L2_BANK_SELECT_RESERVED_CID_DEFAULT 0x00000000 742#define mmMMVM_L2_BANK_SELECT_RESERVED_CID2_DEFAULT 0x00000000 743#define mmMMVM_L2_CACHE_PARITY_CNTL_DEFAULT 0x00000000 744#define mmMMVM_L2_IH_LOG_CNTL_DEFAULT 0x00000002 745#define mmMMVM_L2_IH_LOG_BUSY_DEFAULT 0x00000000 746#define mmMMVM_L2_CGTT_CLK_CTRL_DEFAULT 0x00008080 747#define mmMMVM_L2_CNTL5_DEFAULT 0x00003fe0 748#define mmMMVM_L2_GCR_CNTL_DEFAULT 0x00000000 749#define mmMMVM_L2_CGTT_BUSY_CTRL_DEFAULT 0x00000004 750#define mmMMVM_L2_PTE_CACHE_DUMP_CNTL_DEFAULT 0x00000000 751#define mmMMVM_L2_PTE_CACHE_DUMP_READ_DEFAULT 0x00000000 752 753 754// addressBlock: mmhub_mmutcl2_mmvml2vcdec 755#define mmMMVM_CONTEXT0_CNTL_DEFAULT 0x007ffe80 756#define mmMMVM_CONTEXT1_CNTL_DEFAULT 0x007ffe80 757#define mmMMVM_CONTEXT2_CNTL_DEFAULT 0x007ffe80 758#define mmMMVM_CONTEXT3_CNTL_DEFAULT 0x007ffe80 759#define mmMMVM_CONTEXT4_CNTL_DEFAULT 0x007ffe80 760#define mmMMVM_CONTEXT5_CNTL_DEFAULT 0x007ffe80 761#define mmMMVM_CONTEXT6_CNTL_DEFAULT 0x007ffe80 762#define mmMMVM_CONTEXT7_CNTL_DEFAULT 0x007ffe80 763#define mmMMVM_CONTEXT8_CNTL_DEFAULT 0x007ffe80 764#define mmMMVM_CONTEXT9_CNTL_DEFAULT 0x007ffe80 765#define mmMMVM_CONTEXT10_CNTL_DEFAULT 0x007ffe80 766#define mmMMVM_CONTEXT11_CNTL_DEFAULT 0x007ffe80 767#define mmMMVM_CONTEXT12_CNTL_DEFAULT 0x007ffe80 768#define mmMMVM_CONTEXT13_CNTL_DEFAULT 0x007ffe80 769#define mmMMVM_CONTEXT14_CNTL_DEFAULT 0x007ffe80 770#define mmMMVM_CONTEXT15_CNTL_DEFAULT 0x007ffe80 771#define mmMMVM_CONTEXTS_DISABLE_DEFAULT 0x00000000 772#define mmMMVM_L2_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 773#define mmMMVM_L2_CONTEXT0_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 774#define mmMMVM_L2_CONTEXT1_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 775#define mmMMVM_L2_CONTEXT2_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 776#define mmMMVM_L2_CONTEXT3_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 777#define mmMMVM_L2_CONTEXT4_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 778#define mmMMVM_L2_CONTEXT5_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 779#define mmMMVM_L2_CONTEXT6_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 780#define mmMMVM_L2_CONTEXT7_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 781#define mmMMVM_L2_CONTEXT8_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 782#define mmMMVM_L2_CONTEXT9_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 783#define mmMMVM_L2_CONTEXT10_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 784#define mmMMVM_L2_CONTEXT11_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 785#define mmMMVM_L2_CONTEXT12_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 786#define mmMMVM_L2_CONTEXT13_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 787#define mmMMVM_L2_CONTEXT14_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 788#define mmMMVM_L2_CONTEXT15_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 789 790 791// addressBlock: mmhub_mmutcl2_mmvml2pldec 792#define mmMMMC_VM_L2_PERFCOUNTER0_CFG_DEFAULT 0x00000000 793#define mmMMMC_VM_L2_PERFCOUNTER1_CFG_DEFAULT 0x00000000 794#define mmMMMC_VM_L2_PERFCOUNTER2_CFG_DEFAULT 0x00000000 795#define mmMMMC_VM_L2_PERFCOUNTER3_CFG_DEFAULT 0x00000000 796#define mmMMMC_VM_L2_PERFCOUNTER4_CFG_DEFAULT 0x00000000 797#define mmMMMC_VM_L2_PERFCOUNTER5_CFG_DEFAULT 0x00000000 798#define mmMMMC_VM_L2_PERFCOUNTER6_CFG_DEFAULT 0x00000000 799#define mmMMMC_VM_L2_PERFCOUNTER7_CFG_DEFAULT 0x00000000 800#define mmMMMC_VM_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 801#define mmMMUTCL2_PERFCOUNTER0_CFG_DEFAULT 0x00000000 802#define mmMMUTCL2_PERFCOUNTER1_CFG_DEFAULT 0x00000000 803#define mmMMUTCL2_PERFCOUNTER2_CFG_DEFAULT 0x00000000 804#define mmMMUTCL2_PERFCOUNTER3_CFG_DEFAULT 0x00000000 805#define mmMMUTCL2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 806 807 808// addressBlock: mmhub_mmutcl2_mmvml2prdec 809#define mmMMMC_VM_L2_PERFCOUNTER_LO_DEFAULT 0x00000000 810#define mmMMMC_VM_L2_PERFCOUNTER_HI_DEFAULT 0x00000000 811#define mmMMUTCL2_PERFCOUNTER_LO_DEFAULT 0x00000000 812#define mmMMUTCL2_PERFCOUNTER_HI_DEFAULT 0x00000000 813 814 815// addressBlock: mmhub_mmutcl2_mmvmsharedhvdec 816#define mmMMMC_VM_FB_SIZE_OFFSET_VF0_DEFAULT 0x00000000 817#define mmMMMC_VM_FB_SIZE_OFFSET_VF1_DEFAULT 0x00000000 818#define mmMMMC_VM_FB_SIZE_OFFSET_VF2_DEFAULT 0x00000000 819#define mmMMMC_VM_FB_SIZE_OFFSET_VF3_DEFAULT 0x00000000 820#define mmMMMC_VM_FB_SIZE_OFFSET_VF4_DEFAULT 0x00000000 821#define mmMMMC_VM_FB_SIZE_OFFSET_VF5_DEFAULT 0x00000000 822#define mmMMMC_VM_FB_SIZE_OFFSET_VF6_DEFAULT 0x00000000 823#define mmMMMC_VM_FB_SIZE_OFFSET_VF7_DEFAULT 0x00000000 824#define mmMMMC_VM_FB_SIZE_OFFSET_VF8_DEFAULT 0x00000000 825#define mmMMMC_VM_FB_SIZE_OFFSET_VF9_DEFAULT 0x00000000 826#define mmMMMC_VM_FB_SIZE_OFFSET_VF10_DEFAULT 0x00000000 827#define mmMMMC_VM_FB_SIZE_OFFSET_VF11_DEFAULT 0x00000000 828#define mmMMMC_VM_FB_SIZE_OFFSET_VF12_DEFAULT 0x00000000 829#define mmMMMC_VM_FB_SIZE_OFFSET_VF13_DEFAULT 0x00000000 830#define mmMMMC_VM_FB_SIZE_OFFSET_VF14_DEFAULT 0x00000000 831#define mmMMMC_VM_FB_SIZE_OFFSET_VF15_DEFAULT 0x00000000 832#define mmMMMC_VM_FB_SIZE_OFFSET_VF16_DEFAULT 0x00000000 833#define mmMMMC_VM_FB_SIZE_OFFSET_VF17_DEFAULT 0x00000000 834#define mmMMMC_VM_FB_SIZE_OFFSET_VF18_DEFAULT 0x00000000 835#define mmMMMC_VM_FB_SIZE_OFFSET_VF19_DEFAULT 0x00000000 836#define mmMMMC_VM_FB_SIZE_OFFSET_VF20_DEFAULT 0x00000000 837#define mmMMMC_VM_FB_SIZE_OFFSET_VF21_DEFAULT 0x00000000 838#define mmMMMC_VM_FB_SIZE_OFFSET_VF22_DEFAULT 0x00000000 839#define mmMMMC_VM_FB_SIZE_OFFSET_VF23_DEFAULT 0x00000000 840#define mmMMMC_VM_FB_SIZE_OFFSET_VF24_DEFAULT 0x00000000 841#define mmMMMC_VM_FB_SIZE_OFFSET_VF25_DEFAULT 0x00000000 842#define mmMMMC_VM_FB_SIZE_OFFSET_VF26_DEFAULT 0x00000000 843#define mmMMMC_VM_FB_SIZE_OFFSET_VF27_DEFAULT 0x00000000 844#define mmMMMC_VM_FB_SIZE_OFFSET_VF28_DEFAULT 0x00000000 845#define mmMMMC_VM_FB_SIZE_OFFSET_VF29_DEFAULT 0x00000000 846#define mmMMMC_VM_FB_SIZE_OFFSET_VF30_DEFAULT 0x00000000 847#define mmMMMC_VM_FB_SIZE_OFFSET_VF31_DEFAULT 0x00000000 848#define mmMMVM_IOMMU_MMIO_CNTRL_1_DEFAULT 0x00000100 849#define mmMMMC_VM_MARC_BASE_LO_0_DEFAULT 0x00000000 850#define mmMMMC_VM_MARC_BASE_LO_1_DEFAULT 0x00000000 851#define mmMMMC_VM_MARC_BASE_LO_2_DEFAULT 0x00000000 852#define mmMMMC_VM_MARC_BASE_LO_3_DEFAULT 0x00000000 853#define mmMMMC_VM_MARC_BASE_HI_0_DEFAULT 0x00000000 854#define mmMMMC_VM_MARC_BASE_HI_1_DEFAULT 0x00000000 855#define mmMMMC_VM_MARC_BASE_HI_2_DEFAULT 0x00000000 856#define mmMMMC_VM_MARC_BASE_HI_3_DEFAULT 0x00000000 857#define mmMMMC_VM_MARC_RELOC_LO_0_DEFAULT 0x00000000 858#define mmMMMC_VM_MARC_RELOC_LO_1_DEFAULT 0x00000000 859#define mmMMMC_VM_MARC_RELOC_LO_2_DEFAULT 0x00000000 860#define mmMMMC_VM_MARC_RELOC_LO_3_DEFAULT 0x00000000 861#define mmMMMC_VM_MARC_RELOC_HI_0_DEFAULT 0x00000000 862#define mmMMMC_VM_MARC_RELOC_HI_1_DEFAULT 0x00000000 863#define mmMMMC_VM_MARC_RELOC_HI_2_DEFAULT 0x00000000 864#define mmMMMC_VM_MARC_RELOC_HI_3_DEFAULT 0x00000000 865#define mmMMMC_VM_MARC_LEN_LO_0_DEFAULT 0x00000000 866#define mmMMMC_VM_MARC_LEN_LO_1_DEFAULT 0x00000000 867#define mmMMMC_VM_MARC_LEN_LO_2_DEFAULT 0x00000000 868#define mmMMMC_VM_MARC_LEN_LO_3_DEFAULT 0x00000000 869#define mmMMMC_VM_MARC_LEN_HI_0_DEFAULT 0x00000000 870#define mmMMMC_VM_MARC_LEN_HI_1_DEFAULT 0x00000000 871#define mmMMMC_VM_MARC_LEN_HI_2_DEFAULT 0x00000000 872#define mmMMMC_VM_MARC_LEN_HI_3_DEFAULT 0x00000000 873#define mmMMVM_IOMMU_CONTROL_REGISTER_DEFAULT 0x00000000 874#define mmMMVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_DEFAULT 0x00000000 875#define mmMMVM_PCIE_ATS_CNTL_DEFAULT 0x00000000 876#define mmMMVM_PCIE_ATS_CNTL_VF_0_DEFAULT 0x00000000 877#define mmMMVM_PCIE_ATS_CNTL_VF_1_DEFAULT 0x00000000 878#define mmMMVM_PCIE_ATS_CNTL_VF_2_DEFAULT 0x00000000 879#define mmMMVM_PCIE_ATS_CNTL_VF_3_DEFAULT 0x00000000 880#define mmMMVM_PCIE_ATS_CNTL_VF_4_DEFAULT 0x00000000 881#define mmMMVM_PCIE_ATS_CNTL_VF_5_DEFAULT 0x00000000 882#define mmMMVM_PCIE_ATS_CNTL_VF_6_DEFAULT 0x00000000 883#define mmMMVM_PCIE_ATS_CNTL_VF_7_DEFAULT 0x00000000 884#define mmMMVM_PCIE_ATS_CNTL_VF_8_DEFAULT 0x00000000 885#define mmMMVM_PCIE_ATS_CNTL_VF_9_DEFAULT 0x00000000 886#define mmMMVM_PCIE_ATS_CNTL_VF_10_DEFAULT 0x00000000 887#define mmMMVM_PCIE_ATS_CNTL_VF_11_DEFAULT 0x00000000 888#define mmMMVM_PCIE_ATS_CNTL_VF_12_DEFAULT 0x00000000 889#define mmMMVM_PCIE_ATS_CNTL_VF_13_DEFAULT 0x00000000 890#define mmMMVM_PCIE_ATS_CNTL_VF_14_DEFAULT 0x00000000 891#define mmMMVM_PCIE_ATS_CNTL_VF_15_DEFAULT 0x00000000 892#define mmMMVM_PCIE_ATS_CNTL_VF_16_DEFAULT 0x00000000 893#define mmMMVM_PCIE_ATS_CNTL_VF_17_DEFAULT 0x00000000 894#define mmMMVM_PCIE_ATS_CNTL_VF_18_DEFAULT 0x00000000 895#define mmMMVM_PCIE_ATS_CNTL_VF_19_DEFAULT 0x00000000 896#define mmMMVM_PCIE_ATS_CNTL_VF_20_DEFAULT 0x00000000 897#define mmMMVM_PCIE_ATS_CNTL_VF_21_DEFAULT 0x00000000 898#define mmMMVM_PCIE_ATS_CNTL_VF_22_DEFAULT 0x00000000 899#define mmMMVM_PCIE_ATS_CNTL_VF_23_DEFAULT 0x00000000 900#define mmMMVM_PCIE_ATS_CNTL_VF_24_DEFAULT 0x00000000 901#define mmMMVM_PCIE_ATS_CNTL_VF_25_DEFAULT 0x00000000 902#define mmMMVM_PCIE_ATS_CNTL_VF_26_DEFAULT 0x00000000 903#define mmMMVM_PCIE_ATS_CNTL_VF_27_DEFAULT 0x00000000 904#define mmMMVM_PCIE_ATS_CNTL_VF_28_DEFAULT 0x00000000 905#define mmMMVM_PCIE_ATS_CNTL_VF_29_DEFAULT 0x00000000 906#define mmMMVM_PCIE_ATS_CNTL_VF_30_DEFAULT 0x00000000 907#define mmMMVM_PCIE_ATS_CNTL_VF_31_DEFAULT 0x00000000 908 909 910// addressBlock: mmhub_mmutcl2_mmvmsharedpfdec 911#define mmMMMC_VM_NB_MMIOBASE_DEFAULT 0x00000000 912#define mmMMMC_VM_NB_MMIOLIMIT_DEFAULT 0x00000000 913#define mmMMMC_VM_NB_PCI_CTRL_DEFAULT 0x00000000 914#define mmMMMC_VM_NB_PCI_ARB_DEFAULT 0x00000008 915#define mmMMMC_VM_NB_TOP_OF_DRAM_SLOT1_DEFAULT 0x00000000 916#define mmMMMC_VM_NB_LOWER_TOP_OF_DRAM2_DEFAULT 0x00000000 917#define mmMMMC_VM_NB_UPPER_TOP_OF_DRAM2_DEFAULT 0x00000000 918#define mmMMMC_VM_FB_OFFSET_DEFAULT 0x00000000 919#define mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_DEFAULT 0x00000000 920#define mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_DEFAULT 0x00000000 921#define mmMMMC_VM_STEERING_DEFAULT 0x00000001 922#define mmMMMC_SHARED_VIRT_RESET_REQ_DEFAULT 0x00000000 923#define mmMMMC_MEM_POWER_LS_DEFAULT 0x00000208 924#define mmMMMC_VM_CACHEABLE_DRAM_ADDRESS_START_DEFAULT 0x00000000 925#define mmMMMC_VM_CACHEABLE_DRAM_ADDRESS_END_DEFAULT 0x000fffff 926#define mmMMMC_VM_APT_CNTL_DEFAULT 0x0000000c 927#define mmMMMC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL_DEFAULT 0x00000000 928#define mmMMMC_VM_LOCAL_HBM_ADDRESS_START_DEFAULT 0x00000000 929#define mmMMMC_VM_LOCAL_HBM_ADDRESS_END_DEFAULT 0x000fffff 930#define mmMMUTCL2_CGTT_CLK_CTRL_DEFAULT 0x00008080 931#define mmMMMC_SHARED_ACTIVE_FCN_ID_DEFAULT 0x00000000 932#define mmMMMC_SHARED_VIRT_RESET_REQ2_DEFAULT 0x00000000 933#define mmMMUTCL2_CGTT_BUSY_CTRL_DEFAULT 0x00000008 934#define mmMMUTCL2_HARVEST_BYPASS_GROUPS_DEFAULT 0x00000000 935 936 937// addressBlock: mmhub_mmutcl2_mmvmsharedvcdec 938#define mmMMMC_VM_FB_LOCATION_BASE_DEFAULT 0x00000000 939#define mmMMMC_VM_FB_LOCATION_TOP_DEFAULT 0x00000000 940#define mmMMMC_VM_AGP_TOP_DEFAULT 0x00000000 941#define mmMMMC_VM_AGP_BOT_DEFAULT 0x00000000 942#define mmMMMC_VM_AGP_BASE_DEFAULT 0x00000000 943#define mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_DEFAULT 0x00000000 944#define mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_DEFAULT 0x00000000 945#define mmMMMC_VM_MX_L1_TLB_CNTL_DEFAULT 0x00000501 946 947 948// addressBlock: mmhub_mmutcl2_mmatcl2pfcntrdec 949#define mmMM_ATC_L2_PERFCOUNTER_LO_DEFAULT 0x00000000 950#define mmMM_ATC_L2_PERFCOUNTER_HI_DEFAULT 0x00000000 951 952 953// addressBlock: mmhub_mmutcl2_mmatcl2pfcntldec 954#define mmMM_ATC_L2_PERFCOUNTER0_CFG_DEFAULT 0x00000000 955#define mmMM_ATC_L2_PERFCOUNTER1_CFG_DEFAULT 0x00000000 956#define mmMM_ATC_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 957 958 959// addressBlock: mmhub_mmutcl2_mmvml2ptdec 960#define mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 961#define mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 962#define mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 963#define mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 964#define mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 965#define mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 966#define mmMMVM_CONTEXT0_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 967#define mmMMVM_CONTEXT0_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 968#define mmMMVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 969#define mmMMVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 970#define mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 971#define mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 972#define mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 973#define mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 974#define mmMMVM_CONTEXT1_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 975#define mmMMVM_CONTEXT1_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 976#define mmMMVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 977#define mmMMVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 978#define mmMMVM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 979#define mmMMVM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 980#define mmMMVM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 981#define mmMMVM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 982#define mmMMVM_CONTEXT2_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 983#define mmMMVM_CONTEXT2_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 984#define mmMMVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 985#define mmMMVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 986#define mmMMVM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 987#define mmMMVM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 988#define mmMMVM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 989#define mmMMVM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 990#define mmMMVM_CONTEXT3_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 991#define mmMMVM_CONTEXT3_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 992#define mmMMVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 993#define mmMMVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 994#define mmMMVM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 995#define mmMMVM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 996#define mmMMVM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 997#define mmMMVM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 998#define mmMMVM_CONTEXT4_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 999#define mmMMVM_CONTEXT4_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1000#define mmMMVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1001#define mmMMVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1002#define mmMMVM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1003#define mmMMVM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1004#define mmMMVM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1005#define mmMMVM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1006#define mmMMVM_CONTEXT5_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1007#define mmMMVM_CONTEXT5_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1008#define mmMMVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1009#define mmMMVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1010#define mmMMVM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1011#define mmMMVM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1012#define mmMMVM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1013#define mmMMVM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1014#define mmMMVM_CONTEXT6_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1015#define mmMMVM_CONTEXT6_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1016#define mmMMVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1017#define mmMMVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1018#define mmMMVM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1019#define mmMMVM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1020#define mmMMVM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1021#define mmMMVM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1022#define mmMMVM_CONTEXT7_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1023#define mmMMVM_CONTEXT7_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1024#define mmMMVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1025#define mmMMVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1026#define mmMMVM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1027#define mmMMVM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1028#define mmMMVM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1029#define mmMMVM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1030#define mmMMVM_CONTEXT8_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1031#define mmMMVM_CONTEXT8_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1032#define mmMMVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1033#define mmMMVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1034#define mmMMVM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1035#define mmMMVM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1036#define mmMMVM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1037#define mmMMVM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1038#define mmMMVM_CONTEXT9_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1039#define mmMMVM_CONTEXT9_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1040#define mmMMVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1041#define mmMMVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1042#define mmMMVM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1043#define mmMMVM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1044#define mmMMVM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1045#define mmMMVM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1046#define mmMMVM_CONTEXT10_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1047#define mmMMVM_CONTEXT10_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1048#define mmMMVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1049#define mmMMVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1050#define mmMMVM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1051#define mmMMVM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1052#define mmMMVM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1053#define mmMMVM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1054#define mmMMVM_CONTEXT11_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1055#define mmMMVM_CONTEXT11_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1056#define mmMMVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1057#define mmMMVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1058#define mmMMVM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1059#define mmMMVM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1060#define mmMMVM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1061#define mmMMVM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1062#define mmMMVM_CONTEXT12_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1063#define mmMMVM_CONTEXT12_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1064#define mmMMVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1065#define mmMMVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1066#define mmMMVM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1067#define mmMMVM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1068#define mmMMVM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1069#define mmMMVM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1070#define mmMMVM_CONTEXT13_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1071#define mmMMVM_CONTEXT13_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1072#define mmMMVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1073#define mmMMVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1074#define mmMMVM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1075#define mmMMVM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1076#define mmMMVM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1077#define mmMMVM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1078#define mmMMVM_CONTEXT14_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1079#define mmMMVM_CONTEXT14_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1080#define mmMMVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1081#define mmMMVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1082#define mmMMVM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1083#define mmMMVM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1084#define mmMMVM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1085#define mmMMVM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1086#define mmMMVM_CONTEXT15_PAGE_TABLE_RESERVE0_DEFAULT 0x00000000 1087#define mmMMVM_CONTEXT15_PAGE_TABLE_RESERVE1_DEFAULT 0x00000000 1088 1089 1090// addressBlock: mmhub_mmutcl2_mmvml2indec 1091#define mmMMVM_INVALIDATE_ENG0_SEM_DEFAULT 0x00000000 1092#define mmMMVM_INVALIDATE_ENG0_REQ_DEFAULT 0x02f80000 1093#define mmMMVM_INVALIDATE_ENG0_ACK_DEFAULT 0x00000000 1094#define mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32_DEFAULT 0x00000000 1095#define mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32_DEFAULT 0x00000000 1096#define mmMMVM_INVALIDATE_ENG0_RESERVE0_DEFAULT 0x00000000 1097#define mmMMVM_INVALIDATE_ENG0_RESERVE1_DEFAULT 0x00000000 1098#define mmMMVM_INVALIDATE_ENG0_RESERVE2_DEFAULT 0x00000000 1099#define mmMMVM_INVALIDATE_ENG1_SEM_DEFAULT 0x00000000 1100#define mmMMVM_INVALIDATE_ENG1_REQ_DEFAULT 0x02f80000 1101#define mmMMVM_INVALIDATE_ENG1_ACK_DEFAULT 0x00000000 1102#define mmMMVM_INVALIDATE_ENG1_ADDR_RANGE_LO32_DEFAULT 0x00000000 1103#define mmMMVM_INVALIDATE_ENG1_ADDR_RANGE_HI32_DEFAULT 0x00000000 1104#define mmMMVM_INVALIDATE_ENG1_RESERVE0_DEFAULT 0x00000000 1105#define mmMMVM_INVALIDATE_ENG1_RESERVE1_DEFAULT 0x00000000 1106#define mmMMVM_INVALIDATE_ENG1_RESERVE2_DEFAULT 0x00000000 1107#define mmMMVM_INVALIDATE_ENG2_SEM_DEFAULT 0x00000000 1108#define mmMMVM_INVALIDATE_ENG2_REQ_DEFAULT 0x02f80000 1109#define mmMMVM_INVALIDATE_ENG2_ACK_DEFAULT 0x00000000 1110#define mmMMVM_INVALIDATE_ENG2_ADDR_RANGE_LO32_DEFAULT 0x00000000 1111#define mmMMVM_INVALIDATE_ENG2_ADDR_RANGE_HI32_DEFAULT 0x00000000 1112#define mmMMVM_INVALIDATE_ENG2_RESERVE0_DEFAULT 0x00000000 1113#define mmMMVM_INVALIDATE_ENG2_RESERVE1_DEFAULT 0x00000000 1114#define mmMMVM_INVALIDATE_ENG2_RESERVE2_DEFAULT 0x00000000 1115#define mmMMVM_INVALIDATE_ENG3_SEM_DEFAULT 0x00000000 1116#define mmMMVM_INVALIDATE_ENG3_REQ_DEFAULT 0x02f80000 1117#define mmMMVM_INVALIDATE_ENG3_ACK_DEFAULT 0x00000000 1118#define mmMMVM_INVALIDATE_ENG3_ADDR_RANGE_LO32_DEFAULT 0x00000000 1119#define mmMMVM_INVALIDATE_ENG3_ADDR_RANGE_HI32_DEFAULT 0x00000000 1120#define mmMMVM_INVALIDATE_ENG3_RESERVE0_DEFAULT 0x00000000 1121#define mmMMVM_INVALIDATE_ENG3_RESERVE1_DEFAULT 0x00000000 1122#define mmMMVM_INVALIDATE_ENG3_RESERVE2_DEFAULT 0x00000000 1123#define mmMMVM_INVALIDATE_ENG4_SEM_DEFAULT 0x00000000 1124#define mmMMVM_INVALIDATE_ENG4_REQ_DEFAULT 0x02f80000 1125#define mmMMVM_INVALIDATE_ENG4_ACK_DEFAULT 0x00000000 1126#define mmMMVM_INVALIDATE_ENG4_ADDR_RANGE_LO32_DEFAULT 0x00000000 1127#define mmMMVM_INVALIDATE_ENG4_ADDR_RANGE_HI32_DEFAULT 0x00000000 1128#define mmMMVM_INVALIDATE_ENG4_RESERVE0_DEFAULT 0x00000000 1129#define mmMMVM_INVALIDATE_ENG4_RESERVE1_DEFAULT 0x00000000 1130#define mmMMVM_INVALIDATE_ENG4_RESERVE2_DEFAULT 0x00000000 1131#define mmMMVM_INVALIDATE_ENG5_SEM_DEFAULT 0x00000000 1132#define mmMMVM_INVALIDATE_ENG5_REQ_DEFAULT 0x02f80000 1133#define mmMMVM_INVALIDATE_ENG5_ACK_DEFAULT 0x00000000 1134#define mmMMVM_INVALIDATE_ENG5_ADDR_RANGE_LO32_DEFAULT 0x00000000 1135#define mmMMVM_INVALIDATE_ENG5_ADDR_RANGE_HI32_DEFAULT 0x00000000 1136#define mmMMVM_INVALIDATE_ENG5_RESERVE0_DEFAULT 0x00000000 1137#define mmMMVM_INVALIDATE_ENG5_RESERVE1_DEFAULT 0x00000000 1138#define mmMMVM_INVALIDATE_ENG5_RESERVE2_DEFAULT 0x00000000 1139#define mmMMVM_INVALIDATE_ENG6_SEM_DEFAULT 0x00000000 1140#define mmMMVM_INVALIDATE_ENG6_REQ_DEFAULT 0x02f80000 1141#define mmMMVM_INVALIDATE_ENG6_ACK_DEFAULT 0x00000000 1142#define mmMMVM_INVALIDATE_ENG6_ADDR_RANGE_LO32_DEFAULT 0x00000000 1143#define mmMMVM_INVALIDATE_ENG6_ADDR_RANGE_HI32_DEFAULT 0x00000000 1144#define mmMMVM_INVALIDATE_ENG6_RESERVE0_DEFAULT 0x00000000 1145#define mmMMVM_INVALIDATE_ENG6_RESERVE1_DEFAULT 0x00000000 1146#define mmMMVM_INVALIDATE_ENG6_RESERVE2_DEFAULT 0x00000000 1147#define mmMMVM_INVALIDATE_ENG7_SEM_DEFAULT 0x00000000 1148#define mmMMVM_INVALIDATE_ENG7_REQ_DEFAULT 0x02f80000 1149#define mmMMVM_INVALIDATE_ENG7_ACK_DEFAULT 0x00000000 1150#define mmMMVM_INVALIDATE_ENG7_ADDR_RANGE_LO32_DEFAULT 0x00000000 1151#define mmMMVM_INVALIDATE_ENG7_ADDR_RANGE_HI32_DEFAULT 0x00000000 1152#define mmMMVM_INVALIDATE_ENG7_RESERVE0_DEFAULT 0x00000000 1153#define mmMMVM_INVALIDATE_ENG7_RESERVE1_DEFAULT 0x00000000 1154#define mmMMVM_INVALIDATE_ENG7_RESERVE2_DEFAULT 0x00000000 1155#define mmMMVM_INVALIDATE_ENG8_SEM_DEFAULT 0x00000000 1156#define mmMMVM_INVALIDATE_ENG8_REQ_DEFAULT 0x02f80000 1157#define mmMMVM_INVALIDATE_ENG8_ACK_DEFAULT 0x00000000 1158#define mmMMVM_INVALIDATE_ENG8_ADDR_RANGE_LO32_DEFAULT 0x00000000 1159#define mmMMVM_INVALIDATE_ENG8_ADDR_RANGE_HI32_DEFAULT 0x00000000 1160#define mmMMVM_INVALIDATE_ENG8_RESERVE0_DEFAULT 0x00000000 1161#define mmMMVM_INVALIDATE_ENG8_RESERVE1_DEFAULT 0x00000000 1162#define mmMMVM_INVALIDATE_ENG8_RESERVE2_DEFAULT 0x00000000 1163#define mmMMVM_INVALIDATE_ENG9_SEM_DEFAULT 0x00000000 1164#define mmMMVM_INVALIDATE_ENG9_REQ_DEFAULT 0x02f80000 1165#define mmMMVM_INVALIDATE_ENG9_ACK_DEFAULT 0x00000000 1166#define mmMMVM_INVALIDATE_ENG9_ADDR_RANGE_LO32_DEFAULT 0x00000000 1167#define mmMMVM_INVALIDATE_ENG9_ADDR_RANGE_HI32_DEFAULT 0x00000000 1168#define mmMMVM_INVALIDATE_ENG9_RESERVE0_DEFAULT 0x00000000 1169#define mmMMVM_INVALIDATE_ENG9_RESERVE1_DEFAULT 0x00000000 1170#define mmMMVM_INVALIDATE_ENG9_RESERVE2_DEFAULT 0x00000000 1171#define mmMMVM_INVALIDATE_ENG10_SEM_DEFAULT 0x00000000 1172#define mmMMVM_INVALIDATE_ENG10_REQ_DEFAULT 0x02f80000 1173#define mmMMVM_INVALIDATE_ENG10_ACK_DEFAULT 0x00000000 1174#define mmMMVM_INVALIDATE_ENG10_ADDR_RANGE_LO32_DEFAULT 0x00000000 1175#define mmMMVM_INVALIDATE_ENG10_ADDR_RANGE_HI32_DEFAULT 0x00000000 1176#define mmMMVM_INVALIDATE_ENG10_RESERVE0_DEFAULT 0x00000000 1177#define mmMMVM_INVALIDATE_ENG10_RESERVE1_DEFAULT 0x00000000 1178#define mmMMVM_INVALIDATE_ENG10_RESERVE2_DEFAULT 0x00000000 1179#define mmMMVM_INVALIDATE_ENG11_SEM_DEFAULT 0x00000000 1180#define mmMMVM_INVALIDATE_ENG11_REQ_DEFAULT 0x02f80000 1181#define mmMMVM_INVALIDATE_ENG11_ACK_DEFAULT 0x00000000 1182#define mmMMVM_INVALIDATE_ENG11_ADDR_RANGE_LO32_DEFAULT 0x00000000 1183#define mmMMVM_INVALIDATE_ENG11_ADDR_RANGE_HI32_DEFAULT 0x00000000 1184#define mmMMVM_INVALIDATE_ENG11_RESERVE0_DEFAULT 0x00000000 1185#define mmMMVM_INVALIDATE_ENG11_RESERVE1_DEFAULT 0x00000000 1186#define mmMMVM_INVALIDATE_ENG11_RESERVE2_DEFAULT 0x00000000 1187#define mmMMVM_INVALIDATE_ENG12_SEM_DEFAULT 0x00000000 1188#define mmMMVM_INVALIDATE_ENG12_REQ_DEFAULT 0x02f80000 1189#define mmMMVM_INVALIDATE_ENG12_ACK_DEFAULT 0x00000000 1190#define mmMMVM_INVALIDATE_ENG12_ADDR_RANGE_LO32_DEFAULT 0x00000000 1191#define mmMMVM_INVALIDATE_ENG12_ADDR_RANGE_HI32_DEFAULT 0x00000000 1192#define mmMMVM_INVALIDATE_ENG12_RESERVE0_DEFAULT 0x00000000 1193#define mmMMVM_INVALIDATE_ENG12_RESERVE1_DEFAULT 0x00000000 1194#define mmMMVM_INVALIDATE_ENG12_RESERVE2_DEFAULT 0x00000000 1195#define mmMMVM_INVALIDATE_ENG13_SEM_DEFAULT 0x00000000 1196#define mmMMVM_INVALIDATE_ENG13_REQ_DEFAULT 0x02f80000 1197#define mmMMVM_INVALIDATE_ENG13_ACK_DEFAULT 0x00000000 1198#define mmMMVM_INVALIDATE_ENG13_ADDR_RANGE_LO32_DEFAULT 0x00000000 1199#define mmMMVM_INVALIDATE_ENG13_ADDR_RANGE_HI32_DEFAULT 0x00000000 1200#define mmMMVM_INVALIDATE_ENG13_RESERVE0_DEFAULT 0x00000000 1201#define mmMMVM_INVALIDATE_ENG13_RESERVE1_DEFAULT 0x00000000 1202#define mmMMVM_INVALIDATE_ENG13_RESERVE2_DEFAULT 0x00000000 1203#define mmMMVM_INVALIDATE_ENG14_SEM_DEFAULT 0x00000000 1204#define mmMMVM_INVALIDATE_ENG14_REQ_DEFAULT 0x02f80000 1205#define mmMMVM_INVALIDATE_ENG14_ACK_DEFAULT 0x00000000 1206#define mmMMVM_INVALIDATE_ENG14_ADDR_RANGE_LO32_DEFAULT 0x00000000 1207#define mmMMVM_INVALIDATE_ENG14_ADDR_RANGE_HI32_DEFAULT 0x00000000 1208#define mmMMVM_INVALIDATE_ENG14_RESERVE0_DEFAULT 0x00000000 1209#define mmMMVM_INVALIDATE_ENG14_RESERVE1_DEFAULT 0x00000000 1210#define mmMMVM_INVALIDATE_ENG14_RESERVE2_DEFAULT 0x00000000 1211#define mmMMVM_INVALIDATE_ENG15_SEM_DEFAULT 0x00000000 1212#define mmMMVM_INVALIDATE_ENG15_REQ_DEFAULT 0x02f80000 1213#define mmMMVM_INVALIDATE_ENG15_ACK_DEFAULT 0x00000000 1214#define mmMMVM_INVALIDATE_ENG15_ADDR_RANGE_LO32_DEFAULT 0x00000000 1215#define mmMMVM_INVALIDATE_ENG15_ADDR_RANGE_HI32_DEFAULT 0x00000000 1216#define mmMMVM_INVALIDATE_ENG15_RESERVE0_DEFAULT 0x00000000 1217#define mmMMVM_INVALIDATE_ENG15_RESERVE1_DEFAULT 0x00000000 1218#define mmMMVM_INVALIDATE_ENG15_RESERVE2_DEFAULT 0x00000000 1219#define mmMMVM_INVALIDATE_ENG16_SEM_DEFAULT 0x00000000 1220#define mmMMVM_INVALIDATE_ENG16_REQ_DEFAULT 0x02f80000 1221#define mmMMVM_INVALIDATE_ENG16_ACK_DEFAULT 0x00000000 1222#define mmMMVM_INVALIDATE_ENG16_ADDR_RANGE_LO32_DEFAULT 0x00000000 1223#define mmMMVM_INVALIDATE_ENG16_ADDR_RANGE_HI32_DEFAULT 0x00000000 1224#define mmMMVM_INVALIDATE_ENG16_RESERVE0_DEFAULT 0x00000000 1225#define mmMMVM_INVALIDATE_ENG16_RESERVE1_DEFAULT 0x00000000 1226#define mmMMVM_INVALIDATE_ENG16_RESERVE2_DEFAULT 0x00000000 1227#define mmMMVM_INVALIDATE_ENG17_SEM_DEFAULT 0x00000000 1228#define mmMMVM_INVALIDATE_ENG17_REQ_DEFAULT 0x02f80000 1229#define mmMMVM_INVALIDATE_ENG17_ACK_DEFAULT 0x00000000 1230#define mmMMVM_INVALIDATE_ENG17_ADDR_RANGE_LO32_DEFAULT 0x00000000 1231#define mmMMVM_INVALIDATE_ENG17_ADDR_RANGE_HI32_DEFAULT 0x00000000 1232#define mmMMVM_INVALIDATE_ENG17_RESERVE0_DEFAULT 0x00000000 1233#define mmMMVM_INVALIDATE_ENG17_RESERVE1_DEFAULT 0x00000000 1234#define mmMMVM_INVALIDATE_ENG17_RESERVE2_DEFAULT 0x00000000 1235 1236 1237// addressBlock: mmhub_mmutcl2_mml2tlbpfdec 1238#define mmMML2TLB_TLB0_STATUS_DEFAULT 0x00000000 1239 1240 1241// addressBlock: mmhub_mmutcl2_mml2tlbpldec 1242#define mmMML2TLB_PERFCOUNTER0_CFG_DEFAULT 0x00000000 1243#define mmMML2TLB_PERFCOUNTER1_CFG_DEFAULT 0x00000000 1244#define mmMML2TLB_PERFCOUNTER2_CFG_DEFAULT 0x00000000 1245#define mmMML2TLB_PERFCOUNTER3_CFG_DEFAULT 0x00000000 1246#define mmMML2TLB_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 1247 1248 1249// addressBlock: mmhub_mmutcl2_mml2tlbprdec 1250#define mmMML2TLB_PERFCOUNTER_LO_DEFAULT 0x00000000 1251#define mmMML2TLB_PERFCOUNTER_HI_DEFAULT 0x00000000 1252 1253#endif
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