link_dp_training.h

  1/*
  2 * Copyright 2022 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26
 27#ifndef __DC_LINK_DP_TRAINING_H__
 28#define __DC_LINK_DP_TRAINING_H__
 29#include "link_service.h"
 30
 31bool perform_link_training_with_retries(
 32	const struct dc_link_settings *link_setting,
 33	bool skip_video_pattern,
 34	int attempts,
 35	struct pipe_ctx *pipe_ctx,
 36	enum signal_type signal,
 37	bool do_fallback);
 38
 39enum link_training_result dp_perform_link_training(
 40		struct dc_link *link,
 41		const struct link_resource *link_res,
 42		const struct dc_link_settings *link_settings,
 43		bool skip_video_pattern);
 44
 45bool dp_set_hw_training_pattern(
 46		struct dc_link *link,
 47		const struct link_resource *link_res,
 48		enum dc_dp_training_pattern pattern,
 49		uint32_t offset);
 50
 51void dp_set_hw_test_pattern(
 52		struct dc_link *link,
 53		const struct link_resource *link_res,
 54		enum dp_test_pattern test_pattern,
 55		uint8_t *custom_pattern,
 56		uint32_t custom_pattern_size);
 57
 58enum dc_status dpcd_set_training_pattern(
 59	struct dc_link *link,
 60	enum dc_dp_training_pattern training_pattern);
 61
 62/* Write DPCD drive settings. */
 63enum dc_status dpcd_set_lane_settings(
 64	struct dc_link *link,
 65	const struct link_training_settings *link_training_setting,
 66	uint32_t offset);
 67
 68/* Write DPCD link configuration data. */
 69enum dc_status dpcd_set_link_settings(
 70	struct dc_link *link,
 71	const struct link_training_settings *lt_settings);
 72
 73void dpcd_set_lt_pattern_and_lane_settings(
 74	struct dc_link *link,
 75	const struct link_training_settings *lt_settings,
 76	enum dc_dp_training_pattern pattern,
 77	uint32_t offset);
 78
 79/* Read training status and adjustment requests from DPCD. */
 80enum dc_status dp_get_lane_status_and_lane_adjust(
 81	struct dc_link *link,
 82	const struct link_training_settings *link_training_setting,
 83	union lane_status ln_status[LANE_COUNT_DP_MAX],
 84	union lane_align_status_updated *ln_align,
 85	union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
 86	uint32_t offset);
 87
 88enum dc_status dpcd_configure_lttpr_mode(
 89		struct dc_link *link,
 90		struct link_training_settings *lt_settings);
 91
 92enum dc_status configure_lttpr_mode_transparent(struct dc_link *link);
 93
 94enum dc_status dpcd_configure_channel_coding(
 95		struct dc_link *link,
 96		struct link_training_settings *lt_settings);
 97
 98void repeater_training_done(struct dc_link *link, uint32_t offset);
 99
100void start_clock_recovery_pattern_early(struct dc_link *link,
101		const struct link_resource *link_res,
102		struct link_training_settings *lt_settings,
103		uint32_t offset);
104
105void dp_decide_training_settings(
106		struct dc_link *link,
107		const struct link_resource *link_res,
108		const struct dc_link_settings *link_settings,
109		struct link_training_settings *lt_settings);
110
111void dp_decide_lane_settings(
112	const struct link_training_settings *lt_settings,
113	const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
114	struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
115	union dpcd_training_lane *dpcd_lane_settings);
116
117enum dc_dp_training_pattern decide_cr_training_pattern(
118		const struct dc_link_settings *link_settings);
119
120enum dc_dp_training_pattern decide_eq_training_pattern(struct dc_link *link,
121		const struct link_resource *link_res,
122		const struct dc_link_settings *link_settings);
123
124enum lttpr_mode dp_decide_lttpr_mode(struct dc_link *link,
125		struct dc_link_settings *link_setting);
126
127void dp_get_lttpr_mode_override(struct dc_link *link,
128		enum lttpr_mode *override);
129
130void override_training_settings(
131		struct dc_link *link,
132		const struct dc_link_training_overrides *overrides,
133		struct link_training_settings *lt_settings);
134
135/* Check DPCD training status registers to detect link loss. */
136enum link_training_result dp_check_link_loss_status(
137		struct dc_link *link,
138		const struct link_training_settings *link_training_setting);
139
140bool dp_is_cr_done(enum dc_lane_count ln_count,
141	union lane_status *dpcd_lane_status);
142
143bool dp_is_ch_eq_done(enum dc_lane_count ln_count,
144	union lane_status *dpcd_lane_status);
145bool dp_is_symbol_locked(enum dc_lane_count ln_count,
146	union lane_status *dpcd_lane_status);
147bool dp_is_interlane_aligned(union lane_align_status_updated align_status);
148
149bool is_repeater(const struct link_training_settings *lt_settings, uint32_t offset);
150
151bool dp_is_max_vs_reached(
152	const struct link_training_settings *lt_settings);
153
154uint8_t get_dpcd_link_rate(const struct dc_link_settings *link_settings);
155
156enum link_training_result dp_get_cr_failure(enum dc_lane_count ln_count,
157	union lane_status *dpcd_lane_status);
158
159void dp_hw_to_dpcd_lane_settings(
160	const struct link_training_settings *lt_settings,
161	const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
162	union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX]);
163
164void dp_wait_for_training_aux_rd_interval(
165	struct dc_link *link,
166	uint32_t wait_in_micro_secs);
167
168enum dpcd_training_patterns
169	dp_training_pattern_to_dpcd_training_pattern(
170	struct dc_link *link,
171	enum dc_dp_training_pattern pattern);
172
173uint8_t dp_initialize_scrambling_data_symbols(
174	struct dc_link *link,
175	enum dc_dp_training_pattern pattern);
176
177void dp_log_training_result(
178	struct dc_link *link,
179	const struct link_training_settings *lt_settings,
180	enum link_training_result status);
181
182uint32_t dp_translate_training_aux_read_interval(
183		uint32_t dpcd_aux_read_interval);
184
185uint8_t dp_get_nibble_at_index(const uint8_t *buf,
186	uint32_t index);
187
188bool dp_check_interlane_aligned(union lane_align_status_updated align_status,
189		struct dc_link *link,
190		uint8_t retries);
191
192uint32_t dp_get_eq_aux_rd_interval(
193		const struct dc_link *link,
194		const struct link_training_settings *lt_settings,
195		uint32_t offset,
196		uint8_t retries);
197
198bool dp_check_dpcd_reqeust_status(const struct dc_link *link,
199		enum dc_status status);
200
201#endif /* __DC_LINK_DP_TRAINING_H__ */