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link_hwss_dio.c
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linux-6.19.14/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
1/* 2 * Copyright 2022 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25#include "link_hwss_dio.h" 26#include "core_types.h" 27#include "link_enc_cfg.h" 28 29/** 30 * DOC: overview 31 * 32 * Display Input Output (DIO), is the display input and output unit in DCN. It 33 * includes output encoders to support different display output, like 34 * DisplayPort, HDMI, DVI interface, and others. It also includes the control 35 * and status channels for these interfaces. 36 */ 37 38 39void set_dio_throttled_vcp_size(struct pipe_ctx *pipe_ctx, 40 struct fixed31_32 throttled_vcp_size) 41{ 42 struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc; 43 44 stream_encoder->funcs->set_throttled_vcp_size( 45 stream_encoder, 46 throttled_vcp_size); 47} 48 49void setup_dio_stream_encoder(struct pipe_ctx *pipe_ctx) 50{ 51 struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc; 52 struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc; 53 54 if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment) 55 link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link); 56 if (!link_enc) { 57 ASSERT(link_enc); 58 return; 59 } 60 61 if (!dc_is_rgb_signal(pipe_ctx->stream->signal)) 62 link_enc->funcs->connect_dig_be_to_fe(link_enc, 63 pipe_ctx->stream_res.stream_enc->id, true); 64 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 65 pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(pipe_ctx->stream->link, 66 DPCD_SOURCE_SEQ_AFTER_CONNECT_DIG_FE_BE); 67 if (stream_enc->funcs->enable_stream) 68 stream_enc->funcs->enable_stream(stream_enc, 69 pipe_ctx->stream->signal, true); 70 if (stream_enc->funcs->map_stream_to_link) 71 stream_enc->funcs->map_stream_to_link(stream_enc, 72 stream_enc->stream_enc_inst, link_enc->transmitter - TRANSMITTER_UNIPHY_A); 73 if (stream_enc->funcs->set_input_mode) 74 stream_enc->funcs->set_input_mode(stream_enc, 75 pipe_ctx->stream_res.pix_clk_params.dio_se_pix_per_cycle); 76 if (stream_enc->funcs->enable_fifo) 77 stream_enc->funcs->enable_fifo(stream_enc); 78} 79 80void reset_dio_stream_encoder(struct pipe_ctx *pipe_ctx) 81{ 82 struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc; 83 struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc; 84 85 if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment) 86 link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link); 87 if (!link_enc) { 88 ASSERT(link_enc); 89 return; 90 } 91 92 if (!stream_enc) 93 return; 94 95 if (stream_enc->funcs->disable_fifo) 96 stream_enc->funcs->disable_fifo(stream_enc); 97 if (stream_enc->funcs->set_input_mode) 98 stream_enc->funcs->set_input_mode(stream_enc, 0); 99 if (stream_enc->funcs->enable_stream) 100 stream_enc->funcs->enable_stream(stream_enc, 101 pipe_ctx->stream->signal, false); 102 103 if (!dc_is_rgb_signal(pipe_ctx->stream->signal)) 104 link_enc->funcs->connect_dig_be_to_fe( 105 link_enc, 106 pipe_ctx->stream_res.stream_enc->id, 107 false); 108 109 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 110 pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence( 111 pipe_ctx->stream->link, 112 DPCD_SOURCE_SEQ_AFTER_DISCONNECT_DIG_FE_BE); 113 114} 115 116void setup_dio_stream_attribute(struct pipe_ctx *pipe_ctx) 117{ 118 struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc; 119 struct dc_stream_state *stream = pipe_ctx->stream; 120 struct dc_link *link = stream->link; 121 122 if (!dc_is_virtual_signal(stream->signal) && 123 !dc_is_rgb_signal(stream->signal)) 124 stream_encoder->funcs->setup_stereo_sync( 125 stream_encoder, 126 pipe_ctx->stream_res.tg->inst, 127 stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE); 128 129 if (dc_is_dp_signal(stream->signal)) 130 stream_encoder->funcs->dp_set_stream_attribute( 131 stream_encoder, 132 &stream->timing, 133 stream->output_color_space, 134 stream->use_vsc_sdp_for_colorimetry, 135 link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP); 136 else if (dc_is_hdmi_tmds_signal(stream->signal)) 137 stream_encoder->funcs->hdmi_set_stream_attribute( 138 stream_encoder, 139 &stream->timing, 140 stream->phy_pix_clk, 141 pipe_ctx->stream_res.audio != NULL); 142 else if (dc_is_dvi_signal(stream->signal)) 143 stream_encoder->funcs->dvi_set_stream_attribute( 144 stream_encoder, 145 &stream->timing, 146 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK); 147 else if (dc_is_lvds_signal(stream->signal)) 148 stream_encoder->funcs->lvds_set_stream_attribute( 149 stream_encoder, 150 &stream->timing); 151 152 if (dc_is_dp_signal(stream->signal)) 153 link->dc->link_srv->dp_trace_source_sequence(link, 154 DPCD_SOURCE_SEQ_AFTER_DP_STREAM_ATTR); 155} 156 157void enable_dio_dp_link_output(struct dc_link *link, 158 const struct link_resource *link_res, 159 enum signal_type signal, 160 enum clock_source_id clock_source, 161 const struct dc_link_settings *link_settings) 162{ 163 struct link_encoder *link_enc = link_res->dio_link_enc; 164 165 if (!link->dc->config.unify_link_enc_assignment) 166 link_enc = link_enc_cfg_get_link_enc(link); 167 if (!link_enc) { 168 ASSERT(link_enc); 169 return; 170 } 171 172 if (dc_is_dp_sst_signal(signal)) 173 link_enc->funcs->enable_dp_output( 174 link_enc, 175 link_settings, 176 clock_source); 177 else 178 link_enc->funcs->enable_dp_mst_output( 179 link_enc, 180 link_settings, 181 clock_source); 182 link->dc->link_srv->dp_trace_source_sequence(link, 183 DPCD_SOURCE_SEQ_AFTER_ENABLE_LINK_PHY); 184} 185 186void disable_dio_link_output(struct dc_link *link, 187 const struct link_resource *link_res, 188 enum signal_type signal) 189{ 190 struct link_encoder *link_enc = link_res->dio_link_enc; 191 192 if (!link->dc->config.unify_link_enc_assignment) 193 link_enc = link_enc_cfg_get_link_enc(link); 194 if (!link_enc) { 195 ASSERT(link_enc); 196 return; 197 } 198 199 link_enc->funcs->disable_output(link_enc, signal); 200 link->dc->link_srv->dp_trace_source_sequence(link, 201 DPCD_SOURCE_SEQ_AFTER_DISABLE_LINK_PHY); 202} 203 204void set_dio_dp_link_test_pattern(struct dc_link *link, 205 const struct link_resource *link_res, 206 struct encoder_set_dp_phy_pattern_param *tp_params) 207{ 208 struct link_encoder *link_enc = link_res->dio_link_enc; 209 210 if (!link->dc->config.unify_link_enc_assignment) 211 link_enc = link_enc_cfg_get_link_enc(link); 212 if (!link_enc) { 213 ASSERT(link_enc); 214 return; 215 } 216 217 link_enc->funcs->dp_set_phy_pattern(link_enc, tp_params); 218 link->dc->link_srv->dp_trace_source_sequence(link, DPCD_SOURCE_SEQ_AFTER_SET_SOURCE_PATTERN); 219} 220 221void set_dio_dp_lane_settings(struct dc_link *link, 222 const struct link_resource *link_res, 223 const struct dc_link_settings *link_settings, 224 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) 225{ 226 struct link_encoder *link_enc = link_res->dio_link_enc; 227 228 if (!link->dc->config.unify_link_enc_assignment) 229 link_enc = link_enc_cfg_get_link_enc(link); 230 if (!link_enc) { 231 ASSERT(link_enc); 232 return; 233 } 234 235 link_enc->funcs->dp_set_lane_settings(link_enc, link_settings, lane_settings); 236} 237 238void update_dio_stream_allocation_table(struct dc_link *link, 239 const struct link_resource *link_res, 240 const struct link_mst_stream_allocation_table *table) 241{ 242 struct link_encoder *link_enc = link_res->dio_link_enc; 243 244 if (!link->dc->config.unify_link_enc_assignment) 245 link_enc = link_enc_cfg_get_link_enc(link); 246 if (!link_enc) { 247 ASSERT(link_enc); 248 return; 249 } 250 251 link_enc->funcs->update_mst_stream_allocation_table(link_enc, table); 252} 253 254void setup_dio_audio_output(struct pipe_ctx *pipe_ctx, 255 struct audio_output *audio_output, uint32_t audio_inst) 256{ 257 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 258 pipe_ctx->stream_res.stream_enc->funcs->dp_audio_setup( 259 pipe_ctx->stream_res.stream_enc, 260 audio_inst, 261 &pipe_ctx->stream->audio_info); 262 else 263 pipe_ctx->stream_res.stream_enc->funcs->hdmi_audio_setup( 264 pipe_ctx->stream_res.stream_enc, 265 audio_inst, 266 &pipe_ctx->stream->audio_info, 267 &audio_output->crtc_info); 268} 269 270void enable_dio_audio_packet(struct pipe_ctx *pipe_ctx) 271{ 272 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 273 pipe_ctx->stream_res.stream_enc->funcs->dp_audio_enable( 274 pipe_ctx->stream_res.stream_enc); 275 276 pipe_ctx->stream_res.stream_enc->funcs->audio_mute_control( 277 pipe_ctx->stream_res.stream_enc, false); 278 279 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 280 pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence( 281 pipe_ctx->stream->link, 282 DPCD_SOURCE_SEQ_AFTER_ENABLE_AUDIO_STREAM); 283} 284 285void disable_dio_audio_packet(struct pipe_ctx *pipe_ctx) 286{ 287 pipe_ctx->stream_res.stream_enc->funcs->audio_mute_control( 288 pipe_ctx->stream_res.stream_enc, true); 289 290 if (pipe_ctx->stream_res.audio) { 291 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 292 pipe_ctx->stream_res.stream_enc->funcs->dp_audio_disable( 293 pipe_ctx->stream_res.stream_enc); 294 else 295 pipe_ctx->stream_res.stream_enc->funcs->hdmi_audio_disable( 296 pipe_ctx->stream_res.stream_enc); 297 } 298 299 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 300 pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence( 301 pipe_ctx->stream->link, 302 DPCD_SOURCE_SEQ_AFTER_DISABLE_AUDIO_STREAM); 303} 304 305static const struct link_hwss dio_link_hwss = { 306 .setup_stream_encoder = setup_dio_stream_encoder, 307 .reset_stream_encoder = reset_dio_stream_encoder, 308 .setup_stream_attribute = setup_dio_stream_attribute, 309 .disable_link_output = disable_dio_link_output, 310 .setup_audio_output = setup_dio_audio_output, 311 .enable_audio_packet = enable_dio_audio_packet, 312 .disable_audio_packet = disable_dio_audio_packet, 313 .ext = { 314 .set_throttled_vcp_size = set_dio_throttled_vcp_size, 315 .enable_dp_link_output = enable_dio_dp_link_output, 316 .set_dp_link_test_pattern = set_dio_dp_link_test_pattern, 317 .set_dp_lane_settings = set_dio_dp_lane_settings, 318 .update_stream_allocation_table = update_dio_stream_allocation_table, 319 }, 320}; 321 322/** 323 * can_use_dio_link_hwss - Check if the link_hwss is accessible 324 * 325 * @link: Reference a link struct containing one or more sinks and the 326 * connective status. 327 * @link_res: Mappable hardware resource used to enable a link. 328 * 329 * Returns: 330 * Return true if the link encoder is accessible from link. 331 */ 332bool can_use_dio_link_hwss(const struct dc_link *link, 333 const struct link_resource *link_res) 334{ 335 if (!link->dc->config.unify_link_enc_assignment) 336 return link->link_enc != NULL; 337 else 338 return link_res->dio_link_enc != NULL; 339} 340 341/** 342 * get_dio_link_hwss - Return link_hwss reference 343 * 344 * This function behaves like a get function to return the link_hwss populated 345 * in the link_hwss_dio.c file. 346 * 347 * Returns: 348 * Return the reference to the filled struct of link_hwss. 349 */ 350const struct link_hwss *get_dio_link_hwss(void) 351{ 352 return &dio_link_hwss; 353}
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