FILE
dcn10_hubbub.h
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linux-6.19.14/drivers/gpu/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.h
1/* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26#ifndef __DC_HUBBUB_DCN10_H__ 27#define __DC_HUBBUB_DCN10_H__ 28 29#include "core_types.h" 30#include "dchubbub.h" 31 32#define TO_DCN10_HUBBUB(hubbub)\ 33 container_of(hubbub, struct dcn10_hubbub, base) 34 35#define HUBBUB_REG_LIST_DCN_COMMON()\ 36 SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A),\ 37 SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A),\ 38 SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B),\ 39 SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B),\ 40 SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C),\ 41 SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C),\ 42 SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D),\ 43 SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D),\ 44 SR(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL),\ 45 SR(DCHUBBUB_ARB_DRAM_STATE_CNTL),\ 46 SR(DCHUBBUB_ARB_SAT_LEVEL),\ 47 SR(DCHUBBUB_ARB_DF_REQ_OUTSTAND),\ 48 SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \ 49 SR(DCHUBBUB_TEST_DEBUG_INDEX), \ 50 SR(DCHUBBUB_TEST_DEBUG_DATA),\ 51 SR(DCHUBBUB_SOFT_RESET) 52 53#define HUBBUB_VM_REG_LIST() \ 54 SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A),\ 55 SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B),\ 56 SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C),\ 57 SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D) 58 59#define HUBBUB_SR_WATERMARK_REG_LIST()\ 60 SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A),\ 61 SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A),\ 62 SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B),\ 63 SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B),\ 64 SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C),\ 65 SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C),\ 66 SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D),\ 67 SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D) 68 69#define HUBBUB_REG_LIST_DCN10(id)\ 70 HUBBUB_REG_LIST_DCN_COMMON(), \ 71 HUBBUB_VM_REG_LIST(), \ 72 HUBBUB_SR_WATERMARK_REG_LIST(), \ 73 SR(DCHUBBUB_SDPIF_FB_TOP),\ 74 SR(DCHUBBUB_SDPIF_FB_BASE),\ 75 SR(DCHUBBUB_SDPIF_FB_OFFSET),\ 76 SR(DCHUBBUB_SDPIF_AGP_BASE),\ 77 SR(DCHUBBUB_SDPIF_AGP_BOT),\ 78 SR(DCHUBBUB_SDPIF_AGP_TOP) 79 80struct dcn_hubbub_registers { 81 uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A; 82 uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A; 83 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A; 84 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A; 85 uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A; 86 uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B; 87 uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B; 88 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B; 89 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B; 90 uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B; 91 uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C; 92 uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C; 93 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C; 94 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C; 95 uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C; 96 uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D; 97 uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D; 98 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D; 99 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D; 100 uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D; 101 uint32_t DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL; 102 uint32_t DCHUBBUB_ARB_SAT_LEVEL; 103 uint32_t DCHUBBUB_ARB_DF_REQ_OUTSTAND; 104 uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL; 105 uint32_t DCHUBBUB_ARB_DRAM_STATE_CNTL; 106 uint32_t DCHUBBUB_TEST_DEBUG_INDEX; 107 uint32_t DCHUBBUB_TEST_DEBUG_DATA; 108 uint32_t DCHUBBUB_SDPIF_FB_TOP; 109 uint32_t DCHUBBUB_SDPIF_FB_BASE; 110 uint32_t DCHUBBUB_SDPIF_FB_OFFSET; 111 uint32_t DCHUBBUB_SDPIF_AGP_BASE; 112 uint32_t DCHUBBUB_SDPIF_AGP_BOT; 113 uint32_t DCHUBBUB_SDPIF_AGP_TOP; 114 uint32_t DCHUBBUB_CRC_CTRL; 115 uint32_t DCHUBBUB_SOFT_RESET; 116 uint32_t DCN_VM_FB_LOCATION_BASE; 117 uint32_t DCN_VM_FB_LOCATION_TOP; 118 uint32_t DCN_VM_FB_OFFSET; 119 uint32_t DCN_VM_AGP_BOT; 120 uint32_t DCN_VM_AGP_TOP; 121 uint32_t DCN_VM_AGP_BASE; 122 uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB; 123 uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB; 124 uint32_t DCN_VM_FAULT_ADDR_MSB; 125 uint32_t DCN_VM_FAULT_ADDR_LSB; 126 uint32_t DCN_VM_FAULT_CNTL; 127 uint32_t DCN_VM_FAULT_STATUS; 128 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_A; 129 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_B; 130 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_C; 131 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_D; 132 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A; 133 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B; 134 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C; 135 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D; 136 uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A; 137 uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B; 138 uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C; 139 uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D; 140 uint32_t DCHUBBUB_ARB_HOSTVM_CNTL; 141 uint32_t DCHVM_CTRL0; 142 uint32_t DCHVM_MEM_CTRL; 143 uint32_t DCHVM_CLK_CTRL; 144 uint32_t DCHVM_RIOMMU_CTRL0; 145 uint32_t DCHVM_RIOMMU_STAT0; 146 uint32_t DCHUBBUB_DET0_CTRL; 147 uint32_t DCHUBBUB_DET1_CTRL; 148 uint32_t DCHUBBUB_DET2_CTRL; 149 uint32_t DCHUBBUB_DET3_CTRL; 150 uint32_t DCHUBBUB_COMPBUF_CTRL; 151 uint32_t COMPBUF_RESERVED_SPACE; 152 uint32_t DCHUBBUB_DEBUG_CTRL_0; 153 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A; 154 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A; 155 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B; 156 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B; 157 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C; 158 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C; 159 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D; 160 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D; 161 uint32_t DCHUBBUB_ARB_USR_RETRAINING_CNTL; 162 uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A; 163 uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B; 164 uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C; 165 uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D; 166 uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A; 167 uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B; 168 uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C; 169 uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D; 170 uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A; 171 uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B; 172 uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C; 173 uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D; 174 uint32_t DCHUBBUB_ARB_MALL_CNTL; 175 uint32_t SDPIF_REQUEST_RATE_LIMIT; 176 uint32_t DCHUBBUB_SDPIF_CFG0; 177 uint32_t DCHUBBUB_SDPIF_CFG1; 178 uint32_t DCHUBBUB_CLOCK_CNTL; 179 uint32_t DCHUBBUB_MEM_PWR_MODE_CTRL; 180 uint32_t DCHUBBUB_ARB_QOS_FORCE; 181 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK1_A; 182 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK1_A; 183 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK1_B; 184 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK1_B; 185 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK2_A; 186 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK2_A; 187 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK2_B; 188 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK2_B; 189 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK3_A; 190 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK3_A; 191 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK3_B; 192 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK3_B; 193 uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK1_A; 194 uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK1_B; 195 uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK1_A; 196 uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK1_B; 197 uint32_t DCHUBBUB_ARB_REFCYC_PER_META_TRIP_A; 198 uint32_t DCHUBBUB_ARB_REFCYC_PER_META_TRIP_B; 199 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_MALL_A; 200 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_MALL_B; 201 uint32_t DCHUBBUB_TIMEOUT_DETECTION_CTRL1; 202 uint32_t DCHUBBUB_TIMEOUT_DETECTION_CTRL2; 203 uint32_t DCHUBBUB_CTRL_STATUS; 204}; 205 206#define HUBBUB_REG_FIELD_LIST_DCN32(type) \ 207 type DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_VALUE;\ 208 type DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_ENABLE;\ 209 type DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PSTATE_CHANGE_REQUEST;\ 210 type DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PRE_CSTATE;\ 211 type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A;\ 212 type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B;\ 213 type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C;\ 214 type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D;\ 215 type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A;\ 216 type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B;\ 217 type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C;\ 218 type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D;\ 219 type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A;\ 220 type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B;\ 221 type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C;\ 222 type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D;\ 223 type MALL_PREFETCH_COMPLETE;\ 224 type MALL_IN_USE 225 226#define HUBBUB_REG_FIELD_LIST_DCN35(type) \ 227 type DCHUBBUB_FGCG_REP_DIS;\ 228 type DCHUBBUB_ARB_ALLOW_CSTATE_DEEPSLEEP_LEGACY_MODE 229 230/* set field name */ 231#define HUBBUB_SF(reg_name, field_name, post_fix)\ 232 .field_name = reg_name ## __ ## field_name ## post_fix 233 234#define HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh)\ 235 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \ 236 HUBBUB_SF(DCHUBBUB_SOFT_RESET, DCHUBBUB_GLOBAL_SOFT_RESET, mask_sh), \ 237 HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, mask_sh), \ 238 HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE, mask_sh), \ 239 HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE, mask_sh), \ 240 HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE, mask_sh), \ 241 HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE, mask_sh), \ 242 HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE, mask_sh), \ 243 HUBBUB_SF(DCHUBBUB_ARB_SAT_LEVEL, DCHUBBUB_ARB_SAT_LEVEL, mask_sh), \ 244 HUBBUB_SF(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, mask_sh), \ 245 HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, mask_sh), \ 246 HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, mask_sh), \ 247 HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, mask_sh), \ 248 HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, mask_sh), \ 249 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, mask_sh), \ 250 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, mask_sh), \ 251 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, mask_sh), \ 252 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, mask_sh) 253 254#define HUBBUB_MASK_SH_LIST_STUTTER(mask_sh) \ 255 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, mask_sh), \ 256 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, mask_sh), \ 257 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, mask_sh), \ 258 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, mask_sh), \ 259 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, mask_sh), \ 260 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, mask_sh), \ 261 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, mask_sh), \ 262 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, mask_sh) 263 264#define HUBBUB_MASK_SH_LIST_DCN10(mask_sh)\ 265 HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh), \ 266 HUBBUB_MASK_SH_LIST_STUTTER(mask_sh), \ 267 HUBBUB_SF(DCHUBBUB_SDPIF_FB_TOP, SDPIF_FB_TOP, mask_sh), \ 268 HUBBUB_SF(DCHUBBUB_SDPIF_FB_BASE, SDPIF_FB_BASE, mask_sh), \ 269 HUBBUB_SF(DCHUBBUB_SDPIF_FB_OFFSET, SDPIF_FB_OFFSET, mask_sh), \ 270 HUBBUB_SF(DCHUBBUB_SDPIF_AGP_BASE, SDPIF_AGP_BASE, mask_sh), \ 271 HUBBUB_SF(DCHUBBUB_SDPIF_AGP_BOT, SDPIF_AGP_BOT, mask_sh), \ 272 HUBBUB_SF(DCHUBBUB_SDPIF_AGP_TOP, SDPIF_AGP_TOP, mask_sh) 273 274#define DCN_HUBBUB_REG_FIELD_LIST(type) \ 275 type DCHUBBUB_GLOBAL_TIMER_ENABLE; \ 276 type DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST;\ 277 type DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE;\ 278 type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE;\ 279 type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE;\ 280 type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE;\ 281 type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE;\ 282 type DCHUBBUB_ARB_SAT_LEVEL;\ 283 type DCHUBBUB_ARB_MIN_REQ_OUTSTAND;\ 284 type DCHUBBUB_GLOBAL_TIMER_REFDIV;\ 285 type DCHUBBUB_GLOBAL_SOFT_RESET; \ 286 type SDPIF_FB_TOP;\ 287 type SDPIF_FB_BASE;\ 288 type SDPIF_FB_OFFSET;\ 289 type SDPIF_AGP_BASE;\ 290 type SDPIF_AGP_BOT;\ 291 type SDPIF_AGP_TOP;\ 292 type FB_BASE;\ 293 type FB_TOP;\ 294 type FB_OFFSET;\ 295 type AGP_BOT;\ 296 type AGP_TOP;\ 297 type AGP_BASE;\ 298 type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A;\ 299 type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B;\ 300 type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C;\ 301 type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D;\ 302 type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\ 303 type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\ 304 type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\ 305 type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\ 306 type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB;\ 307 type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB;\ 308 type DCN_VM_FAULT_ADDR_MSB;\ 309 type DCN_VM_FAULT_ADDR_LSB;\ 310 type DCN_VM_ERROR_STATUS_CLEAR;\ 311 type DCN_VM_ERROR_STATUS_MODE;\ 312 type DCN_VM_ERROR_INTERRUPT_ENABLE;\ 313 type DCN_VM_RANGE_FAULT_DISABLE;\ 314 type DCN_VM_PRQ_FAULT_DISABLE;\ 315 type DCN_VM_ERROR_STATUS;\ 316 type DCN_VM_ERROR_VMID;\ 317 type DCN_VM_ERROR_TABLE_LEVEL;\ 318 type DCN_VM_ERROR_PIPE;\ 319 type DCN_VM_ERROR_INTERRUPT_STATUS;\ 320 type DCHUBBUB_TIMEOUT_ERROR_STATUS;\ 321 type DCHUBBUB_TIMEOUT_REQ_STALL_THRESHOLD;\ 322 type DCHUBBUB_TIMEOUT_PSTATE_STALL_THRESHOLD;\ 323 type DCHUBBUB_TIMEOUT_DETECTION_EN;\ 324 type DCHUBBUB_TIMEOUT_TIMER_RESET;\ 325 type ROB_UNDERFLOW_STATUS;\ 326 type ROB_OVERFLOW_STATUS;\ 327 type ROB_OVERFLOW_CLEAR;\ 328 type DCHUBBUB_HW_DEBUG;\ 329 type CSTATE_SWATH_CHK_GOOD_MODE 330 331#define HUBBUB_STUTTER_REG_FIELD_LIST(type) \ 332 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A;\ 333 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B;\ 334 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C;\ 335 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D;\ 336 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A;\ 337 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B;\ 338 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C;\ 339 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D 340 341 342#define HUBBUB_HVM_REG_FIELD_LIST(type) \ 343 type DCHUBBUB_ARB_MIN_REQ_OUTSTAND_COMMIT_THRESHOLD;\ 344 type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_A;\ 345 type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_B;\ 346 type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_C;\ 347 type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_D;\ 348 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_A;\ 349 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_B;\ 350 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_C;\ 351 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_D;\ 352 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_A;\ 353 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_B;\ 354 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_C;\ 355 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_D;\ 356 type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\ 357 type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\ 358 type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\ 359 type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\ 360 type DCHUBBUB_ARB_FRAC_URG_BW_NOM_A;\ 361 type DCHUBBUB_ARB_FRAC_URG_BW_NOM_B;\ 362 type DCHUBBUB_ARB_FRAC_URG_BW_NOM_C;\ 363 type DCHUBBUB_ARB_FRAC_URG_BW_NOM_D;\ 364 type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A;\ 365 type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B;\ 366 type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C;\ 367 type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D;\ 368 type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A;\ 369 type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B;\ 370 type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C;\ 371 type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D;\ 372 type DCHUBBUB_ARB_MAX_QOS_COMMIT_THRESHOLD;\ 373 type HOSTVM_INIT_REQ; \ 374 type HVM_GPUVMRET_PWR_REQ_DIS; \ 375 type HVM_GPUVMRET_FORCE_REQ; \ 376 type HVM_GPUVMRET_POWER_STATUS; \ 377 type HVM_DISPCLK_R_GATE_DIS; \ 378 type HVM_DISPCLK_G_GATE_DIS; \ 379 type HVM_DCFCLK_R_GATE_DIS; \ 380 type HVM_DCFCLK_G_GATE_DIS; \ 381 type TR_REQ_REQCLKREQ_MODE; \ 382 type TW_RSP_COMPCLKREQ_MODE; \ 383 type HOSTVM_PREFETCH_REQ; \ 384 type HOSTVM_POWERSTATUS; \ 385 type RIOMMU_ACTIVE; \ 386 type HOSTVM_PREFETCH_DONE 387 388#define HUBBUB_RET_REG_FIELD_LIST(type) \ 389 type DET_DEPTH;\ 390 type DET0_SIZE;\ 391 type DET1_SIZE;\ 392 type DET2_SIZE;\ 393 type DET3_SIZE;\ 394 type DET0_SIZE_CURRENT;\ 395 type DET1_SIZE_CURRENT;\ 396 type DET2_SIZE_CURRENT;\ 397 type DET3_SIZE_CURRENT;\ 398 type COMPBUF_SIZE;\ 399 type COMPBUF_SIZE_CURRENT;\ 400 type CONFIG_ERROR;\ 401 type COMPBUF_RESERVED_SPACE_64B;\ 402 type COMPBUF_RESERVED_SPACE_ZS;\ 403 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A;\ 404 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A;\ 405 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B;\ 406 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B;\ 407 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C;\ 408 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C;\ 409 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D;\ 410 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D;\ 411 type SDPIF_REQUEST_RATE_LIMIT;\ 412 type DISPCLK_R_DCHUBBUB_GATE_DIS;\ 413 type DCFCLK_R_DCHUBBUB_GATE_DIS;\ 414 type SDPIF_MAX_NUM_OUTSTANDING;\ 415 type DCHUBBUB_ARB_MAX_REQ_OUTSTAND;\ 416 type SDPIF_PORT_CONTROL;\ 417 type DET_MEM_PWR_LS_MODE 418 419 420#define HUBBUB_REG_FIELD_LIST_DCN4_01(type) \ 421 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK1_A;\ 422 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK1_A;\ 423 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK1_B;\ 424 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK1_B;\ 425 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK2_A;\ 426 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK2_A;\ 427 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK2_B;\ 428 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK2_B;\ 429 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK3_A;\ 430 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK3_A;\ 431 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK3_B;\ 432 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK3_B;\ 433 type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK1_A;\ 434 type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK1_B;\ 435 type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK1_A;\ 436 type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK1_B;\ 437 type DCHUBBUB_ARB_REFCYC_PER_META_TRIP_A;\ 438 type DCHUBBUB_ARB_REFCYC_PER_META_TRIP_B;\ 439 type DCHUBBUB_ARB_FRAC_URG_BW_MALL_A;\ 440 type DCHUBBUB_ARB_FRAC_URG_BW_MALL_B 441 442struct dcn_hubbub_shift { 443 DCN_HUBBUB_REG_FIELD_LIST(uint8_t); 444 HUBBUB_STUTTER_REG_FIELD_LIST(uint8_t); 445 HUBBUB_HVM_REG_FIELD_LIST(uint8_t); 446 HUBBUB_RET_REG_FIELD_LIST(uint8_t); 447 HUBBUB_REG_FIELD_LIST_DCN32(uint8_t); 448 HUBBUB_REG_FIELD_LIST_DCN35(uint8_t); 449 HUBBUB_REG_FIELD_LIST_DCN4_01(uint8_t); 450}; 451 452struct dcn_hubbub_mask { 453 DCN_HUBBUB_REG_FIELD_LIST(uint32_t); 454 HUBBUB_STUTTER_REG_FIELD_LIST(uint32_t); 455 HUBBUB_HVM_REG_FIELD_LIST(uint32_t); 456 HUBBUB_RET_REG_FIELD_LIST(uint32_t); 457 HUBBUB_REG_FIELD_LIST_DCN32(uint32_t); 458 HUBBUB_REG_FIELD_LIST_DCN35(uint32_t); 459 HUBBUB_REG_FIELD_LIST_DCN4_01(uint32_t); 460}; 461 462struct dc; 463 464struct dcn10_hubbub { 465 struct hubbub base; 466 const struct dcn_hubbub_registers *regs; 467 const struct dcn_hubbub_shift *shifts; 468 const struct dcn_hubbub_mask *masks; 469 unsigned int debug_test_index_pstate; 470 union dcn_watermark_set watermarks; 471}; 472 473void hubbub1_update_dchub( 474 struct hubbub *hubbub, 475 struct dchub_init_data *dh_data); 476 477bool hubbub1_verify_allow_pstate_change_high( 478 struct hubbub *hubbub); 479 480void hubbub1_wm_change_req_wa(struct hubbub *hubbub); 481 482bool hubbub1_program_watermarks( 483 struct hubbub *hubbub, 484 union dcn_watermark_set *watermarks, 485 unsigned int refclk_mhz, 486 bool safe_to_lower); 487 488void hubbub1_allow_self_refresh_control(struct hubbub *hubbub, bool allow); 489 490bool hubbub1_is_allow_self_refresh_enabled(struct hubbub *hubub); 491 492void hubbub1_wm_read_state(struct hubbub *hubbub, 493 struct dcn_hubbub_wm *wm); 494 495void hubbub1_soft_reset(struct hubbub *hubbub, bool reset); 496void hubbub1_construct(struct hubbub *hubbub, 497 struct dc_context *ctx, 498 const struct dcn_hubbub_registers *hubbub_regs, 499 const struct dcn_hubbub_shift *hubbub_shift, 500 const struct dcn_hubbub_mask *hubbub_mask); 501 502bool hubbub1_program_urgent_watermarks( 503 struct hubbub *hubbub, 504 union dcn_watermark_set *watermarks, 505 unsigned int refclk_mhz, 506 bool safe_to_lower); 507bool hubbub1_program_stutter_watermarks( 508 struct hubbub *hubbub, 509 union dcn_watermark_set *watermarks, 510 unsigned int refclk_mhz, 511 bool safe_to_lower); 512bool hubbub1_program_pstate_watermarks( 513 struct hubbub *hubbub, 514 union dcn_watermark_set *watermarks, 515 unsigned int refclk_mhz, 516 bool safe_to_lower); 517 518#endif
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