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display_rq_dlg_calc_314.h
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linux-6.19.14/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.h
1/* SPDX-License-Identifier: MIT */ 2/* 3 * Copyright 2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: AMD 24 * 25 */ 26 27#ifndef __DML314_DISPLAY_RQ_DLG_CALC_H__ 28#define __DML314_DISPLAY_RQ_DLG_CALC_H__ 29 30#include "../display_rq_dlg_helpers.h" 31 32struct display_mode_lib; 33 34// Function: dml_rq_dlg_get_rq_reg 35// Main entry point for test to get the register values out of this DML class. 36// This function calls <get_rq_param> and <extract_rq_regs> fucntions to calculate 37// and then populate the rq_regs struct 38// Input: 39// pipe_param - pipe source configuration (e.g. vp, pitch, scaling, dest, etc.) 40// Output: 41// rq_regs - struct that holds all the RQ registers field value. 42// See also: <display_rq_regs_st> 43void dml314_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, 44 display_rq_regs_st *rq_regs, 45 const display_pipe_params_st *pipe_param); 46 47// Function: dml_rq_dlg_get_dlg_reg 48// Calculate and return DLG and TTU register struct given the system setting 49// Output: 50// dlg_regs - output DLG register struct 51// ttu_regs - output DLG TTU register struct 52// Input: 53// e2e_pipe_param - "compacted" array of e2e pipe param struct 54// num_pipes - num of active "pipe" or "route" 55// pipe_idx - index that identifies the e2e_pipe_param that corresponding to this dlg 56// cstate - 0: when calculate min_ttu_vblank it is assumed cstate is not required. 1: Normal mode, cstate is considered. 57// Added for legacy or unrealistic timing tests. 58void dml314_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, 59 display_dlg_regs_st *dlg_regs, 60 display_ttu_regs_st *ttu_regs, 61 const display_e2e_pipe_params_st *e2e_pipe_param, 62 const unsigned int num_pipes, 63 const unsigned int pipe_idx, 64 const bool cstate_en, 65 const bool pstate_en, 66 const bool vm_en, 67 const bool ignore_viewport_pos, 68 const bool immediate_flip_support); 69 70#endif
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