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display_rq_dlg_calc_20.h

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linux-6.19.14/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h C
 1/*
 2 * Copyright 2018 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DML20_DISPLAY_RQ_DLG_CALC_H__
27#define __DML20_DISPLAY_RQ_DLG_CALC_H__
28
29#include "../display_rq_dlg_helpers.h"
30
31struct display_mode_lib;
32
33
34// Function: dml_rq_dlg_get_rq_reg
35//  Main entry point for test to get the register values out of this DML class.
36//  This function calls <get_rq_param> and <extract_rq_regs> functions to calculate
37//  and then populate the rq_regs struct
38// Input:
39//  pipe_src_param - pipe source configuration (e.g. vp, pitch, etc.)
40// Output:
41//  rq_regs - struct that holds all the RQ registers field value.
42//            See also: <display_rq_regs_st>
43void dml20_rq_dlg_get_rq_reg(
44		struct display_mode_lib *mode_lib,
45		display_rq_regs_st *rq_regs,
46		const display_pipe_params_st *pipe_param);
47
48
49// Function: dml_rq_dlg_get_dlg_reg
50//   Calculate and return DLG and TTU register struct given the system setting
51// Output:
52//  dlg_regs - output DLG register struct
53//  ttu_regs - output DLG TTU register struct
54// Input:
55//  e2e_pipe_param - "compacted" array of e2e pipe param struct
56//  num_pipes - num of active "pipe" or "route"
57//  pipe_idx - index that identifies the e2e_pipe_param that corresponding to this dlg
58//  cstate - 0: when calculate min_ttu_vblank it is assumed cstate is not required. 1: Normal mode, cstate is considered.
59//           Added for legacy or unrealistic timing tests.
60void dml20_rq_dlg_get_dlg_reg(
61		struct display_mode_lib *mode_lib,
62		display_dlg_regs_st *dlg_regs,
63		display_ttu_regs_st *ttu_regs,
64		const display_e2e_pipe_params_st *e2e_pipe_param,
65		const unsigned int num_pipes,
66		const unsigned int pipe_idx,
67		const bool cstate_en,
68		const bool pstate_en,
69		const bool vm_en,
70		const bool ignore_viewport_pos,
71		const bool immediate_flip_support);
72
73#endif
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