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dalsmc.h
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linux-6.19.14/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dalsmc.h
1// SPDX-License-Identifier: MIT 2// 3// Copyright 2024 Advanced Micro Devices, Inc. 4 5#ifndef DALSMC_H 6#define DALSMC_H 7 8#define DALSMC_VERSION 0x1 9 10// SMU Response Codes: 11#define DALSMC_Result_OK 0x1 12#define DALSMC_Result_Failed 0xFF 13#define DALSMC_Result_UnknownCmd 0xFE 14#define DALSMC_Result_CmdRejectedPrereq 0xFD 15#define DALSMC_Result_CmdRejectedBusy 0xFC 16 17 18 19// Message Definitions: 20#define DALSMC_MSG_TestMessage 0x1 21#define DALSMC_MSG_GetSmuVersion 0x2 22#define DALSMC_MSG_GetDriverIfVersion 0x3 23#define DALSMC_MSG_GetMsgHeaderVersion 0x4 24#define DALSMC_MSG_SetDalDramAddrHigh 0x5 25#define DALSMC_MSG_SetDalDramAddrLow 0x6 26#define DALSMC_MSG_TransferTableSmu2Dram 0x7 27#define DALSMC_MSG_TransferTableDram2Smu 0x8 28#define DALSMC_MSG_SetHardMinByFreq 0x9 29#define DALSMC_MSG_SetHardMaxByFreq 0xA 30#define DALSMC_MSG_GetDpmFreqByIndex 0xB 31#define DALSMC_MSG_GetDcModeMaxDpmFreq 0xC 32#define DALSMC_MSG_SetMinDeepSleepDcfclk 0xD 33#define DALSMC_MSG_NumOfDisplays 0xE 34#define DALSMC_MSG_SetExternalClientDfCstateAllow 0xF 35#define DALSMC_MSG_BacoAudioD3PME 0x10 36#define DALSMC_MSG_SetFclkSwitchAllow 0x11 37#define DALSMC_MSG_SetCabForUclkPstate 0x12 38#define DALSMC_MSG_SetWorstCaseUclkLatency 0x13 39#define DALSMC_MSG_DcnExitReset 0x14 40#define DALSMC_MSG_ReturnHardMinStatus 0x15 41#define DALSMC_MSG_SetAlwaysWaitDmcubResp 0x16 42#define DALSMC_MSG_IndicateDrrStatus 0x17 // PMFW 15811 43#define DALSMC_MSG_ActiveUclkFclk 0x18 44#define DALSMC_MSG_IdleUclkFclk 0x19 45#define DALSMC_MSG_SetUclkPstateAllow 0x1A 46#define DALSMC_MSG_SubvpUclkFclk 0x1B 47#define DALSMC_MSG_GetNumUmcChannels 0x1C 48#define DALSMC_Message_Count 0x1D 49 50typedef enum { 51 FCLK_SWITCH_DISALLOW, 52 FCLK_SWITCH_ALLOW, 53} FclkSwitchAllow_e; 54 55#endif
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