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dcn314_clk_mgr.h
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linux-6.19.14/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
1/* SPDX-License-Identifier: MIT */ 2/* 3 * Copyright 2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: AMD 24 * 25 */ 26 27#ifndef __DCN314_CLK_MGR_H__ 28#define __DCN314_CLK_MGR_H__ 29#include "clk_mgr_internal.h" 30 31#define DCN314_NUM_CLOCK_SOURCES 5 32 33struct dcn314_watermarks; 34 35struct dcn314_smu_watermark_set { 36 struct dcn314_watermarks *wm_set; 37 union large_integer mc_address; 38}; 39 40struct clk_mgr_dcn314 { 41 struct clk_mgr_internal base; 42 struct dcn314_smu_watermark_set smu_wm_set; 43}; 44 45struct dcn314_ss_info_table { 46 uint32_t ss_divider; 47 uint32_t ss_percentage[DCN314_NUM_CLOCK_SOURCES]; 48}; 49 50bool dcn314_are_clock_states_equal(struct dc_clocks *a, 51 struct dc_clocks *b); 52 53bool dcn314_is_spll_ssc_enabled(struct clk_mgr *clk_mgr_base); 54 55void dcn314_init_clocks(struct clk_mgr *clk_mgr); 56 57void dcn314_update_clocks(struct clk_mgr *clk_mgr_base, 58 struct dc_state *context, 59 bool safe_to_lower); 60 61void dcn314_clk_mgr_construct(struct dc_context *ctx, 62 struct clk_mgr_dcn314 *clk_mgr, 63 struct pp_smu_funcs *pp_smu, 64 struct dccg *dccg); 65 66void dcn314_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr_int); 67 68#endif //__DCN314_CLK_MGR_H__
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