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command_table_helper_dce112.c
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linux-6.19.14/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c
1/* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26#include "dm_services.h" 27 28#include "atom.h" 29 30#include "include/bios_parser_types.h" 31 32#include "../command_table_helper.h" 33 34static uint8_t signal_type_to_atom_dig_mode(enum signal_type s) 35{ 36 uint8_t atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DP; 37 38 switch (s) { 39 case SIGNAL_TYPE_DISPLAY_PORT: 40 case SIGNAL_TYPE_EDP: 41 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DP; 42 break; 43 case SIGNAL_TYPE_DVI_SINGLE_LINK: 44 case SIGNAL_TYPE_DVI_DUAL_LINK: 45 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DVI; 46 break; 47 case SIGNAL_TYPE_HDMI_TYPE_A: 48 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_HDMI; 49 break; 50 case SIGNAL_TYPE_DISPLAY_PORT_MST: 51 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DP_MST; 52 break; 53 default: 54 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DVI; 55 break; 56 } 57 58 return atom_dig_mode; 59} 60 61static uint8_t hpd_sel_to_atom(enum hpd_source_id id) 62{ 63 uint8_t atom_hpd_sel = 0; 64 65 switch (id) { 66 case HPD_SOURCEID1: 67 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD1_SEL; 68 break; 69 case HPD_SOURCEID2: 70 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD2_SEL; 71 break; 72 case HPD_SOURCEID3: 73 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD3_SEL; 74 break; 75 case HPD_SOURCEID4: 76 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD4_SEL; 77 break; 78 case HPD_SOURCEID5: 79 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD5_SEL; 80 break; 81 case HPD_SOURCEID6: 82 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD6_SEL; 83 break; 84 case HPD_SOURCEID_UNKNOWN: 85 default: 86 atom_hpd_sel = 0; 87 break; 88 } 89 return atom_hpd_sel; 90} 91 92static uint8_t dig_encoder_sel_to_atom(enum engine_id id) 93{ 94 /* On any ASIC after DCE80, we manually program the DIG_FE 95 * selection (see connect_dig_be_to_fe function of the link 96 * encoder), so translation should always return 0 (no FE). 97 */ 98 99 return 0; 100} 101 102static bool clock_source_id_to_atom( 103 enum clock_source_id id, 104 uint32_t *atom_pll_id) 105{ 106 bool result = true; 107 108 if (atom_pll_id != NULL) 109 switch (id) { 110 case CLOCK_SOURCE_COMBO_PHY_PLL0: 111 *atom_pll_id = ATOM_COMBOPHY_PLL0; 112 break; 113 case CLOCK_SOURCE_COMBO_PHY_PLL1: 114 *atom_pll_id = ATOM_COMBOPHY_PLL1; 115 break; 116 case CLOCK_SOURCE_COMBO_PHY_PLL2: 117 *atom_pll_id = ATOM_COMBOPHY_PLL2; 118 break; 119 case CLOCK_SOURCE_COMBO_PHY_PLL3: 120 *atom_pll_id = ATOM_COMBOPHY_PLL3; 121 break; 122 case CLOCK_SOURCE_COMBO_PHY_PLL4: 123 *atom_pll_id = ATOM_COMBOPHY_PLL4; 124 break; 125 case CLOCK_SOURCE_COMBO_PHY_PLL5: 126 *atom_pll_id = ATOM_COMBOPHY_PLL5; 127 break; 128 case CLOCK_SOURCE_COMBO_DISPLAY_PLL0: 129 *atom_pll_id = ATOM_PPLL0; 130 break; 131 case CLOCK_SOURCE_ID_DFS: 132 *atom_pll_id = ATOM_GCK_DFS; 133 break; 134 case CLOCK_SOURCE_ID_VCE: 135 *atom_pll_id = ATOM_DP_DTO; 136 break; 137 case CLOCK_SOURCE_ID_DP_DTO: 138 *atom_pll_id = ATOM_DP_DTO; 139 break; 140 case CLOCK_SOURCE_ID_UNDEFINED: 141 /* Should not happen */ 142 *atom_pll_id = ATOM_PPLL_INVALID; 143 result = false; 144 break; 145 default: 146 result = false; 147 break; 148 } 149 150 return result; 151} 152 153static uint8_t encoder_action_to_atom(enum bp_encoder_control_action action) 154{ 155 uint8_t atom_action = 0; 156 157 switch (action) { 158 case ENCODER_CONTROL_ENABLE: 159 atom_action = ATOM_ENABLE; 160 break; 161 case ENCODER_CONTROL_DISABLE: 162 atom_action = ATOM_DISABLE; 163 break; 164 case ENCODER_CONTROL_SETUP: 165 atom_action = ATOM_ENCODER_CMD_STREAM_SETUP; 166 break; 167 case ENCODER_CONTROL_INIT: 168 atom_action = ATOM_ENCODER_INIT; 169 break; 170 default: 171 BREAK_TO_DEBUGGER(); /* Unhandle action in driver.!! */ 172 break; 173 } 174 175 return atom_action; 176} 177 178static uint8_t disp_power_gating_action_to_atom( 179 enum bp_pipe_control_action action) 180{ 181 uint8_t atom_pipe_action = 0; 182 183 switch (action) { 184 case ASIC_PIPE_DISABLE: 185 atom_pipe_action = ATOM_DISABLE; 186 break; 187 case ASIC_PIPE_ENABLE: 188 atom_pipe_action = ATOM_ENABLE; 189 break; 190 case ASIC_PIPE_INIT: 191 atom_pipe_action = ATOM_INIT; 192 break; 193 default: 194 ASSERT_CRITICAL(false); /* Unhandle action in driver! */ 195 break; 196 } 197 198 return atom_pipe_action; 199} 200 201static bool dc_clock_type_to_atom( 202 enum bp_dce_clock_type id, 203 uint32_t *atom_clock_type) 204{ 205 bool retCode = true; 206 207 if (atom_clock_type != NULL) { 208 switch (id) { 209 case DCECLOCK_TYPE_DISPLAY_CLOCK: 210 *atom_clock_type = DCE_CLOCK_TYPE_DISPCLK; 211 break; 212 213 case DCECLOCK_TYPE_DPREFCLK: 214 *atom_clock_type = DCE_CLOCK_TYPE_DPREFCLK; 215 break; 216 217 default: 218 ASSERT_CRITICAL(false); /* Unhandle action in driver! */ 219 break; 220 } 221 } 222 223 return retCode; 224} 225 226static uint8_t transmitter_color_depth_to_atom(enum transmitter_color_depth id) 227{ 228 uint8_t atomColorDepth = 0; 229 230 switch (id) { 231 case TRANSMITTER_COLOR_DEPTH_24: 232 atomColorDepth = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_DIS; 233 break; 234 case TRANSMITTER_COLOR_DEPTH_30: 235 atomColorDepth = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_5_4; 236 break; 237 case TRANSMITTER_COLOR_DEPTH_36: 238 atomColorDepth = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_3_2; 239 break; 240 case TRANSMITTER_COLOR_DEPTH_48: 241 atomColorDepth = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_2_1; 242 break; 243 default: 244 ASSERT_CRITICAL(false); /* Unhandle action in driver! */ 245 break; 246 } 247 248 return atomColorDepth; 249} 250 251/* function table */ 252static const struct command_table_helper command_table_helper_funcs = { 253 .controller_id_to_atom = dal_cmd_table_helper_controller_id_to_atom, 254 .encoder_action_to_atom = encoder_action_to_atom, 255 .engine_bp_to_atom = engine_bp_to_atom, 256 .clock_source_id_to_atom = clock_source_id_to_atom, 257 .clock_source_id_to_atom_phy_clk_src_id = 258 clock_source_id_to_atom_phy_clk_src_id, 259 .signal_type_to_atom_dig_mode = signal_type_to_atom_dig_mode, 260 .hpd_sel_to_atom = hpd_sel_to_atom, 261 .dig_encoder_sel_to_atom = dig_encoder_sel_to_atom, 262 .phy_id_to_atom = phy_id_to_atom, 263 .disp_power_gating_action_to_atom = disp_power_gating_action_to_atom, 264 .assign_control_parameter = NULL, 265 .clock_source_id_to_ref_clk_src = NULL, 266 .transmitter_bp_to_atom = NULL, 267 .encoder_id_to_atom = dal_cmd_table_helper_encoder_id_to_atom, 268 .encoder_mode_bp_to_atom = dal_cmd_table_helper_encoder_mode_bp_to_atom, 269 .dc_clock_type_to_atom = dc_clock_type_to_atom, 270 .transmitter_color_depth_to_atom = transmitter_color_depth_to_atom, 271}; 272 273/* 274 * dal_cmd_tbl_helper_dce110_get_table 275 * 276 * @brief 277 * Initialize command table helper functions 278 * 279 * @param 280 * const struct command_table_helper **h - [out] struct of functions 281 * 282 */ 283const struct command_table_helper *dal_cmd_tbl_helper_dce112_get_table(void) 284{ 285 return &command_table_helper_funcs; 286}
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