kfd_svm.c

   1// SPDX-License-Identifier: GPL-2.0 OR MIT
   2/*
   3 * Copyright 2020-2021 Advanced Micro Devices, Inc.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a
   6 * copy of this software and associated documentation files (the "Software"),
   7 * to deal in the Software without restriction, including without limitation
   8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9 * and/or sell copies of the Software, and to permit persons to whom the
  10 * Software is furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21 * OTHER DEALINGS IN THE SOFTWARE.
  22 */
  23
  24#include <linux/types.h>
  25#include <linux/sched/task.h>
  26#include <linux/dynamic_debug.h>
  27#include <drm/ttm/ttm_tt.h>
  28#include <drm/drm_exec.h>
  29
  30#include "amdgpu_sync.h"
  31#include "amdgpu_object.h"
  32#include "amdgpu_vm.h"
  33#include "amdgpu_hmm.h"
  34#include "amdgpu.h"
  35#include "amdgpu_xgmi.h"
  36#include "amdgpu_reset.h"
  37#include "kfd_priv.h"
  38#include "kfd_svm.h"
  39#include "kfd_migrate.h"
  40#include "kfd_smi_events.h"
  41
  42#ifdef dev_fmt
  43#undef dev_fmt
  44#endif
  45#define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__
  46
  47#define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1
  48
  49/* Long enough to ensure no retry fault comes after svm range is restored and
  50 * page table is updated.
  51 */
  52#define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING	(2UL * NSEC_PER_MSEC)
  53#if IS_ENABLED(CONFIG_DYNAMIC_DEBUG)
  54#define dynamic_svm_range_dump(svms) \
  55	_dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
  56#else
  57#define dynamic_svm_range_dump(svms) \
  58	do { if (0) svm_range_debug_dump(svms); } while (0)
  59#endif
  60
  61/* Giant svm range split into smaller ranges based on this, it is decided using
  62 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to
  63 * power of 2MB.
  64 */
  65static uint64_t max_svm_range_pages;
  66
  67struct criu_svm_metadata {
  68	struct list_head list;
  69	struct kfd_criu_svm_range_priv_data data;
  70};
  71
  72static void svm_range_evict_svm_bo_worker(struct work_struct *work);
  73static bool
  74svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
  75				    const struct mmu_notifier_range *range,
  76				    unsigned long cur_seq);
  77static int
  78svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
  79		   uint64_t *bo_s, uint64_t *bo_l);
  80static const struct mmu_interval_notifier_ops svm_range_mn_ops = {
  81	.invalidate = svm_range_cpu_invalidate_pagetables,
  82};
  83
  84/**
  85 * svm_range_unlink - unlink svm_range from lists and interval tree
  86 * @prange: svm range structure to be removed
  87 *
  88 * Remove the svm_range from the svms and svm_bo lists and the svms
  89 * interval tree.
  90 *
  91 * Context: The caller must hold svms->lock
  92 */
  93static void svm_range_unlink(struct svm_range *prange)
  94{
  95	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
  96		 prange, prange->start, prange->last);
  97
  98	if (prange->svm_bo) {
  99		spin_lock(&prange->svm_bo->list_lock);
 100		list_del(&prange->svm_bo_list);
 101		spin_unlock(&prange->svm_bo->list_lock);
 102	}
 103
 104	list_del(&prange->list);
 105	if (prange->it_node.start != 0 && prange->it_node.last != 0)
 106		interval_tree_remove(&prange->it_node, &prange->svms->objects);
 107}
 108
 109static void
 110svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange)
 111{
 112	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
 113		 prange, prange->start, prange->last);
 114
 115	mmu_interval_notifier_insert_locked(&prange->notifier, mm,
 116				     prange->start << PAGE_SHIFT,
 117				     prange->npages << PAGE_SHIFT,
 118				     &svm_range_mn_ops);
 119}
 120
 121/**
 122 * svm_range_add_to_svms - add svm range to svms
 123 * @prange: svm range structure to be added
 124 *
 125 * Add the svm range to svms interval tree and link list
 126 *
 127 * Context: The caller must hold svms->lock
 128 */
 129static void svm_range_add_to_svms(struct svm_range *prange)
 130{
 131	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
 132		 prange, prange->start, prange->last);
 133
 134	list_move_tail(&prange->list, &prange->svms->list);
 135	prange->it_node.start = prange->start;
 136	prange->it_node.last = prange->last;
 137	interval_tree_insert(&prange->it_node, &prange->svms->objects);
 138}
 139
 140static void svm_range_remove_notifier(struct svm_range *prange)
 141{
 142	pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n",
 143		 prange->svms, prange,
 144		 prange->notifier.interval_tree.start >> PAGE_SHIFT,
 145		 prange->notifier.interval_tree.last >> PAGE_SHIFT);
 146
 147	if (prange->notifier.interval_tree.start != 0 &&
 148	    prange->notifier.interval_tree.last != 0)
 149		mmu_interval_notifier_remove(&prange->notifier);
 150}
 151
 152static bool
 153svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr)
 154{
 155	return dma_addr && !dma_mapping_error(dev, dma_addr) &&
 156	       !(dma_addr & SVM_RANGE_VRAM_DOMAIN);
 157}
 158
 159static int
 160svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange,
 161		      unsigned long offset, unsigned long npages,
 162		      unsigned long *hmm_pfns, uint32_t gpuidx)
 163{
 164	enum dma_data_direction dir = DMA_BIDIRECTIONAL;
 165	dma_addr_t *addr = prange->dma_addr[gpuidx];
 166	struct device *dev = adev->dev;
 167	struct page *page;
 168	int i, r;
 169
 170	if (!addr) {
 171		addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL);
 172		if (!addr)
 173			return -ENOMEM;
 174		prange->dma_addr[gpuidx] = addr;
 175	}
 176
 177	addr += offset;
 178	for (i = 0; i < npages; i++) {
 179		if (svm_is_valid_dma_mapping_addr(dev, addr[i]))
 180			dma_unmap_page(dev, addr[i], PAGE_SIZE, dir);
 181
 182		page = hmm_pfn_to_page(hmm_pfns[i]);
 183		if (is_zone_device_page(page)) {
 184			struct amdgpu_device *bo_adev = prange->svm_bo->node->adev;
 185
 186			addr[i] = (hmm_pfns[i] << PAGE_SHIFT) +
 187				   bo_adev->vm_manager.vram_base_offset -
 188				   bo_adev->kfd.pgmap.range.start;
 189			addr[i] |= SVM_RANGE_VRAM_DOMAIN;
 190			pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]);
 191			continue;
 192		}
 193		addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
 194		r = dma_mapping_error(dev, addr[i]);
 195		if (r) {
 196			dev_err(dev, "failed %d dma_map_page\n", r);
 197			return r;
 198		}
 199		pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n",
 200				     addr[i] >> PAGE_SHIFT, page_to_pfn(page));
 201	}
 202
 203	return 0;
 204}
 205
 206static int
 207svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap,
 208		  unsigned long offset, unsigned long npages,
 209		  unsigned long *hmm_pfns)
 210{
 211	struct kfd_process *p;
 212	uint32_t gpuidx;
 213	int r;
 214
 215	p = container_of(prange->svms, struct kfd_process, svms);
 216
 217	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
 218		struct kfd_process_device *pdd;
 219
 220		pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
 221		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
 222		if (!pdd) {
 223			pr_debug("failed to find device idx %d\n", gpuidx);
 224			return -EINVAL;
 225		}
 226
 227		r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages,
 228					  hmm_pfns, gpuidx);
 229		if (r)
 230			break;
 231	}
 232
 233	return r;
 234}
 235
 236void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr,
 237			 unsigned long offset, unsigned long npages)
 238{
 239	enum dma_data_direction dir = DMA_BIDIRECTIONAL;
 240	int i;
 241
 242	if (!dma_addr)
 243		return;
 244
 245	for (i = offset; i < offset + npages; i++) {
 246		if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i]))
 247			continue;
 248		pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT);
 249		dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir);
 250		dma_addr[i] = 0;
 251	}
 252}
 253
 254void svm_range_dma_unmap(struct svm_range *prange)
 255{
 256	struct kfd_process_device *pdd;
 257	dma_addr_t *dma_addr;
 258	struct device *dev;
 259	struct kfd_process *p;
 260	uint32_t gpuidx;
 261
 262	p = container_of(prange->svms, struct kfd_process, svms);
 263
 264	for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
 265		dma_addr = prange->dma_addr[gpuidx];
 266		if (!dma_addr)
 267			continue;
 268
 269		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
 270		if (!pdd) {
 271			pr_debug("failed to find device idx %d\n", gpuidx);
 272			continue;
 273		}
 274		dev = &pdd->dev->adev->pdev->dev;
 275
 276		svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages);
 277	}
 278}
 279
 280static void svm_range_free(struct svm_range *prange, bool do_unmap)
 281{
 282	uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT;
 283	struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms);
 284	uint32_t gpuidx;
 285
 286	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange,
 287		 prange->start, prange->last);
 288
 289	svm_range_vram_node_free(prange);
 290	if (do_unmap)
 291		svm_range_dma_unmap(prange);
 292
 293	if (do_unmap && !p->xnack_enabled) {
 294		pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size);
 295		amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
 296					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
 297	}
 298
 299	/* free dma_addr array for each gpu */
 300	for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
 301		if (prange->dma_addr[gpuidx]) {
 302			kvfree(prange->dma_addr[gpuidx]);
 303			prange->dma_addr[gpuidx] = NULL;
 304		}
 305	}
 306
 307	mutex_destroy(&prange->lock);
 308	mutex_destroy(&prange->migrate_mutex);
 309	kfree(prange);
 310}
 311
 312static void
 313svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location,
 314				 int32_t *prefetch_loc, uint8_t *granularity,
 315				 uint32_t *flags)
 316{
 317	*location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
 318	*prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
 319	*granularity = svms->default_granularity;
 320	*flags =
 321		KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT;
 322}
 323
 324static struct
 325svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start,
 326			 uint64_t last, bool update_mem_usage)
 327{
 328	uint64_t size = last - start + 1;
 329	struct svm_range *prange;
 330	struct kfd_process *p;
 331
 332	prange = kzalloc(sizeof(*prange), GFP_KERNEL);
 333	if (!prange)
 334		return NULL;
 335
 336	p = container_of(svms, struct kfd_process, svms);
 337	if (!p->xnack_enabled && update_mem_usage &&
 338	    amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT,
 339				    KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) {
 340		pr_info("SVM mapping failed, exceeds resident system memory limit\n");
 341		kfree(prange);
 342		return NULL;
 343	}
 344	prange->npages = size;
 345	prange->svms = svms;
 346	prange->start = start;
 347	prange->last = last;
 348	INIT_LIST_HEAD(&prange->list);
 349	INIT_LIST_HEAD(&prange->update_list);
 350	INIT_LIST_HEAD(&prange->svm_bo_list);
 351	INIT_LIST_HEAD(&prange->deferred_list);
 352	INIT_LIST_HEAD(&prange->child_list);
 353	atomic_set(&prange->invalid, 0);
 354	prange->validate_timestamp = 0;
 355	prange->vram_pages = 0;
 356	mutex_init(&prange->migrate_mutex);
 357	mutex_init(&prange->lock);
 358
 359	if (p->xnack_enabled)
 360		bitmap_copy(prange->bitmap_access, svms->bitmap_supported,
 361			    MAX_GPU_INSTANCE);
 362
 363	svm_range_set_default_attributes(svms, &prange->preferred_loc,
 364					 &prange->prefetch_loc,
 365					 &prange->granularity, &prange->flags);
 366
 367	pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last);
 368
 369	return prange;
 370}
 371
 372static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo)
 373{
 374	if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref))
 375		return false;
 376
 377	return true;
 378}
 379
 380static void svm_range_bo_release(struct kref *kref)
 381{
 382	struct svm_range_bo *svm_bo;
 383
 384	svm_bo = container_of(kref, struct svm_range_bo, kref);
 385	pr_debug("svm_bo 0x%p\n", svm_bo);
 386
 387	spin_lock(&svm_bo->list_lock);
 388	while (!list_empty(&svm_bo->range_list)) {
 389		struct svm_range *prange =
 390				list_first_entry(&svm_bo->range_list,
 391						struct svm_range, svm_bo_list);
 392		/* list_del_init tells a concurrent svm_range_vram_node_new when
 393		 * it's safe to reuse the svm_bo pointer and svm_bo_list head.
 394		 */
 395		list_del_init(&prange->svm_bo_list);
 396		spin_unlock(&svm_bo->list_lock);
 397
 398		pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
 399			 prange->start, prange->last);
 400		mutex_lock(&prange->lock);
 401		prange->svm_bo = NULL;
 402		/* prange should not hold vram page now */
 403		WARN_ONCE(prange->actual_loc, "prange should not hold vram page");
 404		mutex_unlock(&prange->lock);
 405
 406		spin_lock(&svm_bo->list_lock);
 407	}
 408	spin_unlock(&svm_bo->list_lock);
 409
 410	if (mmget_not_zero(svm_bo->eviction_fence->mm)) {
 411		struct kfd_process_device *pdd;
 412		struct kfd_process *p;
 413		struct mm_struct *mm;
 414
 415		mm = svm_bo->eviction_fence->mm;
 416		/*
 417		 * The forked child process takes svm_bo device pages ref, svm_bo could be
 418		 * released after parent process is gone.
 419		 */
 420		p = kfd_lookup_process_by_mm(mm);
 421		if (p) {
 422			pdd = kfd_get_process_device_data(svm_bo->node, p);
 423			if (pdd)
 424				atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage);
 425			kfd_unref_process(p);
 426		}
 427		mmput(mm);
 428	}
 429
 430	if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base))
 431		/* We're not in the eviction worker. Signal the fence. */
 432		dma_fence_signal(&svm_bo->eviction_fence->base);
 433	dma_fence_put(&svm_bo->eviction_fence->base);
 434	amdgpu_bo_unref(&svm_bo->bo);
 435	kfree(svm_bo);
 436}
 437
 438static void svm_range_bo_wq_release(struct work_struct *work)
 439{
 440	struct svm_range_bo *svm_bo;
 441
 442	svm_bo = container_of(work, struct svm_range_bo, release_work);
 443	svm_range_bo_release(&svm_bo->kref);
 444}
 445
 446static void svm_range_bo_release_async(struct kref *kref)
 447{
 448	struct svm_range_bo *svm_bo;
 449
 450	svm_bo = container_of(kref, struct svm_range_bo, kref);
 451	pr_debug("svm_bo 0x%p\n", svm_bo);
 452	INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release);
 453	schedule_work(&svm_bo->release_work);
 454}
 455
 456void svm_range_bo_unref_async(struct svm_range_bo *svm_bo)
 457{
 458	kref_put(&svm_bo->kref, svm_range_bo_release_async);
 459}
 460
 461static void svm_range_bo_unref(struct svm_range_bo *svm_bo)
 462{
 463	if (svm_bo)
 464		kref_put(&svm_bo->kref, svm_range_bo_release);
 465}
 466
 467static bool
 468svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange)
 469{
 470	mutex_lock(&prange->lock);
 471	if (!prange->svm_bo) {
 472		mutex_unlock(&prange->lock);
 473		return false;
 474	}
 475	if (prange->ttm_res) {
 476		/* We still have a reference, all is well */
 477		mutex_unlock(&prange->lock);
 478		return true;
 479	}
 480	if (svm_bo_ref_unless_zero(prange->svm_bo)) {
 481		/*
 482		 * Migrate from GPU to GPU, remove range from source svm_bo->node
 483		 * range list, and return false to allocate svm_bo from destination
 484		 * node.
 485		 */
 486		if (prange->svm_bo->node != node) {
 487			mutex_unlock(&prange->lock);
 488
 489			spin_lock(&prange->svm_bo->list_lock);
 490			list_del_init(&prange->svm_bo_list);
 491			spin_unlock(&prange->svm_bo->list_lock);
 492
 493			svm_range_bo_unref(prange->svm_bo);
 494			return false;
 495		}
 496		if (READ_ONCE(prange->svm_bo->evicting)) {
 497			struct dma_fence *f;
 498			struct svm_range_bo *svm_bo;
 499			/* The BO is getting evicted,
 500			 * we need to get a new one
 501			 */
 502			mutex_unlock(&prange->lock);
 503			svm_bo = prange->svm_bo;
 504			f = dma_fence_get(&svm_bo->eviction_fence->base);
 505			svm_range_bo_unref(prange->svm_bo);
 506			/* wait for the fence to avoid long spin-loop
 507			 * at list_empty_careful
 508			 */
 509			dma_fence_wait(f, false);
 510			dma_fence_put(f);
 511		} else {
 512			/* The BO was still around and we got
 513			 * a new reference to it
 514			 */
 515			mutex_unlock(&prange->lock);
 516			pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n",
 517				 prange->svms, prange->start, prange->last);
 518
 519			prange->ttm_res = prange->svm_bo->bo->tbo.resource;
 520			return true;
 521		}
 522
 523	} else {
 524		mutex_unlock(&prange->lock);
 525	}
 526
 527	/* We need a new svm_bo. Spin-loop to wait for concurrent
 528	 * svm_range_bo_release to finish removing this range from
 529	 * its range list and set prange->svm_bo to null. After this,
 530	 * it is safe to reuse the svm_bo pointer and svm_bo_list head.
 531	 */
 532	while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo)
 533		cond_resched();
 534
 535	return false;
 536}
 537
 538static struct svm_range_bo *svm_range_bo_new(void)
 539{
 540	struct svm_range_bo *svm_bo;
 541
 542	svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL);
 543	if (!svm_bo)
 544		return NULL;
 545
 546	kref_init(&svm_bo->kref);
 547	INIT_LIST_HEAD(&svm_bo->range_list);
 548	spin_lock_init(&svm_bo->list_lock);
 549
 550	return svm_bo;
 551}
 552
 553int
 554svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange,
 555			bool clear)
 556{
 557	struct kfd_process_device *pdd;
 558	struct amdgpu_bo_param bp;
 559	struct svm_range_bo *svm_bo;
 560	struct amdgpu_bo_user *ubo;
 561	struct amdgpu_bo *bo;
 562	struct kfd_process *p;
 563	struct mm_struct *mm;
 564	int r;
 565
 566	p = container_of(prange->svms, struct kfd_process, svms);
 567	pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n",
 568		 p->lead_thread->pid, prange->svms,
 569		 prange->start, prange->last);
 570
 571	if (svm_range_validate_svm_bo(node, prange))
 572		return 0;
 573
 574	svm_bo = svm_range_bo_new();
 575	if (!svm_bo) {
 576		pr_debug("failed to alloc svm bo\n");
 577		return -ENOMEM;
 578	}
 579	mm = get_task_mm(p->lead_thread);
 580	if (!mm) {
 581		pr_debug("failed to get mm\n");
 582		kfree(svm_bo);
 583		return -ESRCH;
 584	}
 585	svm_bo->node = node;
 586	svm_bo->eviction_fence =
 587		amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1),
 588					   mm,
 589					   svm_bo);
 590	mmput(mm);
 591	INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker);
 592	svm_bo->evicting = 0;
 593	memset(&bp, 0, sizeof(bp));
 594	bp.size = prange->npages * PAGE_SIZE;
 595	bp.byte_align = PAGE_SIZE;
 596	bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
 597	bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
 598	bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0;
 599	bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE;
 600	bp.type = ttm_bo_type_device;
 601	bp.resv = NULL;
 602	if (node->xcp)
 603		bp.xcp_id_plus1 = node->xcp->id + 1;
 604
 605	r = amdgpu_bo_create_user(node->adev, &bp, &ubo);
 606	if (r) {
 607		pr_debug("failed %d to create bo\n", r);
 608		goto create_bo_failed;
 609	}
 610	bo = &ubo->bo;
 611
 612	pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n",
 613		 bo->tbo.resource->start << PAGE_SHIFT, bp.size,
 614		 bp.xcp_id_plus1 - 1);
 615
 616	r = amdgpu_bo_reserve(bo, true);
 617	if (r) {
 618		pr_debug("failed %d to reserve bo\n", r);
 619		goto reserve_bo_failed;
 620	}
 621
 622	if (clear) {
 623		r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false);
 624		if (r) {
 625			pr_debug("failed %d to sync bo\n", r);
 626			amdgpu_bo_unreserve(bo);
 627			goto reserve_bo_failed;
 628		}
 629	}
 630
 631	r = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
 632	if (r) {
 633		pr_debug("failed %d to reserve bo\n", r);
 634		amdgpu_bo_unreserve(bo);
 635		goto reserve_bo_failed;
 636	}
 637	amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true);
 638
 639	amdgpu_bo_unreserve(bo);
 640
 641	svm_bo->bo = bo;
 642	prange->svm_bo = svm_bo;
 643	prange->ttm_res = bo->tbo.resource;
 644	prange->offset = 0;
 645
 646	spin_lock(&svm_bo->list_lock);
 647	list_add(&prange->svm_bo_list, &svm_bo->range_list);
 648	spin_unlock(&svm_bo->list_lock);
 649
 650	pdd = svm_range_get_pdd_by_node(prange, node);
 651	if (pdd)
 652		atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage);
 653
 654	return 0;
 655
 656reserve_bo_failed:
 657	amdgpu_bo_unref(&bo);
 658create_bo_failed:
 659	dma_fence_put(&svm_bo->eviction_fence->base);
 660	kfree(svm_bo);
 661	prange->ttm_res = NULL;
 662
 663	return r;
 664}
 665
 666void svm_range_vram_node_free(struct svm_range *prange)
 667{
 668	/* serialize prange->svm_bo unref */
 669	mutex_lock(&prange->lock);
 670	/* prange->svm_bo has not been unref */
 671	if (prange->ttm_res) {
 672		prange->ttm_res = NULL;
 673		mutex_unlock(&prange->lock);
 674		svm_range_bo_unref(prange->svm_bo);
 675	} else
 676		mutex_unlock(&prange->lock);
 677}
 678
 679struct kfd_node *
 680svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id)
 681{
 682	struct kfd_process *p;
 683	struct kfd_process_device *pdd;
 684
 685	p = container_of(prange->svms, struct kfd_process, svms);
 686	pdd = kfd_process_device_data_by_id(p, gpu_id);
 687	if (!pdd) {
 688		pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id);
 689		return NULL;
 690	}
 691
 692	return pdd->dev;
 693}
 694
 695struct kfd_process_device *
 696svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node)
 697{
 698	struct kfd_process *p;
 699
 700	p = container_of(prange->svms, struct kfd_process, svms);
 701
 702	return kfd_get_process_device_data(node, p);
 703}
 704
 705static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo)
 706{
 707	struct ttm_operation_ctx ctx = { false, false };
 708
 709	amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
 710
 711	return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
 712}
 713
 714static int
 715svm_range_check_attr(struct kfd_process *p,
 716		     uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
 717{
 718	uint32_t i;
 719
 720	for (i = 0; i < nattr; i++) {
 721		uint32_t val = attrs[i].value;
 722		int gpuidx = MAX_GPU_INSTANCE;
 723
 724		switch (attrs[i].type) {
 725		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
 726			if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM &&
 727			    val != KFD_IOCTL_SVM_LOCATION_UNDEFINED)
 728				gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
 729			break;
 730		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
 731			if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM)
 732				gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
 733			break;
 734		case KFD_IOCTL_SVM_ATTR_ACCESS:
 735		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
 736		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
 737			gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
 738			break;
 739		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
 740			break;
 741		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
 742			break;
 743		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
 744			break;
 745		default:
 746			pr_debug("unknown attr type 0x%x\n", attrs[i].type);
 747			return -EINVAL;
 748		}
 749
 750		if (gpuidx < 0) {
 751			pr_debug("no GPU 0x%x found\n", val);
 752			return -EINVAL;
 753		} else if (gpuidx < MAX_GPU_INSTANCE &&
 754			   !test_bit(gpuidx, p->svms.bitmap_supported)) {
 755			pr_debug("GPU 0x%x not supported\n", val);
 756			return -EINVAL;
 757		}
 758	}
 759
 760	return 0;
 761}
 762
 763static void
 764svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange,
 765		      uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
 766		      bool *update_mapping)
 767{
 768	uint32_t i;
 769	int gpuidx;
 770
 771	for (i = 0; i < nattr; i++) {
 772		switch (attrs[i].type) {
 773		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
 774			prange->preferred_loc = attrs[i].value;
 775			break;
 776		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
 777			prange->prefetch_loc = attrs[i].value;
 778			break;
 779		case KFD_IOCTL_SVM_ATTR_ACCESS:
 780		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
 781		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
 782			if (!p->xnack_enabled)
 783				*update_mapping = true;
 784
 785			gpuidx = kfd_process_gpuidx_from_gpuid(p,
 786							       attrs[i].value);
 787			if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
 788				bitmap_clear(prange->bitmap_access, gpuidx, 1);
 789				bitmap_clear(prange->bitmap_aip, gpuidx, 1);
 790			} else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
 791				bitmap_set(prange->bitmap_access, gpuidx, 1);
 792				bitmap_clear(prange->bitmap_aip, gpuidx, 1);
 793			} else {
 794				bitmap_clear(prange->bitmap_access, gpuidx, 1);
 795				bitmap_set(prange->bitmap_aip, gpuidx, 1);
 796			}
 797			break;
 798		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
 799			*update_mapping = true;
 800			prange->flags |= attrs[i].value;
 801			break;
 802		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
 803			*update_mapping = true;
 804			prange->flags &= ~attrs[i].value;
 805			break;
 806		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
 807			prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F);
 808			break;
 809		default:
 810			WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
 811		}
 812	}
 813}
 814
 815static bool
 816svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange,
 817			uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
 818{
 819	uint32_t i;
 820	int gpuidx;
 821
 822	for (i = 0; i < nattr; i++) {
 823		switch (attrs[i].type) {
 824		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
 825			if (prange->preferred_loc != attrs[i].value)
 826				return false;
 827			break;
 828		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
 829			/* Prefetch should always trigger a migration even
 830			 * if the value of the attribute didn't change.
 831			 */
 832			return false;
 833		case KFD_IOCTL_SVM_ATTR_ACCESS:
 834		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
 835		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
 836			gpuidx = kfd_process_gpuidx_from_gpuid(p,
 837							       attrs[i].value);
 838			if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
 839				if (test_bit(gpuidx, prange->bitmap_access) ||
 840				    test_bit(gpuidx, prange->bitmap_aip))
 841					return false;
 842			} else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
 843				if (!test_bit(gpuidx, prange->bitmap_access))
 844					return false;
 845			} else {
 846				if (!test_bit(gpuidx, prange->bitmap_aip))
 847					return false;
 848			}
 849			break;
 850		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
 851			if ((prange->flags & attrs[i].value) != attrs[i].value)
 852				return false;
 853			break;
 854		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
 855			if ((prange->flags & attrs[i].value) != 0)
 856				return false;
 857			break;
 858		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
 859			if (prange->granularity != attrs[i].value)
 860				return false;
 861			break;
 862		default:
 863			WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
 864		}
 865	}
 866
 867	return true;
 868}
 869
 870/**
 871 * svm_range_debug_dump - print all range information from svms
 872 * @svms: svm range list header
 873 *
 874 * debug output svm range start, end, prefetch location from svms
 875 * interval tree and link list
 876 *
 877 * Context: The caller must hold svms->lock
 878 */
 879static void svm_range_debug_dump(struct svm_range_list *svms)
 880{
 881	struct interval_tree_node *node;
 882	struct svm_range *prange;
 883
 884	pr_debug("dump svms 0x%p list\n", svms);
 885	pr_debug("range\tstart\tpage\tend\t\tlocation\n");
 886
 887	list_for_each_entry(prange, &svms->list, list) {
 888		pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
 889			 prange, prange->start, prange->npages,
 890			 prange->start + prange->npages - 1,
 891			 prange->actual_loc);
 892	}
 893
 894	pr_debug("dump svms 0x%p interval tree\n", svms);
 895	pr_debug("range\tstart\tpage\tend\t\tlocation\n");
 896	node = interval_tree_iter_first(&svms->objects, 0, ~0ULL);
 897	while (node) {
 898		prange = container_of(node, struct svm_range, it_node);
 899		pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
 900			 prange, prange->start, prange->npages,
 901			 prange->start + prange->npages - 1,
 902			 prange->actual_loc);
 903		node = interval_tree_iter_next(node, 0, ~0ULL);
 904	}
 905}
 906
 907static void *
 908svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements,
 909		     uint64_t offset, uint64_t *vram_pages)
 910{
 911	unsigned char *src = (unsigned char *)psrc + offset;
 912	unsigned char *dst;
 913	uint64_t i;
 914
 915	dst = kvmalloc_array(num_elements, size, GFP_KERNEL);
 916	if (!dst)
 917		return NULL;
 918
 919	if (!vram_pages) {
 920		memcpy(dst, src, num_elements * size);
 921		return (void *)dst;
 922	}
 923
 924	*vram_pages = 0;
 925	for (i = 0; i < num_elements; i++) {
 926		dma_addr_t *temp;
 927		temp = (dma_addr_t *)dst + i;
 928		*temp = *((dma_addr_t *)src + i);
 929		if (*temp&SVM_RANGE_VRAM_DOMAIN)
 930			(*vram_pages)++;
 931	}
 932
 933	return (void *)dst;
 934}
 935
 936static int
 937svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src)
 938{
 939	int i;
 940
 941	for (i = 0; i < MAX_GPU_INSTANCE; i++) {
 942		if (!src->dma_addr[i])
 943			continue;
 944		dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i],
 945					sizeof(*src->dma_addr[i]), src->npages, 0, NULL);
 946		if (!dst->dma_addr[i])
 947			return -ENOMEM;
 948	}
 949
 950	return 0;
 951}
 952
 953static int
 954svm_range_split_array(void *ppnew, void *ppold, size_t size,
 955		      uint64_t old_start, uint64_t old_n,
 956		      uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages)
 957{
 958	unsigned char *new, *old, *pold;
 959	uint64_t d;
 960
 961	if (!ppold)
 962		return 0;
 963	pold = *(unsigned char **)ppold;
 964	if (!pold)
 965		return 0;
 966
 967	d = (new_start - old_start) * size;
 968	/* get dma addr array for new range and calculte its vram page number */
 969	new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages);
 970	if (!new)
 971		return -ENOMEM;
 972	d = (new_start == old_start) ? new_n * size : 0;
 973	old = svm_range_copy_array(pold, size, old_n, d, NULL);
 974	if (!old) {
 975		kvfree(new);
 976		return -ENOMEM;
 977	}
 978	kvfree(pold);
 979	*(void **)ppold = old;
 980	*(void **)ppnew = new;
 981
 982	return 0;
 983}
 984
 985static int
 986svm_range_split_pages(struct svm_range *new, struct svm_range *old,
 987		      uint64_t start, uint64_t last)
 988{
 989	uint64_t npages = last - start + 1;
 990	int i, r;
 991
 992	for (i = 0; i < MAX_GPU_INSTANCE; i++) {
 993		r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i],
 994					  sizeof(*old->dma_addr[i]), old->start,
 995					  npages, new->start, new->npages,
 996					  old->actual_loc ? &new->vram_pages : NULL);
 997		if (r)
 998			return r;
 999	}
1000	if (old->actual_loc)
1001		old->vram_pages -= new->vram_pages;
1002
1003	return 0;
1004}
1005
1006static int
1007svm_range_split_nodes(struct svm_range *new, struct svm_range *old,
1008		      uint64_t start, uint64_t last)
1009{
1010	uint64_t npages = last - start + 1;
1011
1012	pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n",
1013		 new->svms, new, new->start, start, last);
1014
1015	if (new->start == old->start) {
1016		new->offset = old->offset;
1017		old->offset += new->npages;
1018	} else {
1019		new->offset = old->offset + npages;
1020	}
1021
1022	new->svm_bo = svm_range_bo_ref(old->svm_bo);
1023	new->ttm_res = old->ttm_res;
1024
1025	spin_lock(&new->svm_bo->list_lock);
1026	list_add(&new->svm_bo_list, &new->svm_bo->range_list);
1027	spin_unlock(&new->svm_bo->list_lock);
1028
1029	return 0;
1030}
1031
1032/**
1033 * svm_range_split_adjust - split range and adjust
1034 *
1035 * @new: new range
1036 * @old: the old range
1037 * @start: the old range adjust to start address in pages
1038 * @last: the old range adjust to last address in pages
1039 *
1040 * Copy system memory dma_addr or vram ttm_res in old range to new
1041 * range from new_start up to size new->npages, the remaining old range is from
1042 * start to last
1043 *
1044 * Return:
1045 * 0 - OK, -ENOMEM - out of memory
1046 */
1047static int
1048svm_range_split_adjust(struct svm_range *new, struct svm_range *old,
1049		      uint64_t start, uint64_t last)
1050{
1051	int r;
1052
1053	pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n",
1054		 new->svms, new->start, old->start, old->last, start, last);
1055
1056	if (new->start < old->start ||
1057	    new->last > old->last) {
1058		WARN_ONCE(1, "invalid new range start or last\n");
1059		return -EINVAL;
1060	}
1061
1062	r = svm_range_split_pages(new, old, start, last);
1063	if (r)
1064		return r;
1065
1066	if (old->actual_loc && old->ttm_res) {
1067		r = svm_range_split_nodes(new, old, start, last);
1068		if (r)
1069			return r;
1070	}
1071
1072	old->npages = last - start + 1;
1073	old->start = start;
1074	old->last = last;
1075	new->flags = old->flags;
1076	new->preferred_loc = old->preferred_loc;
1077	new->prefetch_loc = old->prefetch_loc;
1078	new->actual_loc = old->actual_loc;
1079	new->granularity = old->granularity;
1080	new->mapped_to_gpu = old->mapped_to_gpu;
1081	bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1082	bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1083	atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount));
1084
1085	return 0;
1086}
1087
1088/**
1089 * svm_range_split - split a range in 2 ranges
1090 *
1091 * @prange: the svm range to split
1092 * @start: the remaining range start address in pages
1093 * @last: the remaining range last address in pages
1094 * @new: the result new range generated
1095 *
1096 * Two cases only:
1097 * case 1: if start == prange->start
1098 *         prange ==> prange[start, last]
1099 *         new range [last + 1, prange->last]
1100 *
1101 * case 2: if last == prange->last
1102 *         prange ==> prange[start, last]
1103 *         new range [prange->start, start - 1]
1104 *
1105 * Return:
1106 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last
1107 */
1108static int
1109svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last,
1110		struct svm_range **new)
1111{
1112	uint64_t old_start = prange->start;
1113	uint64_t old_last = prange->last;
1114	struct svm_range_list *svms;
1115	int r = 0;
1116
1117	pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms,
1118		 old_start, old_last, start, last);
1119
1120	if (old_start != start && old_last != last)
1121		return -EINVAL;
1122	if (start < old_start || last > old_last)
1123		return -EINVAL;
1124
1125	svms = prange->svms;
1126	if (old_start == start)
1127		*new = svm_range_new(svms, last + 1, old_last, false);
1128	else
1129		*new = svm_range_new(svms, old_start, start - 1, false);
1130	if (!*new)
1131		return -ENOMEM;
1132
1133	r = svm_range_split_adjust(*new, prange, start, last);
1134	if (r) {
1135		pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n",
1136			 r, old_start, old_last, start, last);
1137		svm_range_free(*new, false);
1138		*new = NULL;
1139	}
1140
1141	return r;
1142}
1143
1144static int
1145svm_range_split_tail(struct svm_range *prange, uint64_t new_last,
1146		     struct list_head *insert_list, struct list_head *remap_list)
1147{
1148	unsigned long last_align_down = ALIGN_DOWN(prange->last, 512);
1149	unsigned long start_align = ALIGN(prange->start, 512);
1150	bool huge_page_mapping = last_align_down > start_align;
1151	struct svm_range *tail = NULL;
1152	int r;
1153
1154	r = svm_range_split(prange, prange->start, new_last, &tail);
1155
1156	if (r)
1157		return r;
1158
1159	list_add(&tail->list, insert_list);
1160
1161	if (huge_page_mapping && tail->start > start_align &&
1162	    tail->start < last_align_down && (!IS_ALIGNED(tail->start, 512)))
1163		list_add(&tail->update_list, remap_list);
1164
1165	return 0;
1166}
1167
1168static int
1169svm_range_split_head(struct svm_range *prange, uint64_t new_start,
1170		     struct list_head *insert_list, struct list_head *remap_list)
1171{
1172	unsigned long last_align_down = ALIGN_DOWN(prange->last, 512);
1173	unsigned long start_align = ALIGN(prange->start, 512);
1174	bool huge_page_mapping = last_align_down > start_align;
1175	struct svm_range *head = NULL;
1176	int r;
1177
1178	r = svm_range_split(prange, new_start, prange->last, &head);
1179
1180	if (r)
1181		return r;
1182
1183	list_add(&head->list, insert_list);
1184
1185	if (huge_page_mapping && head->last + 1 > start_align &&
1186	    head->last + 1 < last_align_down && (!IS_ALIGNED(head->last, 512)))
1187		list_add(&head->update_list, remap_list);
1188
1189	return 0;
1190}
1191
1192static void
1193svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op)
1194{
1195	pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
1196		 pchild, pchild->start, pchild->last, prange, op);
1197
1198	pchild->work_item.mm = NULL;
1199	pchild->work_item.op = op;
1200	list_add_tail(&pchild->child_list, &prange->child_list);
1201}
1202
1203static bool
1204svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b)
1205{
1206	return (node_a->adev == node_b->adev ||
1207		amdgpu_xgmi_same_hive(node_a->adev, node_b->adev));
1208}
1209
1210static uint64_t
1211svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm,
1212			struct svm_range *prange, int domain)
1213{
1214	struct kfd_node *bo_node;
1215	uint32_t flags = prange->flags;
1216	uint32_t mapping_flags = 0;
1217	uint32_t gc_ip_version = KFD_GC_VERSION(node);
1218	uint64_t pte_flags;
1219	bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN);
1220	bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT);
1221	bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT;
1222	unsigned int mtype_local;
1223
1224	if (domain == SVM_RANGE_VRAM_DOMAIN)
1225		bo_node = prange->svm_bo->node;
1226
1227	switch (gc_ip_version) {
1228	case IP_VERSION(9, 4, 1):
1229		if (domain == SVM_RANGE_VRAM_DOMAIN) {
1230			if (bo_node == node) {
1231				mapping_flags |= coherent ?
1232					AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1233			} else {
1234				mapping_flags |= coherent ?
1235					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1236				if (svm_nodes_in_same_hive(node, bo_node))
1237					snoop = true;
1238			}
1239		} else {
1240			mapping_flags |= coherent ?
1241				AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1242		}
1243		break;
1244	case IP_VERSION(9, 4, 2):
1245		if (domain == SVM_RANGE_VRAM_DOMAIN) {
1246			if (bo_node == node) {
1247				mapping_flags |= coherent ?
1248					AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1249				if (node->adev->gmc.xgmi.connected_to_cpu)
1250					snoop = true;
1251			} else {
1252				mapping_flags |= coherent ?
1253					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1254				if (svm_nodes_in_same_hive(node, bo_node))
1255					snoop = true;
1256			}
1257		} else {
1258			mapping_flags |= coherent ?
1259				AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1260		}
1261		break;
1262	case IP_VERSION(9, 4, 3):
1263	case IP_VERSION(9, 4, 4):
1264	case IP_VERSION(9, 5, 0):
1265		if (ext_coherent)
1266			mtype_local = AMDGPU_VM_MTYPE_CC;
1267		else
1268			mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
1269				amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1270		snoop = true;
1271		if (domain == SVM_RANGE_VRAM_DOMAIN) {
1272			/* local HBM region close to partition */
1273			if (bo_node->adev == node->adev &&
1274			    (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id))
1275				mapping_flags |= mtype_local;
1276			/* local HBM region far from partition or remote XGMI GPU
1277			 * with regular system scope coherence
1278			 */
1279			else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent)
1280				mapping_flags |= AMDGPU_VM_MTYPE_NC;
1281			/* PCIe P2P on GPUs pre-9.5.0 */
1282			else if (gc_ip_version < IP_VERSION(9, 5, 0) &&
1283				 !svm_nodes_in_same_hive(bo_node, node))
1284				mapping_flags |= AMDGPU_VM_MTYPE_UC;
1285			/* Other remote memory */
1286			else
1287				mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1288		/* system memory accessed by the APU */
1289		} else if (node->adev->flags & AMD_IS_APU) {
1290			/* On NUMA systems, locality is determined per-page
1291			 * in amdgpu_gmc_override_vm_pte_flags
1292			 */
1293			if (num_possible_nodes() <= 1)
1294				mapping_flags |= mtype_local;
1295			else
1296				mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1297		/* system memory accessed by the dGPU */
1298		} else {
1299			if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent)
1300				mapping_flags |= AMDGPU_VM_MTYPE_UC;
1301			else
1302				mapping_flags |= AMDGPU_VM_MTYPE_NC;
1303		}
1304		break;
1305	case IP_VERSION(12, 0, 0):
1306	case IP_VERSION(12, 0, 1):
1307		mapping_flags |= AMDGPU_VM_MTYPE_NC;
1308		break;
1309	default:
1310		mapping_flags |= coherent ?
1311			AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1312	}
1313
1314	if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC)
1315		mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
1316
1317	pte_flags = AMDGPU_PTE_VALID;
1318	pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM;
1319	pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
1320	if (gc_ip_version >= IP_VERSION(12, 0, 0))
1321		pte_flags |= AMDGPU_PTE_IS_PTE;
1322
1323	amdgpu_gmc_get_vm_pte(node->adev, vm, NULL, mapping_flags, &pte_flags);
1324	pte_flags |= AMDGPU_PTE_READABLE;
1325	if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO))
1326		pte_flags |= AMDGPU_PTE_WRITEABLE;
1327	return pte_flags;
1328}
1329
1330static int
1331svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1332			 uint64_t start, uint64_t last,
1333			 struct dma_fence **fence)
1334{
1335	uint64_t init_pte_value = 0;
1336
1337	pr_debug("[0x%llx 0x%llx]\n", start, last);
1338
1339	return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start,
1340				      last, init_pte_value, 0, 0, NULL, NULL,
1341				      fence);
1342}
1343
1344static int
1345svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
1346			  unsigned long last, uint32_t trigger)
1347{
1348	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1349	struct kfd_process_device *pdd;
1350	struct dma_fence *fence = NULL;
1351	struct kfd_process *p;
1352	uint32_t gpuidx;
1353	int r = 0;
1354
1355	if (!prange->mapped_to_gpu) {
1356		pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n",
1357			 prange, prange->start, prange->last);
1358		return 0;
1359	}
1360
1361	if (prange->start == start && prange->last == last) {
1362		pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange);
1363		prange->mapped_to_gpu = false;
1364	}
1365
1366	bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
1367		  MAX_GPU_INSTANCE);
1368	p = container_of(prange->svms, struct kfd_process, svms);
1369
1370	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1371		pr_debug("unmap from gpu idx 0x%x\n", gpuidx);
1372		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1373		if (!pdd) {
1374			pr_debug("failed to find device idx %d\n", gpuidx);
1375			return -EINVAL;
1376		}
1377
1378		kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid,
1379					     start, last, trigger);
1380
1381		r = svm_range_unmap_from_gpu(pdd->dev->adev,
1382					     drm_priv_to_vm(pdd->drm_priv),
1383					     start, last, &fence);
1384		if (r)
1385			break;
1386
1387		if (fence) {
1388			r = dma_fence_wait(fence, false);
1389			dma_fence_put(fence);
1390			fence = NULL;
1391			if (r)
1392				break;
1393		}
1394		kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT);
1395	}
1396
1397	return r;
1398}
1399
1400static int
1401svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange,
1402		     unsigned long offset, unsigned long npages, bool readonly,
1403		     dma_addr_t *dma_addr, struct amdgpu_device *bo_adev,
1404		     struct dma_fence **fence, bool flush_tlb)
1405{
1406	struct amdgpu_device *adev = pdd->dev->adev;
1407	struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv);
1408	uint64_t pte_flags;
1409	unsigned long last_start;
1410	int last_domain;
1411	int r = 0;
1412	int64_t i, j;
1413
1414	last_start = prange->start + offset;
1415
1416	pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms,
1417		 last_start, last_start + npages - 1, readonly);
1418
1419	for (i = offset; i < offset + npages; i++) {
1420		last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN;
1421		dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN;
1422
1423		/* Collect all pages in the same address range and memory domain
1424		 * that can be mapped with a single call to update mapping.
1425		 */
1426		if (i < offset + npages - 1 &&
1427		    last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN))
1428			continue;
1429
1430		pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n",
1431			 last_start, prange->start + i, last_domain ? "GPU" : "CPU");
1432
1433		pte_flags = svm_range_get_pte_flags(pdd->dev, vm, prange, last_domain);
1434		if (readonly)
1435			pte_flags &= ~AMDGPU_PTE_WRITEABLE;
1436
1437		pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n",
1438			 prange->svms, last_start, prange->start + i,
1439			 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0,
1440			 pte_flags);
1441
1442		/* For dGPU mode, we use same vm_manager to allocate VRAM for
1443		 * different memory partition based on fpfn/lpfn, we should use
1444		 * same vm_manager.vram_base_offset regardless memory partition.
1445		 */
1446		r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true,
1447					   NULL, last_start, prange->start + i,
1448					   pte_flags,
1449					   (last_start - prange->start) << PAGE_SHIFT,
1450					   bo_adev ? bo_adev->vm_manager.vram_base_offset : 0,
1451					   NULL, dma_addr, &vm->last_update);
1452
1453		for (j = last_start - prange->start; j <= i; j++)
1454			dma_addr[j] |= last_domain;
1455
1456		if (r) {
1457			pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
1458			goto out;
1459		}
1460		last_start = prange->start + i + 1;
1461	}
1462
1463	r = amdgpu_vm_update_pdes(adev, vm, false);
1464	if (r) {
1465		pr_debug("failed %d to update directories 0x%lx\n", r,
1466			 prange->start);
1467		goto out;
1468	}
1469
1470	if (fence)
1471		*fence = dma_fence_get(vm->last_update);
1472
1473out:
1474	return r;
1475}
1476
1477static int
1478svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset,
1479		      unsigned long npages, bool readonly,
1480		      unsigned long *bitmap, bool wait, bool flush_tlb)
1481{
1482	struct kfd_process_device *pdd;
1483	struct amdgpu_device *bo_adev = NULL;
1484	struct kfd_process *p;
1485	struct dma_fence *fence = NULL;
1486	uint32_t gpuidx;
1487	int r = 0;
1488
1489	if (prange->svm_bo && prange->ttm_res)
1490		bo_adev = prange->svm_bo->node->adev;
1491
1492	p = container_of(prange->svms, struct kfd_process, svms);
1493	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1494		pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
1495		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1496		if (!pdd) {
1497			pr_debug("failed to find device idx %d\n", gpuidx);
1498			return -EINVAL;
1499		}
1500
1501		pdd = kfd_bind_process_to_device(pdd->dev, p);
1502		if (IS_ERR(pdd))
1503			return -EINVAL;
1504
1505		if (bo_adev && pdd->dev->adev != bo_adev &&
1506		    !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) {
1507			pr_debug("cannot map to device idx %d\n", gpuidx);
1508			continue;
1509		}
1510
1511		r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly,
1512					 prange->dma_addr[gpuidx],
1513					 bo_adev, wait ? &fence : NULL,
1514					 flush_tlb);
1515		if (r)
1516			break;
1517
1518		if (fence) {
1519			r = dma_fence_wait(fence, false);
1520			dma_fence_put(fence);
1521			fence = NULL;
1522			if (r) {
1523				pr_debug("failed %d to dma fence wait\n", r);
1524				break;
1525			}
1526		}
1527
1528		kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY);
1529	}
1530
1531	return r;
1532}
1533
1534struct svm_validate_context {
1535	struct kfd_process *process;
1536	struct svm_range *prange;
1537	bool intr;
1538	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1539	struct drm_exec exec;
1540};
1541
1542static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr)
1543{
1544	struct kfd_process_device *pdd;
1545	struct amdgpu_vm *vm;
1546	uint32_t gpuidx;
1547	int r;
1548
1549	drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0);
1550	drm_exec_until_all_locked(&ctx->exec) {
1551		for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1552			pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1553			if (!pdd) {
1554				pr_debug("failed to find device idx %d\n", gpuidx);
1555				r = -EINVAL;
1556				goto unreserve_out;
1557			}
1558			vm = drm_priv_to_vm(pdd->drm_priv);
1559
1560			r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2);
1561			drm_exec_retry_on_contention(&ctx->exec);
1562			if (unlikely(r)) {
1563				pr_debug("failed %d to reserve bo\n", r);
1564				goto unreserve_out;
1565			}
1566		}
1567	}
1568
1569	for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1570		pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1571		if (!pdd) {
1572			pr_debug("failed to find device idx %d\n", gpuidx);
1573			r = -EINVAL;
1574			goto unreserve_out;
1575		}
1576
1577		r = amdgpu_vm_validate(pdd->dev->adev,
1578				       drm_priv_to_vm(pdd->drm_priv), NULL,
1579				       svm_range_bo_validate, NULL);
1580		if (r) {
1581			pr_debug("failed %d validate pt bos\n", r);
1582			goto unreserve_out;
1583		}
1584	}
1585
1586	return 0;
1587
1588unreserve_out:
1589	drm_exec_fini(&ctx->exec);
1590	return r;
1591}
1592
1593static void svm_range_unreserve_bos(struct svm_validate_context *ctx)
1594{
1595	drm_exec_fini(&ctx->exec);
1596}
1597
1598static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx)
1599{
1600	struct kfd_process_device *pdd;
1601
1602	pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1603	if (!pdd)
1604		return NULL;
1605
1606	return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev);
1607}
1608
1609/*
1610 * Validation+GPU mapping with concurrent invalidation (MMU notifiers)
1611 *
1612 * To prevent concurrent destruction or change of range attributes, the
1613 * svm_read_lock must be held. The caller must not hold the svm_write_lock
1614 * because that would block concurrent evictions and lead to deadlocks. To
1615 * serialize concurrent migrations or validations of the same range, the
1616 * prange->migrate_mutex must be held.
1617 *
1618 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its
1619 * eviction fence.
1620 *
1621 * The following sequence ensures race-free validation and GPU mapping:
1622 *
1623 * 1. Reserve page table (and SVM BO if range is in VRAM)
1624 * 2. hmm_range_fault to get page addresses (if system memory)
1625 * 3. DMA-map pages (if system memory)
1626 * 4-a. Take notifier lock
1627 * 4-b. Check that pages still valid (mmu_interval_read_retry)
1628 * 4-c. Check that the range was not split or otherwise invalidated
1629 * 4-d. Update GPU page table
1630 * 4.e. Release notifier lock
1631 * 5. Release page table (and SVM BO) reservation
1632 */
1633static int svm_range_validate_and_map(struct mm_struct *mm,
1634				      unsigned long map_start, unsigned long map_last,
1635				      struct svm_range *prange, int32_t gpuidx,
1636				      bool intr, bool wait, bool flush_tlb)
1637{
1638	struct svm_validate_context *ctx;
1639	unsigned long start, end, addr;
1640	struct kfd_process *p;
1641	void *owner;
1642	int32_t idx;
1643	int r = 0;
1644
1645	ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL);
1646	if (!ctx)
1647		return -ENOMEM;
1648	ctx->process = container_of(prange->svms, struct kfd_process, svms);
1649	ctx->prange = prange;
1650	ctx->intr = intr;
1651
1652	if (gpuidx < MAX_GPU_INSTANCE) {
1653		bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE);
1654		bitmap_set(ctx->bitmap, gpuidx, 1);
1655	} else if (ctx->process->xnack_enabled) {
1656		bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
1657
1658		/* If prefetch range to GPU, or GPU retry fault migrate range to
1659		 * GPU, which has ACCESS attribute to the range, create mapping
1660		 * on that GPU.
1661		 */
1662		if (prange->actual_loc) {
1663			gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process,
1664							prange->actual_loc);
1665			if (gpuidx < 0) {
1666				WARN_ONCE(1, "failed get device by id 0x%x\n",
1667					 prange->actual_loc);
1668				r = -EINVAL;
1669				goto free_ctx;
1670			}
1671			if (test_bit(gpuidx, prange->bitmap_access))
1672				bitmap_set(ctx->bitmap, gpuidx, 1);
1673		}
1674
1675		/*
1676		 * If prange is already mapped or with always mapped flag,
1677		 * update mapping on GPUs with ACCESS attribute
1678		 */
1679		if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1680			if (prange->mapped_to_gpu ||
1681			    prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)
1682				bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE);
1683		}
1684	} else {
1685		bitmap_or(ctx->bitmap, prange->bitmap_access,
1686			  prange->bitmap_aip, MAX_GPU_INSTANCE);
1687	}
1688
1689	if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1690		r = 0;
1691		goto free_ctx;
1692	}
1693
1694	if (prange->actual_loc && !prange->ttm_res) {
1695		/* This should never happen. actual_loc gets set by
1696		 * svm_migrate_ram_to_vram after allocating a BO.
1697		 */
1698		WARN_ONCE(1, "VRAM BO missing during validation\n");
1699		r = -EINVAL;
1700		goto free_ctx;
1701	}
1702
1703	r = svm_range_reserve_bos(ctx, intr);
1704	if (r)
1705		goto free_ctx;
1706
1707	p = container_of(prange->svms, struct kfd_process, svms);
1708	owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap,
1709						MAX_GPU_INSTANCE));
1710	for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) {
1711		if (kfd_svm_page_owner(p, idx) != owner) {
1712			owner = NULL;
1713			break;
1714		}
1715	}
1716
1717	start = map_start << PAGE_SHIFT;
1718	end = (map_last + 1) << PAGE_SHIFT;
1719	for (addr = start; !r && addr < end; ) {
1720		struct amdgpu_hmm_range *range = NULL;
1721		unsigned long map_start_vma;
1722		unsigned long map_last_vma;
1723		struct vm_area_struct *vma;
1724		unsigned long next = 0;
1725		unsigned long offset;
1726		unsigned long npages;
1727		bool readonly;
1728
1729		vma = vma_lookup(mm, addr);
1730		if (vma) {
1731			readonly = !(vma->vm_flags & VM_WRITE);
1732
1733			next = min(vma->vm_end, end);
1734			npages = (next - addr) >> PAGE_SHIFT;
1735			/* HMM requires at least READ permissions. If provided with PROT_NONE,
1736			 * unmap the memory. If it's not already mapped, this is a no-op
1737			 * If PROT_WRITE is provided without READ, warn first then unmap
1738			 */
1739			if (!(vma->vm_flags & VM_READ)) {
1740				unsigned long e, s;
1741
1742				svm_range_lock(prange);
1743				if (vma->vm_flags & VM_WRITE)
1744					pr_debug("VM_WRITE without VM_READ is not supported");
1745				s = max(start, prange->start);
1746				e = min(end, prange->last);
1747				if (e >= s)
1748					r = svm_range_unmap_from_gpus(prange, s, e,
1749						       KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU);
1750				svm_range_unlock(prange);
1751				/* If unmap returns non-zero, we'll bail on the next for loop
1752				 * iteration, so just leave r and continue
1753				 */
1754				addr = next;
1755				continue;
1756			}
1757
1758			WRITE_ONCE(p->svms.faulting_task, current);
1759			range = amdgpu_hmm_range_alloc(NULL);
1760			if (likely(range))
1761				r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages,
1762							       readonly, owner, range);
1763			else
1764				r = -ENOMEM;
1765			WRITE_ONCE(p->svms.faulting_task, NULL);
1766			if (r)
1767				pr_debug("failed %d to get svm range pages\n", r);
1768		} else {
1769			r = -EFAULT;
1770		}
1771
1772		if (!r) {
1773			offset = (addr >> PAGE_SHIFT) - prange->start;
1774			r = svm_range_dma_map(prange, ctx->bitmap, offset, npages,
1775					      range->hmm_range.hmm_pfns);
1776			if (r)
1777				pr_debug("failed %d to dma map range\n", r);
1778		}
1779
1780		svm_range_lock(prange);
1781
1782		/* Free backing memory of hmm_range if it was initialized
1783		 * Override return value to TRY AGAIN only if prior returns
1784		 * were successful
1785		 */
1786		if (range && !amdgpu_hmm_range_valid(range) && !r) {
1787			pr_debug("hmm update the range, need validate again\n");
1788			r = -EAGAIN;
1789		}
1790
1791		/* Free the hmm range */
1792		amdgpu_hmm_range_free(range);
1793
1794		if (!r && !list_empty(&prange->child_list)) {
1795			pr_debug("range split by unmap in parallel, validate again\n");
1796			r = -EAGAIN;
1797		}
1798
1799		if (!r) {
1800			map_start_vma = max(map_start, prange->start + offset);
1801			map_last_vma = min(map_last, prange->start + offset + npages - 1);
1802			if (map_start_vma <= map_last_vma) {
1803				offset = map_start_vma - prange->start;
1804				npages = map_last_vma - map_start_vma + 1;
1805				r = svm_range_map_to_gpus(prange, offset, npages, readonly,
1806							  ctx->bitmap, wait, flush_tlb);
1807			}
1808		}
1809
1810		if (!r && next == end)
1811			prange->mapped_to_gpu = true;
1812
1813		svm_range_unlock(prange);
1814
1815		addr = next;
1816	}
1817
1818	svm_range_unreserve_bos(ctx);
1819	if (!r)
1820		prange->validate_timestamp = ktime_get_boottime();
1821
1822free_ctx:
1823	kfree(ctx);
1824
1825	return r;
1826}
1827
1828/**
1829 * svm_range_list_lock_and_flush_work - flush pending deferred work
1830 *
1831 * @svms: the svm range list
1832 * @mm: the mm structure
1833 *
1834 * Context: Returns with mmap write lock held, pending deferred work flushed
1835 *
1836 */
1837void
1838svm_range_list_lock_and_flush_work(struct svm_range_list *svms,
1839				   struct mm_struct *mm)
1840{
1841retry_flush_work:
1842	flush_work(&svms->deferred_list_work);
1843	mmap_write_lock(mm);
1844
1845	if (list_empty(&svms->deferred_range_list))
1846		return;
1847	mmap_write_unlock(mm);
1848	pr_debug("retry flush\n");
1849	goto retry_flush_work;
1850}
1851
1852static void svm_range_restore_work(struct work_struct *work)
1853{
1854	struct delayed_work *dwork = to_delayed_work(work);
1855	struct amdkfd_process_info *process_info;
1856	struct svm_range_list *svms;
1857	struct svm_range *prange;
1858	struct kfd_process *p;
1859	struct mm_struct *mm;
1860	int evicted_ranges;
1861	int invalid;
1862	int r;
1863
1864	svms = container_of(dwork, struct svm_range_list, restore_work);
1865	evicted_ranges = atomic_read(&svms->evicted_ranges);
1866	if (!evicted_ranges)
1867		return;
1868
1869	pr_debug("restore svm ranges\n");
1870
1871	p = container_of(svms, struct kfd_process, svms);
1872	process_info = p->kgd_process_info;
1873
1874	/* Keep mm reference when svm_range_validate_and_map ranges */
1875	mm = get_task_mm(p->lead_thread);
1876	if (!mm) {
1877		pr_debug("svms 0x%p process mm gone\n", svms);
1878		return;
1879	}
1880
1881	mutex_lock(&process_info->lock);
1882	svm_range_list_lock_and_flush_work(svms, mm);
1883	mutex_lock(&svms->lock);
1884
1885	evicted_ranges = atomic_read(&svms->evicted_ranges);
1886
1887	list_for_each_entry(prange, &svms->list, list) {
1888		invalid = atomic_read(&prange->invalid);
1889		if (!invalid)
1890			continue;
1891
1892		pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n",
1893			 prange->svms, prange, prange->start, prange->last,
1894			 invalid);
1895
1896		/*
1897		 * If range is migrating, wait for migration is done.
1898		 */
1899		mutex_lock(&prange->migrate_mutex);
1900
1901		r = svm_range_validate_and_map(mm, prange->start, prange->last, prange,
1902					       MAX_GPU_INSTANCE, false, true, false);
1903		if (r)
1904			pr_debug("failed %d to map 0x%lx to gpus\n", r,
1905				 prange->start);
1906
1907		mutex_unlock(&prange->migrate_mutex);
1908		if (r)
1909			goto out_reschedule;
1910
1911		if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid)
1912			goto out_reschedule;
1913	}
1914
1915	if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) !=
1916	    evicted_ranges)
1917		goto out_reschedule;
1918
1919	evicted_ranges = 0;
1920
1921	r = kgd2kfd_resume_mm(mm);
1922	if (r) {
1923		/* No recovery from this failure. Probably the CP is
1924		 * hanging. No point trying again.
1925		 */
1926		pr_debug("failed %d to resume KFD\n", r);
1927	}
1928
1929	pr_debug("restore svm ranges successfully\n");
1930
1931out_reschedule:
1932	mutex_unlock(&svms->lock);
1933	mmap_write_unlock(mm);
1934	mutex_unlock(&process_info->lock);
1935
1936	/* If validation failed, reschedule another attempt */
1937	if (evicted_ranges) {
1938		pr_debug("reschedule to restore svm range\n");
1939		queue_delayed_work(system_freezable_wq, &svms->restore_work,
1940			msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1941
1942		kfd_smi_event_queue_restore_rescheduled(mm);
1943	}
1944	mmput(mm);
1945}
1946
1947/**
1948 * svm_range_evict - evict svm range
1949 * @prange: svm range structure
1950 * @mm: current process mm_struct
1951 * @start: starting process queue number
1952 * @last: last process queue number
1953 * @event: mmu notifier event when range is evicted or migrated
1954 *
1955 * Stop all queues of the process to ensure GPU doesn't access the memory, then
1956 * return to let CPU evict the buffer and proceed CPU pagetable update.
1957 *
1958 * Don't need use lock to sync cpu pagetable invalidation with GPU execution.
1959 * If invalidation happens while restore work is running, restore work will
1960 * restart to ensure to get the latest CPU pages mapping to GPU, then start
1961 * the queues.
1962 */
1963static int
1964svm_range_evict(struct svm_range *prange, struct mm_struct *mm,
1965		unsigned long start, unsigned long last,
1966		enum mmu_notifier_event event)
1967{
1968	struct svm_range_list *svms = prange->svms;
1969	struct svm_range *pchild;
1970	struct kfd_process *p;
1971	int r = 0;
1972
1973	p = container_of(svms, struct kfd_process, svms);
1974
1975	pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
1976		 svms, prange->start, prange->last, start, last);
1977
1978	if (!p->xnack_enabled ||
1979	    (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) {
1980		int evicted_ranges;
1981		bool mapped = prange->mapped_to_gpu;
1982
1983		list_for_each_entry(pchild, &prange->child_list, child_list) {
1984			if (!pchild->mapped_to_gpu)
1985				continue;
1986			mapped = true;
1987			mutex_lock_nested(&pchild->lock, 1);
1988			if (pchild->start <= last && pchild->last >= start) {
1989				pr_debug("increment pchild invalid [0x%lx 0x%lx]\n",
1990					 pchild->start, pchild->last);
1991				atomic_inc(&pchild->invalid);
1992			}
1993			mutex_unlock(&pchild->lock);
1994		}
1995
1996		if (!mapped)
1997			return r;
1998
1999		if (prange->start <= last && prange->last >= start)
2000			atomic_inc(&prange->invalid);
2001
2002		evicted_ranges = atomic_inc_return(&svms->evicted_ranges);
2003		if (evicted_ranges != 1)
2004			return r;
2005
2006		pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n",
2007			 prange->svms, prange->start, prange->last);
2008
2009		/* First eviction, stop the queues */
2010		r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM);
2011		if (r)
2012			pr_debug("failed to quiesce KFD\n");
2013
2014		pr_debug("schedule to restore svm %p ranges\n", svms);
2015		queue_delayed_work(system_freezable_wq, &svms->restore_work,
2016			msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
2017	} else {
2018		unsigned long s, l;
2019		uint32_t trigger;
2020
2021		if (event == MMU_NOTIFY_MIGRATE)
2022			trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE;
2023		else
2024			trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY;
2025
2026		pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n",
2027			 prange->svms, start, last);
2028		list_for_each_entry(pchild, &prange->child_list, child_list) {
2029			mutex_lock_nested(&pchild->lock, 1);
2030			s = max(start, pchild->start);
2031			l = min(last, pchild->last);
2032			if (l >= s)
2033				svm_range_unmap_from_gpus(pchild, s, l, trigger);
2034			mutex_unlock(&pchild->lock);
2035		}
2036		s = max(start, prange->start);
2037		l = min(last, prange->last);
2038		if (l >= s)
2039			svm_range_unmap_from_gpus(prange, s, l, trigger);
2040	}
2041
2042	return r;
2043}
2044
2045static struct svm_range *svm_range_clone(struct svm_range *old)
2046{
2047	struct svm_range *new;
2048
2049	new = svm_range_new(old->svms, old->start, old->last, false);
2050	if (!new)
2051		return NULL;
2052	if (svm_range_copy_dma_addrs(new, old)) {
2053		svm_range_free(new, false);
2054		return NULL;
2055	}
2056	if (old->svm_bo) {
2057		new->ttm_res = old->ttm_res;
2058		new->offset = old->offset;
2059		new->svm_bo = svm_range_bo_ref(old->svm_bo);
2060		spin_lock(&new->svm_bo->list_lock);
2061		list_add(&new->svm_bo_list, &new->svm_bo->range_list);
2062		spin_unlock(&new->svm_bo->list_lock);
2063	}
2064	new->flags = old->flags;
2065	new->preferred_loc = old->preferred_loc;
2066	new->prefetch_loc = old->prefetch_loc;
2067	new->actual_loc = old->actual_loc;
2068	new->granularity = old->granularity;
2069	new->mapped_to_gpu = old->mapped_to_gpu;
2070	new->vram_pages = old->vram_pages;
2071	bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
2072	bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
2073	atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount));
2074
2075	return new;
2076}
2077
2078void svm_range_set_max_pages(struct amdgpu_device *adev)
2079{
2080	uint64_t max_pages;
2081	uint64_t pages, _pages;
2082	uint64_t min_pages = 0;
2083	int i, id;
2084
2085	for (i = 0; i < adev->kfd.dev->num_nodes; i++) {
2086		if (adev->kfd.dev->nodes[i]->xcp)
2087			id = adev->kfd.dev->nodes[i]->xcp->id;
2088		else
2089			id = -1;
2090		pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17;
2091		pages = clamp(pages, 1ULL << 9, 1ULL << 18);
2092		pages = rounddown_pow_of_two(pages);
2093		min_pages = min_not_zero(min_pages, pages);
2094	}
2095
2096	do {
2097		max_pages = READ_ONCE(max_svm_range_pages);
2098		_pages = min_not_zero(max_pages, min_pages);
2099	} while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages);
2100}
2101
2102static int
2103svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last,
2104		    uint64_t max_pages, struct list_head *insert_list,
2105		    struct list_head *update_list)
2106{
2107	struct svm_range *prange;
2108	uint64_t l;
2109
2110	pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n",
2111		 max_pages, start, last);
2112
2113	while (last >= start) {
2114		l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1);
2115
2116		prange = svm_range_new(svms, start, l, true);
2117		if (!prange)
2118			return -ENOMEM;
2119		list_add(&prange->list, insert_list);
2120		list_add(&prange->update_list, update_list);
2121
2122		start = l + 1;
2123	}
2124	return 0;
2125}
2126
2127/**
2128 * svm_range_add - add svm range and handle overlap
2129 * @p: the range add to this process svms
2130 * @start: page size aligned
2131 * @size: page size aligned
2132 * @nattr: number of attributes
2133 * @attrs: array of attributes
2134 * @update_list: output, the ranges need validate and update GPU mapping
2135 * @insert_list: output, the ranges need insert to svms
2136 * @remove_list: output, the ranges are replaced and need remove from svms
2137 * @remap_list: output, remap unaligned svm ranges
2138 *
2139 * Check if the virtual address range has overlap with any existing ranges,
2140 * split partly overlapping ranges and add new ranges in the gaps. All changes
2141 * should be applied to the range_list and interval tree transactionally. If
2142 * any range split or allocation fails, the entire update fails. Therefore any
2143 * existing overlapping svm_ranges are cloned and the original svm_ranges left
2144 * unchanged.
2145 *
2146 * If the transaction succeeds, the caller can update and insert clones and
2147 * new ranges, then free the originals.
2148 *
2149 * Otherwise the caller can free the clones and new ranges, while the old
2150 * svm_ranges remain unchanged.
2151 *
2152 * Context: Process context, caller must hold svms->lock
2153 *
2154 * Return:
2155 * 0 - OK, otherwise error code
2156 */
2157static int
2158svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size,
2159	      uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
2160	      struct list_head *update_list, struct list_head *insert_list,
2161	      struct list_head *remove_list, struct list_head *remap_list)
2162{
2163	unsigned long last = start + size - 1UL;
2164	struct svm_range_list *svms = &p->svms;
2165	struct interval_tree_node *node;
2166	struct svm_range *prange;
2167	struct svm_range *tmp;
2168	struct list_head new_list;
2169	int r = 0;
2170
2171	pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last);
2172
2173	INIT_LIST_HEAD(update_list);
2174	INIT_LIST_HEAD(insert_list);
2175	INIT_LIST_HEAD(remove_list);
2176	INIT_LIST_HEAD(&new_list);
2177	INIT_LIST_HEAD(remap_list);
2178
2179	node = interval_tree_iter_first(&svms->objects, start, last);
2180	while (node) {
2181		struct interval_tree_node *next;
2182		unsigned long next_start;
2183
2184		pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start,
2185			 node->last);
2186
2187		prange = container_of(node, struct svm_range, it_node);
2188		next = interval_tree_iter_next(node, start, last);
2189		next_start = min(node->last, last) + 1;
2190
2191		if (svm_range_is_same_attrs(p, prange, nattr, attrs) &&
2192		    prange->mapped_to_gpu) {
2193			/* nothing to do */
2194		} else if (node->start < start || node->last > last) {
2195			/* node intersects the update range and its attributes
2196			 * will change. Clone and split it, apply updates only
2197			 * to the overlapping part
2198			 */
2199			struct svm_range *old = prange;
2200
2201			prange = svm_range_clone(old);
2202			if (!prange) {
2203				r = -ENOMEM;
2204				goto out;
2205			}
2206
2207			list_add(&old->update_list, remove_list);
2208			list_add(&prange->list, insert_list);
2209			list_add(&prange->update_list, update_list);
2210
2211			if (node->start < start) {
2212				pr_debug("change old range start\n");
2213				r = svm_range_split_head(prange, start,
2214							 insert_list, remap_list);
2215				if (r)
2216					goto out;
2217			}
2218			if (node->last > last) {
2219				pr_debug("change old range last\n");
2220				r = svm_range_split_tail(prange, last,
2221							 insert_list, remap_list);
2222				if (r)
2223					goto out;
2224			}
2225		} else {
2226			/* The node is contained within start..last,
2227			 * just update it
2228			 */
2229			list_add(&prange->update_list, update_list);
2230		}
2231
2232		/* insert a new node if needed */
2233		if (node->start > start) {
2234			r = svm_range_split_new(svms, start, node->start - 1,
2235						READ_ONCE(max_svm_range_pages),
2236						&new_list, update_list);
2237			if (r)
2238				goto out;
2239		}
2240
2241		node = next;
2242		start = next_start;
2243	}
2244
2245	/* add a final range at the end if needed */
2246	if (start <= last)
2247		r = svm_range_split_new(svms, start, last,
2248					READ_ONCE(max_svm_range_pages),
2249					&new_list, update_list);
2250
2251out:
2252	if (r) {
2253		list_for_each_entry_safe(prange, tmp, insert_list, list)
2254			svm_range_free(prange, false);
2255		list_for_each_entry_safe(prange, tmp, &new_list, list)
2256			svm_range_free(prange, true);
2257	} else {
2258		list_splice(&new_list, insert_list);
2259	}
2260
2261	return r;
2262}
2263
2264static void
2265svm_range_update_notifier_and_interval_tree(struct mm_struct *mm,
2266					    struct svm_range *prange)
2267{
2268	unsigned long start;
2269	unsigned long last;
2270
2271	start = prange->notifier.interval_tree.start >> PAGE_SHIFT;
2272	last = prange->notifier.interval_tree.last >> PAGE_SHIFT;
2273
2274	if (prange->start == start && prange->last == last)
2275		return;
2276
2277	pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
2278		  prange->svms, prange, start, last, prange->start,
2279		  prange->last);
2280
2281	if (start != 0 && last != 0) {
2282		interval_tree_remove(&prange->it_node, &prange->svms->objects);
2283		svm_range_remove_notifier(prange);
2284	}
2285	prange->it_node.start = prange->start;
2286	prange->it_node.last = prange->last;
2287
2288	interval_tree_insert(&prange->it_node, &prange->svms->objects);
2289	svm_range_add_notifier_locked(mm, prange);
2290}
2291
2292static void
2293svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange,
2294			 struct mm_struct *mm)
2295{
2296	switch (prange->work_item.op) {
2297	case SVM_OP_NULL:
2298		pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2299			 svms, prange, prange->start, prange->last);
2300		break;
2301	case SVM_OP_UNMAP_RANGE:
2302		pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2303			 svms, prange, prange->start, prange->last);
2304		svm_range_unlink(prange);
2305		svm_range_remove_notifier(prange);
2306		svm_range_free(prange, true);
2307		break;
2308	case SVM_OP_UPDATE_RANGE_NOTIFIER:
2309		pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2310			 svms, prange, prange->start, prange->last);
2311		svm_range_update_notifier_and_interval_tree(mm, prange);
2312		break;
2313	case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP:
2314		pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2315			 svms, prange, prange->start, prange->last);
2316		svm_range_update_notifier_and_interval_tree(mm, prange);
2317		/* TODO: implement deferred validation and mapping */
2318		break;
2319	case SVM_OP_ADD_RANGE:
2320		pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange,
2321			 prange->start, prange->last);
2322		svm_range_add_to_svms(prange);
2323		svm_range_add_notifier_locked(mm, prange);
2324		break;
2325	case SVM_OP_ADD_RANGE_AND_MAP:
2326		pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms,
2327			 prange, prange->start, prange->last);
2328		svm_range_add_to_svms(prange);
2329		svm_range_add_notifier_locked(mm, prange);
2330		/* TODO: implement deferred validation and mapping */
2331		break;
2332	default:
2333		WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange,
2334			 prange->work_item.op);
2335	}
2336}
2337
2338static void svm_range_drain_retry_fault(struct svm_range_list *svms)
2339{
2340	struct kfd_process_device *pdd;
2341	struct kfd_process *p;
2342	uint32_t i;
2343
2344	p = container_of(svms, struct kfd_process, svms);
2345
2346	for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2347		pdd = p->pdds[i];
2348		if (!pdd)
2349			continue;
2350
2351		pr_debug("drain retry fault gpu %d svms %p\n", i, svms);
2352
2353		if (!down_read_trylock(&pdd->dev->adev->reset_domain->sem))
2354			continue;
2355
2356		amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2357				pdd->dev->adev->irq.retry_cam_enabled ?
2358				&pdd->dev->adev->irq.ih :
2359				&pdd->dev->adev->irq.ih1);
2360
2361		if (pdd->dev->adev->irq.retry_cam_enabled)
2362			amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2363				&pdd->dev->adev->irq.ih_soft);
2364
2365		up_read(&pdd->dev->adev->reset_domain->sem);
2366
2367		pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms);
2368	}
2369}
2370
2371static void svm_range_deferred_list_work(struct work_struct *work)
2372{
2373	struct svm_range_list *svms;
2374	struct svm_range *prange;
2375	struct mm_struct *mm;
2376
2377	svms = container_of(work, struct svm_range_list, deferred_list_work);
2378	pr_debug("enter svms 0x%p\n", svms);
2379
2380	spin_lock(&svms->deferred_list_lock);
2381	while (!list_empty(&svms->deferred_range_list)) {
2382		prange = list_first_entry(&svms->deferred_range_list,
2383					  struct svm_range, deferred_list);
2384		spin_unlock(&svms->deferred_list_lock);
2385
2386		pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange,
2387			 prange->start, prange->last, prange->work_item.op);
2388
2389		mm = prange->work_item.mm;
2390
2391		mmap_write_lock(mm);
2392
2393		/* Remove from deferred_list must be inside mmap write lock, for
2394		 * two race cases:
2395		 * 1. unmap_from_cpu may change work_item.op and add the range
2396		 *    to deferred_list again, cause use after free bug.
2397		 * 2. svm_range_list_lock_and_flush_work may hold mmap write
2398		 *    lock and continue because deferred_list is empty, but
2399		 *    deferred_list work is actually waiting for mmap lock.
2400		 */
2401		spin_lock(&svms->deferred_list_lock);
2402		list_del_init(&prange->deferred_list);
2403		spin_unlock(&svms->deferred_list_lock);
2404
2405		mutex_lock(&svms->lock);
2406		mutex_lock(&prange->migrate_mutex);
2407		while (!list_empty(&prange->child_list)) {
2408			struct svm_range *pchild;
2409
2410			pchild = list_first_entry(&prange->child_list,
2411						struct svm_range, child_list);
2412			pr_debug("child prange 0x%p op %d\n", pchild,
2413				 pchild->work_item.op);
2414			list_del_init(&pchild->child_list);
2415			svm_range_handle_list_op(svms, pchild, mm);
2416		}
2417		mutex_unlock(&prange->migrate_mutex);
2418
2419		svm_range_handle_list_op(svms, prange, mm);
2420		mutex_unlock(&svms->lock);
2421		mmap_write_unlock(mm);
2422
2423		/* Pairs with mmget in svm_range_add_list_work. If dropping the
2424		 * last mm refcount, schedule release work to avoid circular locking
2425		 */
2426		mmput_async(mm);
2427
2428		spin_lock(&svms->deferred_list_lock);
2429	}
2430	spin_unlock(&svms->deferred_list_lock);
2431	pr_debug("exit svms 0x%p\n", svms);
2432}
2433
2434void
2435svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
2436			struct mm_struct *mm, enum svm_work_list_ops op)
2437{
2438	spin_lock(&svms->deferred_list_lock);
2439	/* if prange is on the deferred list */
2440	if (!list_empty(&prange->deferred_list)) {
2441		pr_debug("update exist prange 0x%p work op %d\n", prange, op);
2442		WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n");
2443		if (op != SVM_OP_NULL &&
2444		    prange->work_item.op != SVM_OP_UNMAP_RANGE)
2445			prange->work_item.op = op;
2446	} else {
2447		/* Pairs with mmput in deferred_list_work.
2448		 * If process is exiting and mm is gone, don't update mmu notifier.
2449		 */
2450		if (mmget_not_zero(mm)) {
2451			prange->work_item.mm = mm;
2452			prange->work_item.op = op;
2453			list_add_tail(&prange->deferred_list,
2454				      &prange->svms->deferred_range_list);
2455			pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2456				 prange, prange->start, prange->last, op);
2457		}
2458	}
2459	spin_unlock(&svms->deferred_list_lock);
2460}
2461
2462void schedule_deferred_list_work(struct svm_range_list *svms)
2463{
2464	spin_lock(&svms->deferred_list_lock);
2465	if (!list_empty(&svms->deferred_range_list))
2466		schedule_work(&svms->deferred_list_work);
2467	spin_unlock(&svms->deferred_list_lock);
2468}
2469
2470static void
2471svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start,
2472		      unsigned long last)
2473{
2474	struct svm_range *head;
2475	struct svm_range *tail;
2476
2477	if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2478		pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange,
2479			 prange->start, prange->last);
2480		return;
2481	}
2482	if (start > prange->last || last < prange->start)
2483		return;
2484
2485	head = tail = prange;
2486	if (start > prange->start)
2487		svm_range_split(prange, prange->start, start - 1, &tail);
2488	if (last < tail->last)
2489		svm_range_split(tail, last + 1, tail->last, &head);
2490
2491	if (head != prange && tail != prange) {
2492		svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE);
2493		svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE);
2494	} else if (tail != prange) {
2495		svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE);
2496	} else if (head != prange) {
2497		svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE);
2498	} else if (parent != prange) {
2499		prange->work_item.op = SVM_OP_UNMAP_RANGE;
2500	}
2501}
2502
2503static void
2504svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
2505			 unsigned long start, unsigned long last)
2506{
2507	uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU;
2508	struct svm_range_list *svms;
2509	struct svm_range *pchild;
2510	struct kfd_process *p;
2511	unsigned long s, l;
2512	bool unmap_parent;
2513	uint32_t i;
2514
2515	if (atomic_read(&prange->queue_refcount)) {
2516		int r;
2517
2518		pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n",
2519			prange->start << PAGE_SHIFT);
2520		r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM);
2521		if (r)
2522			pr_debug("failed %d to quiesce KFD queues\n", r);
2523	}
2524
2525	p = kfd_lookup_process_by_mm(mm);
2526	if (!p)
2527		return;
2528	svms = &p->svms;
2529
2530	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms,
2531		 prange, prange->start, prange->last, start, last);
2532
2533	/* calculate time stamps that are used to decide which page faults need be
2534	 * dropped or handled before unmap pages from gpu vm
2535	 */
2536	for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2537		struct kfd_process_device *pdd;
2538		struct amdgpu_device *adev;
2539		struct amdgpu_ih_ring *ih;
2540		uint32_t checkpoint_wptr;
2541
2542		pdd = p->pdds[i];
2543		if (!pdd)
2544			continue;
2545
2546		adev = pdd->dev->adev;
2547
2548		/* Check and drain ih1 ring if cam not available */
2549		if (!adev->irq.retry_cam_enabled && adev->irq.ih1.ring_size) {
2550			ih = &adev->irq.ih1;
2551			checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih);
2552			if (ih->rptr != checkpoint_wptr) {
2553				svms->checkpoint_ts[i] =
2554					amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1);
2555				continue;
2556			}
2557		}
2558
2559		/* check if dev->irq.ih_soft is not empty */
2560		ih = &adev->irq.ih_soft;
2561		checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih);
2562		if (ih->rptr != checkpoint_wptr)
2563			svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1);
2564	}
2565
2566	unmap_parent = start <= prange->start && last >= prange->last;
2567
2568	list_for_each_entry(pchild, &prange->child_list, child_list) {
2569		mutex_lock_nested(&pchild->lock, 1);
2570		s = max(start, pchild->start);
2571		l = min(last, pchild->last);
2572		if (l >= s)
2573			svm_range_unmap_from_gpus(pchild, s, l, trigger);
2574		svm_range_unmap_split(prange, pchild, start, last);
2575		mutex_unlock(&pchild->lock);
2576	}
2577	s = max(start, prange->start);
2578	l = min(last, prange->last);
2579	if (l >= s)
2580		svm_range_unmap_from_gpus(prange, s, l, trigger);
2581	svm_range_unmap_split(prange, prange, start, last);
2582
2583	if (unmap_parent)
2584		svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
2585	else
2586		svm_range_add_list_work(svms, prange, mm,
2587					SVM_OP_UPDATE_RANGE_NOTIFIER);
2588	schedule_deferred_list_work(svms);
2589
2590	kfd_unref_process(p);
2591}
2592
2593/**
2594 * svm_range_cpu_invalidate_pagetables - interval notifier callback
2595 * @mni: mmu_interval_notifier struct
2596 * @range: mmu_notifier_range struct
2597 * @cur_seq: value to pass to mmu_interval_set_seq()
2598 *
2599 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it
2600 * is from migration, or CPU page invalidation callback.
2601 *
2602 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed
2603 * work thread, and split prange if only part of prange is unmapped.
2604 *
2605 * For invalidation event, if GPU retry fault is not enabled, evict the queues,
2606 * then schedule svm_range_restore_work to update GPU mapping and resume queues.
2607 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will
2608 * update GPU mapping to recover.
2609 *
2610 * Context: mmap lock, notifier_invalidate_start lock are held
2611 *          for invalidate event, prange lock is held if this is from migration
2612 */
2613static bool
2614svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
2615				    const struct mmu_notifier_range *range,
2616				    unsigned long cur_seq)
2617{
2618	struct svm_range *prange;
2619	unsigned long start;
2620	unsigned long last;
2621
2622	if (range->event == MMU_NOTIFY_RELEASE)
2623		return true;
2624
2625	start = mni->interval_tree.start;
2626	last = mni->interval_tree.last;
2627	start = max(start, range->start) >> PAGE_SHIFT;
2628	last = min(last, range->end - 1) >> PAGE_SHIFT;
2629	pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n",
2630		 start, last, range->start >> PAGE_SHIFT,
2631		 (range->end - 1) >> PAGE_SHIFT,
2632		 mni->interval_tree.start >> PAGE_SHIFT,
2633		 mni->interval_tree.last >> PAGE_SHIFT, range->event);
2634
2635	prange = container_of(mni, struct svm_range, notifier);
2636
2637	svm_range_lock(prange);
2638	mmu_interval_set_seq(mni, cur_seq);
2639
2640	switch (range->event) {
2641	case MMU_NOTIFY_UNMAP:
2642		svm_range_unmap_from_cpu(mni->mm, prange, start, last);
2643		break;
2644	default:
2645		svm_range_evict(prange, mni->mm, start, last, range->event);
2646		break;
2647	}
2648
2649	svm_range_unlock(prange);
2650
2651	return true;
2652}
2653
2654/**
2655 * svm_range_from_addr - find svm range from fault address
2656 * @svms: svm range list header
2657 * @addr: address to search range interval tree, in pages
2658 * @parent: parent range if range is on child list
2659 *
2660 * Context: The caller must hold svms->lock
2661 *
2662 * Return: the svm_range found or NULL
2663 */
2664struct svm_range *
2665svm_range_from_addr(struct svm_range_list *svms, unsigned long addr,
2666		    struct svm_range **parent)
2667{
2668	struct interval_tree_node *node;
2669	struct svm_range *prange;
2670	struct svm_range *pchild;
2671
2672	node = interval_tree_iter_first(&svms->objects, addr, addr);
2673	if (!node)
2674		return NULL;
2675
2676	prange = container_of(node, struct svm_range, it_node);
2677	pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n",
2678		 addr, prange->start, prange->last, node->start, node->last);
2679
2680	if (addr >= prange->start && addr <= prange->last) {
2681		if (parent)
2682			*parent = prange;
2683		return prange;
2684	}
2685	list_for_each_entry(pchild, &prange->child_list, child_list)
2686		if (addr >= pchild->start && addr <= pchild->last) {
2687			pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n",
2688				 addr, pchild->start, pchild->last);
2689			if (parent)
2690				*parent = prange;
2691			return pchild;
2692		}
2693
2694	return NULL;
2695}
2696
2697/* svm_range_best_restore_location - decide the best fault restore location
2698 * @prange: svm range structure
2699 * @adev: the GPU on which vm fault happened
2700 *
2701 * This is only called when xnack is on, to decide the best location to restore
2702 * the range mapping after GPU vm fault. Caller uses the best location to do
2703 * migration if actual loc is not best location, then update GPU page table
2704 * mapping to the best location.
2705 *
2706 * If the preferred loc is accessible by faulting GPU, use preferred loc.
2707 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu
2708 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then
2709 *    if range actual loc is cpu, best_loc is cpu
2710 *    if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is
2711 *    range actual loc.
2712 * Otherwise, GPU no access, best_loc is -1.
2713 *
2714 * Return:
2715 * -1 means vm fault GPU no access
2716 * 0 for CPU or GPU id
2717 */
2718static int32_t
2719svm_range_best_restore_location(struct svm_range *prange,
2720				struct kfd_node *node,
2721				int32_t *gpuidx)
2722{
2723	struct kfd_node *bo_node, *preferred_node;
2724	struct kfd_process *p;
2725	uint32_t gpuid;
2726	int r;
2727
2728	p = container_of(prange->svms, struct kfd_process, svms);
2729
2730	r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx);
2731	if (r < 0) {
2732		pr_debug("failed to get gpuid from kgd\n");
2733		return -1;
2734	}
2735
2736	if (node->adev->apu_prefer_gtt)
2737		return 0;
2738
2739	if (prange->preferred_loc == gpuid ||
2740	    prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) {
2741		return prange->preferred_loc;
2742	} else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
2743		preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc);
2744		if (preferred_node && svm_nodes_in_same_hive(node, preferred_node))
2745			return prange->preferred_loc;
2746		/* fall through */
2747	}
2748
2749	if (test_bit(*gpuidx, prange->bitmap_access))
2750		return gpuid;
2751
2752	if (test_bit(*gpuidx, prange->bitmap_aip)) {
2753		if (!prange->actual_loc)
2754			return 0;
2755
2756		bo_node = svm_range_get_node_by_id(prange, prange->actual_loc);
2757		if (bo_node && svm_nodes_in_same_hive(node, bo_node))
2758			return prange->actual_loc;
2759		else
2760			return 0;
2761	}
2762
2763	return -1;
2764}
2765
2766static int
2767svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr,
2768			       unsigned long *start, unsigned long *last,
2769			       bool *is_heap_stack)
2770{
2771	struct vm_area_struct *vma;
2772	struct interval_tree_node *node;
2773	struct rb_node *rb_node;
2774	unsigned long start_limit, end_limit;
2775
2776	vma = vma_lookup(p->mm, addr << PAGE_SHIFT);
2777	if (!vma) {
2778		pr_debug("VMA does not exist in address [0x%llx]\n", addr);
2779		return -EFAULT;
2780	}
2781
2782	*is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma);
2783
2784	start_limit = max(vma->vm_start >> PAGE_SHIFT,
2785		      (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity));
2786	end_limit = min(vma->vm_end >> PAGE_SHIFT,
2787		    (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity));
2788
2789	/* First range that starts after the fault address */
2790	node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX);
2791	if (node) {
2792		end_limit = min(end_limit, node->start);
2793		/* Last range that ends before the fault address */
2794		rb_node = rb_prev(&node->rb);
2795	} else {
2796		/* Last range must end before addr because
2797		 * there was no range after addr
2798		 */
2799		rb_node = rb_last(&p->svms.objects.rb_root);
2800	}
2801	if (rb_node) {
2802		node = container_of(rb_node, struct interval_tree_node, rb);
2803		if (node->last >= addr) {
2804			WARN(1, "Overlap with prev node and page fault addr\n");
2805			return -EFAULT;
2806		}
2807		start_limit = max(start_limit, node->last + 1);
2808	}
2809
2810	*start = start_limit;
2811	*last = end_limit - 1;
2812
2813	pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n",
2814		 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT,
2815		 *start, *last, *is_heap_stack);
2816
2817	return 0;
2818}
2819
2820static int
2821svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last,
2822			   uint64_t *bo_s, uint64_t *bo_l)
2823{
2824	struct amdgpu_bo_va_mapping *mapping;
2825	struct interval_tree_node *node;
2826	struct amdgpu_bo *bo = NULL;
2827	unsigned long userptr;
2828	uint32_t i;
2829	int r;
2830
2831	for (i = 0; i < p->n_pdds; i++) {
2832		struct amdgpu_vm *vm;
2833
2834		if (!p->pdds[i]->drm_priv)
2835			continue;
2836
2837		vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
2838		r = amdgpu_bo_reserve(vm->root.bo, false);
2839		if (r)
2840			return r;
2841
2842		/* Check userptr by searching entire vm->va interval tree */
2843		node = interval_tree_iter_first(&vm->va, 0, ~0ULL);
2844		while (node) {
2845			mapping = container_of((struct rb_node *)node,
2846					       struct amdgpu_bo_va_mapping, rb);
2847			bo = mapping->bo_va->base.bo;
2848
2849			if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
2850							 start << PAGE_SHIFT,
2851							 last << PAGE_SHIFT,
2852							 &userptr)) {
2853				node = interval_tree_iter_next(node, 0, ~0ULL);
2854				continue;
2855			}
2856
2857			pr_debug("[0x%llx 0x%llx] already userptr mapped\n",
2858				 start, last);
2859			if (bo_s && bo_l) {
2860				*bo_s = userptr >> PAGE_SHIFT;
2861				*bo_l = *bo_s + bo->tbo.ttm->num_pages - 1;
2862			}
2863			amdgpu_bo_unreserve(vm->root.bo);
2864			return -EADDRINUSE;
2865		}
2866		amdgpu_bo_unreserve(vm->root.bo);
2867	}
2868	return 0;
2869}
2870
2871static struct
2872svm_range *svm_range_create_unregistered_range(struct kfd_node *node,
2873						struct kfd_process *p,
2874						struct mm_struct *mm,
2875						int64_t addr)
2876{
2877	struct svm_range *prange = NULL;
2878	unsigned long start, last;
2879	uint32_t gpuid, gpuidx;
2880	bool is_heap_stack;
2881	uint64_t bo_s = 0;
2882	uint64_t bo_l = 0;
2883	int r;
2884
2885	if (svm_range_get_range_boundaries(p, addr, &start, &last,
2886					   &is_heap_stack))
2887		return NULL;
2888
2889	r = svm_range_check_vm(p, start, last, &bo_s, &bo_l);
2890	if (r != -EADDRINUSE)
2891		r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l);
2892
2893	if (r == -EADDRINUSE) {
2894		if (addr >= bo_s && addr <= bo_l)
2895			return NULL;
2896
2897		/* Create one page svm range if 2MB range overlapping */
2898		start = addr;
2899		last = addr;
2900	}
2901
2902	prange = svm_range_new(&p->svms, start, last, true);
2903	if (!prange) {
2904		pr_debug("Failed to create prange in address [0x%llx]\n", addr);
2905		return NULL;
2906	}
2907	if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) {
2908		pr_debug("failed to get gpuid from kgd\n");
2909		svm_range_free(prange, true);
2910		return NULL;
2911	}
2912
2913	if (is_heap_stack)
2914		prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM;
2915
2916	svm_range_add_to_svms(prange);
2917	svm_range_add_notifier_locked(mm, prange);
2918
2919	return prange;
2920}
2921
2922/* svm_range_skip_recover - decide if prange can be recovered
2923 * @prange: svm range structure
2924 *
2925 * GPU vm retry fault handle skip recover the range for cases:
2926 * 1. prange is on deferred list to be removed after unmap, it is stale fault,
2927 *    deferred list work will drain the stale fault before free the prange.
2928 * 2. prange is on deferred list to add interval notifier after split, or
2929 * 3. prange is child range, it is split from parent prange, recover later
2930 *    after interval notifier is added.
2931 *
2932 * Return: true to skip recover, false to recover
2933 */
2934static bool svm_range_skip_recover(struct svm_range *prange)
2935{
2936	struct svm_range_list *svms = prange->svms;
2937
2938	spin_lock(&svms->deferred_list_lock);
2939	if (list_empty(&prange->deferred_list) &&
2940	    list_empty(&prange->child_list)) {
2941		spin_unlock(&svms->deferred_list_lock);
2942		return false;
2943	}
2944	spin_unlock(&svms->deferred_list_lock);
2945
2946	if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2947		pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n",
2948			 svms, prange, prange->start, prange->last);
2949		return true;
2950	}
2951	if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP ||
2952	    prange->work_item.op == SVM_OP_ADD_RANGE) {
2953		pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n",
2954			 svms, prange, prange->start, prange->last);
2955		return true;
2956	}
2957	return false;
2958}
2959
2960static void
2961svm_range_count_fault(struct kfd_node *node, struct kfd_process *p,
2962		      int32_t gpuidx)
2963{
2964	struct kfd_process_device *pdd;
2965
2966	/* fault is on different page of same range
2967	 * or fault is skipped to recover later
2968	 * or fault is on invalid virtual address
2969	 */
2970	if (gpuidx == MAX_GPU_INSTANCE) {
2971		uint32_t gpuid;
2972		int r;
2973
2974		r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx);
2975		if (r < 0)
2976			return;
2977	}
2978
2979	/* fault is recovered
2980	 * or fault cannot recover because GPU no access on the range
2981	 */
2982	pdd = kfd_process_device_from_gpuidx(p, gpuidx);
2983	if (pdd)
2984		WRITE_ONCE(pdd->faults, pdd->faults + 1);
2985}
2986
2987static bool
2988svm_fault_allowed(struct vm_area_struct *vma, bool write_fault)
2989{
2990	unsigned long requested = VM_READ;
2991
2992	if (write_fault)
2993		requested |= VM_WRITE;
2994
2995	pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested,
2996		vma->vm_flags);
2997	return (vma->vm_flags & requested) == requested;
2998}
2999
3000int
3001svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid,
3002			uint32_t vmid, uint32_t node_id,
3003			uint64_t addr, uint64_t ts, bool write_fault)
3004{
3005	unsigned long start, last, size;
3006	struct mm_struct *mm = NULL;
3007	struct svm_range_list *svms;
3008	struct svm_range *prange;
3009	struct kfd_process *p;
3010	ktime_t timestamp = ktime_get_boottime();
3011	struct kfd_node *node;
3012	int32_t best_loc;
3013	int32_t gpuid, gpuidx = MAX_GPU_INSTANCE;
3014	bool write_locked = false;
3015	struct vm_area_struct *vma;
3016	bool migration = false;
3017	int r = 0;
3018
3019	if (!KFD_IS_SVM_API_SUPPORTED(adev)) {
3020		pr_debug("device does not support SVM\n");
3021		return -EFAULT;
3022	}
3023
3024	p = kfd_lookup_process_by_pasid(pasid, NULL);
3025	if (!p) {
3026		pr_debug("kfd process not founded pasid 0x%x\n", pasid);
3027		return 0;
3028	}
3029	svms = &p->svms;
3030
3031	pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr);
3032
3033	if (atomic_read(&svms->drain_pagefaults)) {
3034		pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr);
3035		r = 0;
3036		goto out;
3037	}
3038
3039	node = kfd_node_by_irq_ids(adev, node_id, vmid);
3040	if (!node) {
3041		pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id,
3042			 vmid);
3043		r = -EFAULT;
3044		goto out;
3045	}
3046
3047	if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) {
3048		pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id);
3049		r = -EFAULT;
3050		goto out;
3051	}
3052
3053	if (!p->xnack_enabled) {
3054		pr_debug("XNACK not enabled for pasid 0x%x\n", pasid);
3055		r = -EFAULT;
3056		goto out;
3057	}
3058
3059	/* p->lead_thread is available as kfd_process_wq_release flush the work
3060	 * before releasing task ref.
3061	 */
3062	mm = get_task_mm(p->lead_thread);
3063	if (!mm) {
3064		pr_debug("svms 0x%p failed to get mm\n", svms);
3065		r = 0;
3066		goto out;
3067	}
3068
3069	mmap_read_lock(mm);
3070retry_write_locked:
3071	mutex_lock(&svms->lock);
3072
3073	/* check if this page fault time stamp is before svms->checkpoint_ts */
3074	if (svms->checkpoint_ts[gpuidx] != 0) {
3075		if (amdgpu_ih_ts_after_or_equal(ts,  svms->checkpoint_ts[gpuidx])) {
3076			pr_debug("draining retry fault, drop fault 0x%llx\n", addr);
3077			if (write_locked)
3078				mmap_write_downgrade(mm);
3079			r = -EAGAIN;
3080			goto out_unlock_svms;
3081		} else {
3082			/* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts
3083			 * to zero to avoid following ts wrap around give wrong comparing
3084			 */
3085			svms->checkpoint_ts[gpuidx] = 0;
3086		}
3087	}
3088
3089	prange = svm_range_from_addr(svms, addr, NULL);
3090	if (!prange) {
3091		pr_debug("failed to find prange svms 0x%p address [0x%llx]\n",
3092			 svms, addr);
3093		if (!write_locked) {
3094			/* Need the write lock to create new range with MMU notifier.
3095			 * Also flush pending deferred work to make sure the interval
3096			 * tree is up to date before we add a new range
3097			 */
3098			mutex_unlock(&svms->lock);
3099			mmap_read_unlock(mm);
3100			mmap_write_lock(mm);
3101			write_locked = true;
3102			goto retry_write_locked;
3103		}
3104		prange = svm_range_create_unregistered_range(node, p, mm, addr);
3105		if (!prange) {
3106			pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n",
3107				 svms, addr);
3108			mmap_write_downgrade(mm);
3109			r = -EFAULT;
3110			goto out_unlock_svms;
3111		}
3112	}
3113	if (write_locked)
3114		mmap_write_downgrade(mm);
3115
3116	mutex_lock(&prange->migrate_mutex);
3117
3118	if (svm_range_skip_recover(prange)) {
3119		amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
3120		r = 0;
3121		goto out_unlock_range;
3122	}
3123
3124	/* skip duplicate vm fault on different pages of same range */
3125	if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp,
3126				AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) {
3127		pr_debug("svms 0x%p [0x%lx %lx] already restored\n",
3128			 svms, prange->start, prange->last);
3129		r = 0;
3130		goto out_unlock_range;
3131	}
3132
3133	/* __do_munmap removed VMA, return success as we are handling stale
3134	 * retry fault.
3135	 */
3136	vma = vma_lookup(mm, addr << PAGE_SHIFT);
3137	if (!vma) {
3138		pr_debug("address 0x%llx VMA is removed\n", addr);
3139		r = 0;
3140		goto out_unlock_range;
3141	}
3142
3143	if (!svm_fault_allowed(vma, write_fault)) {
3144		pr_debug("fault addr 0x%llx no %s permission\n", addr,
3145			write_fault ? "write" : "read");
3146		r = -EPERM;
3147		goto out_unlock_range;
3148	}
3149
3150	best_loc = svm_range_best_restore_location(prange, node, &gpuidx);
3151	if (best_loc == -1) {
3152		pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n",
3153			 svms, prange->start, prange->last);
3154		r = -EACCES;
3155		goto out_unlock_range;
3156	}
3157
3158	pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n",
3159		 svms, prange->start, prange->last, best_loc,
3160		 prange->actual_loc);
3161
3162	kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr,
3163				       write_fault, timestamp);
3164
3165	/* Align migration range start and size to granularity size */
3166	size = 1UL << prange->granularity;
3167	start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start);
3168	last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last);
3169	if (prange->actual_loc != 0 || best_loc != 0) {
3170		if (best_loc) {
3171			r = svm_migrate_to_vram(prange, best_loc, start, last,
3172					mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU);
3173			if (r) {
3174				pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n",
3175					 r, addr);
3176				/* Fallback to system memory if migration to
3177				 * VRAM failed
3178				 */
3179				if (prange->actual_loc && prange->actual_loc != best_loc)
3180					r = svm_migrate_vram_to_ram(prange, mm, start, last,
3181						KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL);
3182				else
3183					r = 0;
3184			}
3185		} else {
3186			r = svm_migrate_vram_to_ram(prange, mm, start, last,
3187					KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL);
3188		}
3189		if (r) {
3190			pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n",
3191				 r, svms, start, last);
3192			goto out_migrate_fail;
3193		} else {
3194			migration = true;
3195		}
3196	}
3197
3198	r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false,
3199				       false, false);
3200	if (r)
3201		pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n",
3202			 r, svms, start, last);
3203
3204out_migrate_fail:
3205	kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr,
3206				     migration);
3207
3208out_unlock_range:
3209	mutex_unlock(&prange->migrate_mutex);
3210out_unlock_svms:
3211	mutex_unlock(&svms->lock);
3212	mmap_read_unlock(mm);
3213
3214	if (r != -EAGAIN)
3215		svm_range_count_fault(node, p, gpuidx);
3216
3217	mmput(mm);
3218out:
3219	kfd_unref_process(p);
3220
3221	if (r == -EAGAIN) {
3222		pr_debug("recover vm fault later\n");
3223		amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
3224		r = 0;
3225	}
3226	return r;
3227}
3228
3229int
3230svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled)
3231{
3232	struct svm_range *prange, *pchild;
3233	uint64_t reserved_size = 0;
3234	uint64_t size;
3235	int r = 0;
3236
3237	pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled);
3238
3239	mutex_lock(&p->svms.lock);
3240
3241	list_for_each_entry(prange, &p->svms.list, list) {
3242		svm_range_lock(prange);
3243		list_for_each_entry(pchild, &prange->child_list, child_list) {
3244			size = (pchild->last - pchild->start + 1) << PAGE_SHIFT;
3245			if (xnack_enabled) {
3246				amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3247					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3248			} else {
3249				r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3250					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3251				if (r)
3252					goto out_unlock;
3253				reserved_size += size;
3254			}
3255		}
3256
3257		size = (prange->last - prange->start + 1) << PAGE_SHIFT;
3258		if (xnack_enabled) {
3259			amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3260					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3261		} else {
3262			r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3263					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3264			if (r)
3265				goto out_unlock;
3266			reserved_size += size;
3267		}
3268out_unlock:
3269		svm_range_unlock(prange);
3270		if (r)
3271			break;
3272	}
3273
3274	if (r)
3275		amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size,
3276					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3277	else
3278		/* Change xnack mode must be inside svms lock, to avoid race with
3279		 * svm_range_deferred_list_work unreserve memory in parallel.
3280		 */
3281		p->xnack_enabled = xnack_enabled;
3282
3283	mutex_unlock(&p->svms.lock);
3284	return r;
3285}
3286
3287void svm_range_list_fini(struct kfd_process *p)
3288{
3289	struct svm_range *prange;
3290	struct svm_range *next;
3291
3292	pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid,
3293		 &p->svms);
3294
3295	cancel_delayed_work_sync(&p->svms.restore_work);
3296
3297	/* Ensure list work is finished before process is destroyed */
3298	flush_work(&p->svms.deferred_list_work);
3299
3300	/*
3301	 * Ensure no retry fault comes in afterwards, as page fault handler will
3302	 * not find kfd process and take mm lock to recover fault.
3303	 * stop kfd page fault handing, then wait pending page faults got drained
3304	 */
3305	atomic_set(&p->svms.drain_pagefaults, 1);
3306	svm_range_drain_retry_fault(&p->svms);
3307
3308	list_for_each_entry_safe(prange, next, &p->svms.list, list) {
3309		svm_range_unlink(prange);
3310		svm_range_remove_notifier(prange);
3311		svm_range_free(prange, true);
3312	}
3313
3314	mutex_destroy(&p->svms.lock);
3315
3316	pr_debug("process pid %d svms 0x%p done\n",
3317		p->lead_thread->pid, &p->svms);
3318}
3319
3320int svm_range_list_init(struct kfd_process *p)
3321{
3322	struct svm_range_list *svms = &p->svms;
3323	int i;
3324
3325	svms->objects = RB_ROOT_CACHED;
3326	mutex_init(&svms->lock);
3327	INIT_LIST_HEAD(&svms->list);
3328	atomic_set(&svms->evicted_ranges, 0);
3329	atomic_set(&svms->drain_pagefaults, 0);
3330	INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work);
3331	INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work);
3332	INIT_LIST_HEAD(&svms->deferred_range_list);
3333	INIT_LIST_HEAD(&svms->criu_svm_metadata_list);
3334	spin_lock_init(&svms->deferred_list_lock);
3335
3336	for (i = 0; i < p->n_pdds; i++)
3337		if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev))
3338			bitmap_set(svms->bitmap_supported, i, 1);
3339
3340	 /* Value of default granularity cannot exceed 0x1B, the
3341	  * number of pages supported by a 4-level paging table
3342	  */
3343	svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B);
3344	pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity);
3345
3346	return 0;
3347}
3348
3349/**
3350 * svm_range_check_vm - check if virtual address range mapped already
3351 * @p: current kfd_process
3352 * @start: range start address, in pages
3353 * @last: range last address, in pages
3354 * @bo_s: mapping start address in pages if address range already mapped
3355 * @bo_l: mapping last address in pages if address range already mapped
3356 *
3357 * The purpose is to avoid virtual address ranges already allocated by
3358 * kfd_ioctl_alloc_memory_of_gpu ioctl.
3359 * It looks for each pdd in the kfd_process.
3360 *
3361 * Context: Process context
3362 *
3363 * Return 0 - OK, if the range is not mapped.
3364 * Otherwise error code:
3365 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu
3366 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by
3367 * a signal. Release all buffer reservations and return to user-space.
3368 */
3369static int
3370svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
3371		   uint64_t *bo_s, uint64_t *bo_l)
3372{
3373	struct amdgpu_bo_va_mapping *mapping;
3374	struct interval_tree_node *node;
3375	uint32_t i;
3376	int r;
3377
3378	for (i = 0; i < p->n_pdds; i++) {
3379		struct amdgpu_vm *vm;
3380
3381		if (!p->pdds[i]->drm_priv)
3382			continue;
3383
3384		vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
3385		r = amdgpu_bo_reserve(vm->root.bo, false);
3386		if (r)
3387			return r;
3388
3389		node = interval_tree_iter_first(&vm->va, start, last);
3390		if (node) {
3391			pr_debug("range [0x%llx 0x%llx] already TTM mapped\n",
3392				 start, last);
3393			mapping = container_of((struct rb_node *)node,
3394					       struct amdgpu_bo_va_mapping, rb);
3395			if (bo_s && bo_l) {
3396				*bo_s = mapping->start;
3397				*bo_l = mapping->last;
3398			}
3399			amdgpu_bo_unreserve(vm->root.bo);
3400			return -EADDRINUSE;
3401		}
3402		amdgpu_bo_unreserve(vm->root.bo);
3403	}
3404
3405	return 0;
3406}
3407
3408/**
3409 * svm_range_is_valid - check if virtual address range is valid
3410 * @p: current kfd_process
3411 * @start: range start address, in pages
3412 * @size: range size, in pages
3413 *
3414 * Valid virtual address range means it belongs to one or more VMAs
3415 *
3416 * Context: Process context
3417 *
3418 * Return:
3419 *  0 - OK, otherwise error code
3420 */
3421static int
3422svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size)
3423{
3424	const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP;
3425	struct vm_area_struct *vma;
3426	unsigned long end;
3427	unsigned long start_unchg = start;
3428
3429	start <<= PAGE_SHIFT;
3430	end = start + (size << PAGE_SHIFT);
3431	do {
3432		vma = vma_lookup(p->mm, start);
3433		if (!vma || (vma->vm_flags & device_vma))
3434			return -EFAULT;
3435		start = min(end, vma->vm_end);
3436	} while (start < end);
3437
3438	return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL,
3439				  NULL);
3440}
3441
3442/**
3443 * svm_range_best_prefetch_location - decide the best prefetch location
3444 * @prange: svm range structure
3445 *
3446 * For xnack off:
3447 * If range map to single GPU, the best prefetch location is prefetch_loc, which
3448 * can be CPU or GPU.
3449 *
3450 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on
3451 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise
3452 * the best prefetch location is always CPU, because GPU can not have coherent
3453 * mapping VRAM of other GPUs even with large-BAR PCIe connection.
3454 *
3455 * For xnack on:
3456 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is
3457 * prefetch_loc, other GPU access will generate vm fault and trigger migration.
3458 *
3459 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same
3460 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best
3461 * prefetch location is always CPU.
3462 *
3463 * Context: Process context
3464 *
3465 * Return:
3466 * 0 for CPU or GPU id
3467 */
3468static uint32_t
3469svm_range_best_prefetch_location(struct svm_range *prange)
3470{
3471	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
3472	uint32_t best_loc = prange->prefetch_loc;
3473	struct kfd_process_device *pdd;
3474	struct kfd_node *bo_node;
3475	struct kfd_process *p;
3476	uint32_t gpuidx;
3477
3478	p = container_of(prange->svms, struct kfd_process, svms);
3479
3480	if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED)
3481		goto out;
3482
3483	bo_node = svm_range_get_node_by_id(prange, best_loc);
3484	if (!bo_node) {
3485		WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc);
3486		best_loc = 0;
3487		goto out;
3488	}
3489
3490	if (bo_node->adev->apu_prefer_gtt) {
3491		best_loc = 0;
3492		goto out;
3493	}
3494
3495	if (p->xnack_enabled)
3496		bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
3497	else
3498		bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
3499			  MAX_GPU_INSTANCE);
3500
3501	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
3502		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
3503		if (!pdd) {
3504			pr_debug("failed to get device by idx 0x%x\n", gpuidx);
3505			continue;
3506		}
3507
3508		if (pdd->dev->adev == bo_node->adev)
3509			continue;
3510
3511		if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) {
3512			best_loc = 0;
3513			break;
3514		}
3515	}
3516
3517out:
3518	pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n",
3519		 p->xnack_enabled, &p->svms, prange->start, prange->last,
3520		 best_loc);
3521
3522	return best_loc;
3523}
3524
3525/* svm_range_trigger_migration - start page migration if prefetch loc changed
3526 * @mm: current process mm_struct
3527 * @prange: svm range structure
3528 * @migrated: output, true if migration is triggered
3529 *
3530 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range
3531 * from ram to vram.
3532 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range
3533 * from vram to ram.
3534 *
3535 * If GPU vm fault retry is not enabled, migration interact with MMU notifier
3536 * and restore work:
3537 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict
3538 *    stops all queues, schedule restore work
3539 * 2. svm_range_restore_work wait for migration is done by
3540 *    a. svm_range_validate_vram takes prange->migrate_mutex
3541 *    b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns
3542 * 3. restore work update mappings of GPU, resume all queues.
3543 *
3544 * Context: Process context
3545 *
3546 * Return:
3547 * 0 - OK, otherwise - error code of migration
3548 */
3549static int
3550svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange,
3551			    bool *migrated)
3552{
3553	uint32_t best_loc;
3554	int r = 0;
3555
3556	*migrated = false;
3557	best_loc = svm_range_best_prefetch_location(prange);
3558
3559	/* when best_loc is a gpu node and same as prange->actual_loc
3560	 * we still need do migration as prange->actual_loc !=0 does
3561	 * not mean all pages in prange are vram. hmm migrate will pick
3562	 * up right pages during migration.
3563	 */
3564	if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) ||
3565	    (best_loc == 0 && prange->actual_loc == 0))
3566		return 0;
3567
3568	if (!best_loc) {
3569		r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last,
3570					KFD_MIGRATE_TRIGGER_PREFETCH, NULL);
3571		*migrated = !r;
3572		return r;
3573	}
3574
3575	r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last,
3576				mm, KFD_MIGRATE_TRIGGER_PREFETCH);
3577	*migrated = !r;
3578
3579	return 0;
3580}
3581
3582int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)
3583{
3584	/* Dereferencing fence->svm_bo is safe here because the fence hasn't
3585	 * signaled yet and we're under the protection of the fence->lock.
3586	 * After the fence is signaled in svm_range_bo_release, we cannot get
3587	 * here any more.
3588	 *
3589	 * Reference is dropped in svm_range_evict_svm_bo_worker.
3590	 */
3591	if (svm_bo_ref_unless_zero(fence->svm_bo)) {
3592		WRITE_ONCE(fence->svm_bo->evicting, 1);
3593		schedule_work(&fence->svm_bo->eviction_work);
3594	}
3595
3596	return 0;
3597}
3598
3599static void svm_range_evict_svm_bo_worker(struct work_struct *work)
3600{
3601	struct svm_range_bo *svm_bo;
3602	struct mm_struct *mm;
3603	int r = 0;
3604
3605	svm_bo = container_of(work, struct svm_range_bo, eviction_work);
3606
3607	if (mmget_not_zero(svm_bo->eviction_fence->mm)) {
3608		mm = svm_bo->eviction_fence->mm;
3609	} else {
3610		svm_range_bo_unref(svm_bo);
3611		return;
3612	}
3613
3614	mmap_read_lock(mm);
3615	spin_lock(&svm_bo->list_lock);
3616	while (!list_empty(&svm_bo->range_list) && !r) {
3617		struct svm_range *prange =
3618				list_first_entry(&svm_bo->range_list,
3619						struct svm_range, svm_bo_list);
3620		int retries = 3;
3621
3622		list_del_init(&prange->svm_bo_list);
3623		spin_unlock(&svm_bo->list_lock);
3624
3625		pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
3626			 prange->start, prange->last);
3627
3628		mutex_lock(&prange->migrate_mutex);
3629		do {
3630			/* migrate all vram pages in this prange to sys ram
3631			 * after that prange->actual_loc should be zero
3632			 */
3633			r = svm_migrate_vram_to_ram(prange, mm,
3634					prange->start, prange->last,
3635					KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL);
3636		} while (!r && prange->actual_loc && --retries);
3637
3638		if (!r && prange->actual_loc)
3639			pr_info_once("Migration failed during eviction");
3640
3641		if (!prange->actual_loc) {
3642			mutex_lock(&prange->lock);
3643			prange->svm_bo = NULL;
3644			mutex_unlock(&prange->lock);
3645		}
3646		mutex_unlock(&prange->migrate_mutex);
3647
3648		spin_lock(&svm_bo->list_lock);
3649	}
3650	spin_unlock(&svm_bo->list_lock);
3651	mmap_read_unlock(mm);
3652	mmput(mm);
3653
3654	dma_fence_signal(&svm_bo->eviction_fence->base);
3655
3656	/* This is the last reference to svm_bo, after svm_range_vram_node_free
3657	 * has been called in svm_migrate_vram_to_ram
3658	 */
3659	WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n");
3660	svm_range_bo_unref(svm_bo);
3661}
3662
3663static int
3664svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm,
3665		   uint64_t start, uint64_t size, uint32_t nattr,
3666		   struct kfd_ioctl_svm_attribute *attrs)
3667{
3668	struct amdkfd_process_info *process_info = p->kgd_process_info;
3669	struct list_head update_list;
3670	struct list_head insert_list;
3671	struct list_head remove_list;
3672	struct list_head remap_list;
3673	struct svm_range_list *svms;
3674	struct svm_range *prange;
3675	struct svm_range *next;
3676	bool update_mapping = false;
3677	bool flush_tlb;
3678	int r, ret = 0;
3679
3680	pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n",
3681		 p->lead_thread->pid, &p->svms, start, start + size - 1, size);
3682
3683	r = svm_range_check_attr(p, nattr, attrs);
3684	if (r)
3685		return r;
3686
3687	svms = &p->svms;
3688
3689	mutex_lock(&process_info->lock);
3690
3691	svm_range_list_lock_and_flush_work(svms, mm);
3692
3693	r = svm_range_is_valid(p, start, size);
3694	if (r) {
3695		pr_debug("invalid range r=%d\n", r);
3696		mmap_write_unlock(mm);
3697		goto out;
3698	}
3699
3700	mutex_lock(&svms->lock);
3701
3702	/* Add new range and split existing ranges as needed */
3703	r = svm_range_add(p, start, size, nattr, attrs, &update_list,
3704			  &insert_list, &remove_list, &remap_list);
3705	if (r) {
3706		mutex_unlock(&svms->lock);
3707		mmap_write_unlock(mm);
3708		goto out;
3709	}
3710	/* Apply changes as a transaction */
3711	list_for_each_entry_safe(prange, next, &insert_list, list) {
3712		svm_range_add_to_svms(prange);
3713		svm_range_add_notifier_locked(mm, prange);
3714	}
3715	list_for_each_entry(prange, &update_list, update_list) {
3716		svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping);
3717		/* TODO: unmap ranges from GPU that lost access */
3718	}
3719	update_mapping |= !p->xnack_enabled && !list_empty(&remap_list);
3720
3721	list_for_each_entry_safe(prange, next, &remove_list, update_list) {
3722		pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n",
3723			 prange->svms, prange, prange->start,
3724			 prange->last);
3725		svm_range_unlink(prange);
3726		svm_range_remove_notifier(prange);
3727		svm_range_free(prange, false);
3728	}
3729
3730	mmap_write_downgrade(mm);
3731	/* Trigger migrations and revalidate and map to GPUs as needed. If
3732	 * this fails we may be left with partially completed actions. There
3733	 * is no clean way of rolling back to the previous state in such a
3734	 * case because the rollback wouldn't be guaranteed to work either.
3735	 */
3736	list_for_each_entry(prange, &update_list, update_list) {
3737		bool migrated;
3738
3739		mutex_lock(&prange->migrate_mutex);
3740
3741		r = svm_range_trigger_migration(mm, prange, &migrated);
3742		if (r)
3743			goto out_unlock_range;
3744
3745		if (migrated && (!p->xnack_enabled ||
3746		    (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) &&
3747		    prange->mapped_to_gpu) {
3748			pr_debug("restore_work will update mappings of GPUs\n");
3749			mutex_unlock(&prange->migrate_mutex);
3750			continue;
3751		}
3752
3753		if (!migrated && !update_mapping) {
3754			mutex_unlock(&prange->migrate_mutex);
3755			continue;
3756		}
3757
3758		flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu;
3759
3760		r = svm_range_validate_and_map(mm, prange->start, prange->last, prange,
3761					       MAX_GPU_INSTANCE, true, true, flush_tlb);
3762		if (r)
3763			pr_debug("failed %d to map svm range\n", r);
3764
3765out_unlock_range:
3766		mutex_unlock(&prange->migrate_mutex);
3767		if (r)
3768			ret = r;
3769	}
3770
3771	list_for_each_entry(prange, &remap_list, update_list) {
3772		pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n",
3773			 prange, prange->start, prange->last);
3774		mutex_lock(&prange->migrate_mutex);
3775		r = svm_range_validate_and_map(mm,  prange->start, prange->last, prange,
3776					       MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu);
3777		if (r)
3778			pr_debug("failed %d on remap svm range\n", r);
3779		mutex_unlock(&prange->migrate_mutex);
3780		if (r)
3781			ret = r;
3782	}
3783
3784	dynamic_svm_range_dump(svms);
3785
3786	mutex_unlock(&svms->lock);
3787	mmap_read_unlock(mm);
3788out:
3789	mutex_unlock(&process_info->lock);
3790
3791	pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n",
3792		 p->lead_thread->pid, &p->svms, start, start + size - 1, r);
3793
3794	return ret ? ret : r;
3795}
3796
3797static int
3798svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm,
3799		   uint64_t start, uint64_t size, uint32_t nattr,
3800		   struct kfd_ioctl_svm_attribute *attrs)
3801{
3802	DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE);
3803	DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE);
3804	bool get_preferred_loc = false;
3805	bool get_prefetch_loc = false;
3806	bool get_granularity = false;
3807	bool get_accessible = false;
3808	bool get_flags = false;
3809	uint64_t last = start + size - 1UL;
3810	uint8_t granularity = 0xff;
3811	struct interval_tree_node *node;
3812	struct svm_range_list *svms;
3813	struct svm_range *prange;
3814	uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3815	uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3816	uint32_t flags_and = 0xffffffff;
3817	uint32_t flags_or = 0;
3818	int gpuidx;
3819	uint32_t i;
3820	int r = 0;
3821
3822	pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start,
3823		 start + size - 1, nattr);
3824
3825	/* Flush pending deferred work to avoid racing with deferred actions from
3826	 * previous memory map changes (e.g. munmap). Concurrent memory map changes
3827	 * can still race with get_attr because we don't hold the mmap lock. But that
3828	 * would be a race condition in the application anyway, and undefined
3829	 * behaviour is acceptable in that case.
3830	 */
3831	flush_work(&p->svms.deferred_list_work);
3832
3833	mmap_read_lock(mm);
3834	r = svm_range_is_valid(p, start, size);
3835	mmap_read_unlock(mm);
3836	if (r) {
3837		pr_debug("invalid range r=%d\n", r);
3838		return r;
3839	}
3840
3841	for (i = 0; i < nattr; i++) {
3842		switch (attrs[i].type) {
3843		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3844			get_preferred_loc = true;
3845			break;
3846		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3847			get_prefetch_loc = true;
3848			break;
3849		case KFD_IOCTL_SVM_ATTR_ACCESS:
3850			get_accessible = true;
3851			break;
3852		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3853		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3854			get_flags = true;
3855			break;
3856		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3857			get_granularity = true;
3858			break;
3859		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
3860		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
3861			fallthrough;
3862		default:
3863			pr_debug("get invalid attr type 0x%x\n", attrs[i].type);
3864			return -EINVAL;
3865		}
3866	}
3867
3868	svms = &p->svms;
3869
3870	mutex_lock(&svms->lock);
3871
3872	node = interval_tree_iter_first(&svms->objects, start, last);
3873	if (!node) {
3874		pr_debug("range attrs not found return default values\n");
3875		svm_range_set_default_attributes(svms, &location, &prefetch_loc,
3876						 &granularity, &flags_and);
3877		flags_or = flags_and;
3878		if (p->xnack_enabled)
3879			bitmap_copy(bitmap_access, svms->bitmap_supported,
3880				    MAX_GPU_INSTANCE);
3881		else
3882			bitmap_zero(bitmap_access, MAX_GPU_INSTANCE);
3883		bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE);
3884		goto fill_values;
3885	}
3886	bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE);
3887	bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE);
3888
3889	while (node) {
3890		struct interval_tree_node *next;
3891
3892		prange = container_of(node, struct svm_range, it_node);
3893		next = interval_tree_iter_next(node, start, last);
3894
3895		if (get_preferred_loc) {
3896			if (prange->preferred_loc ==
3897					KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3898			    (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3899			     location != prange->preferred_loc)) {
3900				location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3901				get_preferred_loc = false;
3902			} else {
3903				location = prange->preferred_loc;
3904			}
3905		}
3906		if (get_prefetch_loc) {
3907			if (prange->prefetch_loc ==
3908					KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3909			    (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3910			     prefetch_loc != prange->prefetch_loc)) {
3911				prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3912				get_prefetch_loc = false;
3913			} else {
3914				prefetch_loc = prange->prefetch_loc;
3915			}
3916		}
3917		if (get_accessible) {
3918			bitmap_and(bitmap_access, bitmap_access,
3919				   prange->bitmap_access, MAX_GPU_INSTANCE);
3920			bitmap_and(bitmap_aip, bitmap_aip,
3921				   prange->bitmap_aip, MAX_GPU_INSTANCE);
3922		}
3923		if (get_flags) {
3924			flags_and &= prange->flags;
3925			flags_or |= prange->flags;
3926		}
3927
3928		if (get_granularity && prange->granularity < granularity)
3929			granularity = prange->granularity;
3930
3931		node = next;
3932	}
3933fill_values:
3934	mutex_unlock(&svms->lock);
3935
3936	for (i = 0; i < nattr; i++) {
3937		switch (attrs[i].type) {
3938		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3939			attrs[i].value = location;
3940			break;
3941		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3942			attrs[i].value = prefetch_loc;
3943			break;
3944		case KFD_IOCTL_SVM_ATTR_ACCESS:
3945			gpuidx = kfd_process_gpuidx_from_gpuid(p,
3946							       attrs[i].value);
3947			if (gpuidx < 0) {
3948				pr_debug("invalid gpuid %x\n", attrs[i].value);
3949				return -EINVAL;
3950			}
3951			if (test_bit(gpuidx, bitmap_access))
3952				attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS;
3953			else if (test_bit(gpuidx, bitmap_aip))
3954				attrs[i].type =
3955					KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE;
3956			else
3957				attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS;
3958			break;
3959		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3960			attrs[i].value = flags_and;
3961			break;
3962		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3963			attrs[i].value = ~flags_or;
3964			break;
3965		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3966			attrs[i].value = (uint32_t)granularity;
3967			break;
3968		}
3969	}
3970
3971	return 0;
3972}
3973
3974int kfd_criu_resume_svm(struct kfd_process *p)
3975{
3976	struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL;
3977	int nattr_common = 4, nattr_accessibility = 1;
3978	struct criu_svm_metadata *criu_svm_md = NULL;
3979	struct svm_range_list *svms = &p->svms;
3980	struct criu_svm_metadata *next = NULL;
3981	uint32_t set_flags = 0xffffffff;
3982	int i, j, num_attrs, ret = 0;
3983	uint64_t set_attr_size;
3984	struct mm_struct *mm;
3985
3986	if (list_empty(&svms->criu_svm_metadata_list)) {
3987		pr_debug("No SVM data from CRIU restore stage 2\n");
3988		return ret;
3989	}
3990
3991	mm = get_task_mm(p->lead_thread);
3992	if (!mm) {
3993		pr_err("failed to get mm for the target process\n");
3994		return -ESRCH;
3995	}
3996
3997	num_attrs = nattr_common + (nattr_accessibility * p->n_pdds);
3998
3999	i = j = 0;
4000	list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) {
4001		pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n",
4002			 i, criu_svm_md->data.start_addr, criu_svm_md->data.size);
4003
4004		for (j = 0; j < num_attrs; j++) {
4005			pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n",
4006				 i, j, criu_svm_md->data.attrs[j].type,
4007				 i, j, criu_svm_md->data.attrs[j].value);
4008			switch (criu_svm_md->data.attrs[j].type) {
4009			/* During Checkpoint operation, the query for
4010			 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might
4011			 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were
4012			 * not used by the range which was checkpointed. Care
4013			 * must be taken to not restore with an invalid value
4014			 * otherwise the gpuidx value will be invalid and
4015			 * set_attr would eventually fail so just replace those
4016			 * with another dummy attribute such as
4017			 * KFD_IOCTL_SVM_ATTR_SET_FLAGS.
4018			 */
4019			case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
4020				if (criu_svm_md->data.attrs[j].value ==
4021				    KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
4022					criu_svm_md->data.attrs[j].type =
4023						KFD_IOCTL_SVM_ATTR_SET_FLAGS;
4024					criu_svm_md->data.attrs[j].value = 0;
4025				}
4026				break;
4027			case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
4028				set_flags = criu_svm_md->data.attrs[j].value;
4029				break;
4030			default:
4031				break;
4032			}
4033		}
4034
4035		/* CLR_FLAGS is not available via get_attr during checkpoint but
4036		 * it needs to be inserted before restoring the ranges so
4037		 * allocate extra space for it before calling set_attr
4038		 */
4039		set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4040						(num_attrs + 1);
4041		set_attr_new = krealloc(set_attr, set_attr_size,
4042					    GFP_KERNEL);
4043		if (!set_attr_new) {
4044			ret = -ENOMEM;
4045			goto exit;
4046		}
4047		set_attr = set_attr_new;
4048
4049		memcpy(set_attr, criu_svm_md->data.attrs, num_attrs *
4050					sizeof(struct kfd_ioctl_svm_attribute));
4051		set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS;
4052		set_attr[num_attrs].value = ~set_flags;
4053
4054		ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr,
4055					 criu_svm_md->data.size, num_attrs + 1,
4056					 set_attr);
4057		if (ret) {
4058			pr_err("CRIU: failed to set range attributes\n");
4059			goto exit;
4060		}
4061
4062		i++;
4063	}
4064exit:
4065	kfree(set_attr);
4066	list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) {
4067		pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n",
4068						criu_svm_md->data.start_addr);
4069		kfree(criu_svm_md);
4070	}
4071
4072	mmput(mm);
4073	return ret;
4074
4075}
4076
4077int kfd_criu_restore_svm(struct kfd_process *p,
4078			 uint8_t __user *user_priv_ptr,
4079			 uint64_t *priv_data_offset,
4080			 uint64_t max_priv_data_size)
4081{
4082	uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size;
4083	int nattr_common = 4, nattr_accessibility = 1;
4084	struct criu_svm_metadata *criu_svm_md = NULL;
4085	struct svm_range_list *svms = &p->svms;
4086	uint32_t num_devices;
4087	int ret = 0;
4088
4089	num_devices = p->n_pdds;
4090	/* Handle one SVM range object at a time, also the number of gpus are
4091	 * assumed to be same on the restore node, checking must be done while
4092	 * evaluating the topology earlier
4093	 */
4094
4095	svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) *
4096		(nattr_common + nattr_accessibility * num_devices);
4097	svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size;
4098
4099	svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) +
4100								svm_attrs_size;
4101
4102	criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL);
4103	if (!criu_svm_md) {
4104		pr_err("failed to allocate memory to store svm metadata\n");
4105		return -ENOMEM;
4106	}
4107	if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) {
4108		ret = -EINVAL;
4109		goto exit;
4110	}
4111
4112	ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset,
4113			     svm_priv_data_size);
4114	if (ret) {
4115		ret = -EFAULT;
4116		goto exit;
4117	}
4118	*priv_data_offset += svm_priv_data_size;
4119
4120	list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list);
4121
4122	return 0;
4123
4124
4125exit:
4126	kfree(criu_svm_md);
4127	return ret;
4128}
4129
4130void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges,
4131			uint64_t *svm_priv_data_size)
4132{
4133	uint64_t total_size, accessibility_size, common_attr_size;
4134	int nattr_common = 4, nattr_accessibility = 1;
4135	int num_devices = p->n_pdds;
4136	struct svm_range_list *svms;
4137	struct svm_range *prange;
4138	uint32_t count = 0;
4139
4140	*svm_priv_data_size = 0;
4141
4142	svms = &p->svms;
4143
4144	mutex_lock(&svms->lock);
4145	list_for_each_entry(prange, &svms->list, list) {
4146		pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n",
4147			 prange, prange->start, prange->npages,
4148			 prange->start + prange->npages - 1);
4149		count++;
4150	}
4151	mutex_unlock(&svms->lock);
4152
4153	*num_svm_ranges = count;
4154	/* Only the accessbility attributes need to be queried for all the gpus
4155	 * individually, remaining ones are spanned across the entire process
4156	 * regardless of the various gpu nodes. Of the remaining attributes,
4157	 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved.
4158	 *
4159	 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC
4160	 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC
4161	 * KFD_IOCTL_SVM_ATTR_SET_FLAGS
4162	 * KFD_IOCTL_SVM_ATTR_GRANULARITY
4163	 *
4164	 * ** ACCESSBILITY ATTRIBUTES **
4165	 * (Considered as one, type is altered during query, value is gpuid)
4166	 * KFD_IOCTL_SVM_ATTR_ACCESS
4167	 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE
4168	 * KFD_IOCTL_SVM_ATTR_NO_ACCESS
4169	 */
4170	if (*num_svm_ranges > 0) {
4171		common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4172			nattr_common;
4173		accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) *
4174			nattr_accessibility * num_devices;
4175
4176		total_size = sizeof(struct kfd_criu_svm_range_priv_data) +
4177			common_attr_size + accessibility_size;
4178
4179		*svm_priv_data_size = *num_svm_ranges * total_size;
4180	}
4181
4182	pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges,
4183		 *svm_priv_data_size);
4184}
4185
4186int kfd_criu_checkpoint_svm(struct kfd_process *p,
4187			    uint8_t __user *user_priv_data,
4188			    uint64_t *priv_data_offset)
4189{
4190	struct kfd_criu_svm_range_priv_data *svm_priv = NULL;
4191	struct kfd_ioctl_svm_attribute *query_attr = NULL;
4192	uint64_t svm_priv_data_size, query_attr_size = 0;
4193	int index, nattr_common = 4, ret = 0;
4194	struct svm_range_list *svms;
4195	int num_devices = p->n_pdds;
4196	struct svm_range *prange;
4197	struct mm_struct *mm;
4198
4199	svms = &p->svms;
4200
4201	mm = get_task_mm(p->lead_thread);
4202	if (!mm) {
4203		pr_err("failed to get mm for the target process\n");
4204		return -ESRCH;
4205	}
4206
4207	query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4208				(nattr_common + num_devices);
4209
4210	query_attr = kzalloc(query_attr_size, GFP_KERNEL);
4211	if (!query_attr) {
4212		ret = -ENOMEM;
4213		goto exit;
4214	}
4215
4216	query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC;
4217	query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC;
4218	query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS;
4219	query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY;
4220
4221	for (index = 0; index < num_devices; index++) {
4222		struct kfd_process_device *pdd = p->pdds[index];
4223
4224		query_attr[index + nattr_common].type =
4225			KFD_IOCTL_SVM_ATTR_ACCESS;
4226		query_attr[index + nattr_common].value = pdd->user_gpu_id;
4227	}
4228
4229	svm_priv_data_size = sizeof(*svm_priv) + query_attr_size;
4230
4231	svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL);
4232	if (!svm_priv) {
4233		ret = -ENOMEM;
4234		goto exit_query;
4235	}
4236
4237	index = 0;
4238	list_for_each_entry(prange, &svms->list, list) {
4239
4240		svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE;
4241		svm_priv->start_addr = prange->start;
4242		svm_priv->size = prange->npages;
4243		memcpy(&svm_priv->attrs, query_attr, query_attr_size);
4244		pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n",
4245			 prange, prange->start, prange->npages,
4246			 prange->start + prange->npages - 1,
4247			 prange->npages * PAGE_SIZE);
4248
4249		ret = svm_range_get_attr(p, mm, svm_priv->start_addr,
4250					 svm_priv->size,
4251					 (nattr_common + num_devices),
4252					 svm_priv->attrs);
4253		if (ret) {
4254			pr_err("CRIU: failed to obtain range attributes\n");
4255			goto exit_priv;
4256		}
4257
4258		if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv,
4259				 svm_priv_data_size)) {
4260			pr_err("Failed to copy svm priv to user\n");
4261			ret = -EFAULT;
4262			goto exit_priv;
4263		}
4264
4265		*priv_data_offset += svm_priv_data_size;
4266
4267	}
4268
4269
4270exit_priv:
4271	kfree(svm_priv);
4272exit_query:
4273	kfree(query_attr);
4274exit:
4275	mmput(mm);
4276	return ret;
4277}
4278
4279int
4280svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start,
4281	  uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs)
4282{
4283	struct mm_struct *mm = current->mm;
4284	int r;
4285
4286	start >>= PAGE_SHIFT;
4287	size >>= PAGE_SHIFT;
4288
4289	switch (op) {
4290	case KFD_IOCTL_SVM_OP_SET_ATTR:
4291		r = svm_range_set_attr(p, mm, start, size, nattrs, attrs);
4292		break;
4293	case KFD_IOCTL_SVM_OP_GET_ATTR:
4294		r = svm_range_get_attr(p, mm, start, size, nattrs, attrs);
4295		break;
4296	default:
4297		r = -EINVAL;
4298		break;
4299	}
4300
4301	return r;
4302}