amdgpu_vram_mgr.h

 1/* SPDX-License-Identifier: MIT
 2 * Copyright 2021 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __AMDGPU_VRAM_MGR_H__
25#define __AMDGPU_VRAM_MGR_H__
26
27#include <drm/drm_buddy.h>
28
29struct amdgpu_vram_mgr {
30	struct ttm_resource_manager manager;
31	struct drm_buddy mm;
32	/* protects access to buffer objects */
33	struct mutex lock;
34	struct list_head reservations_pending;
35	struct list_head reserved_pages;
36	atomic64_t vis_usage;
37	u64 default_page_size;
38	struct list_head allocated_vres_list;
39};
40
41struct amdgpu_vres_task {
42	pid_t pid;
43	char  comm[TASK_COMM_LEN];
44};
45
46struct amdgpu_vram_block_info {
47	u64 start;
48	u64 size;
49	struct amdgpu_vres_task task;
50};
51
52struct amdgpu_vram_mgr_resource {
53	struct ttm_resource base;
54	struct list_head blocks;
55	unsigned long flags;
56	struct list_head vres_node;
57	struct amdgpu_vres_task task;
58};
59
60static inline u64 amdgpu_vram_mgr_block_start(struct drm_buddy_block *block)
61{
62	return drm_buddy_block_offset(block);
63}
64
65static inline u64 amdgpu_vram_mgr_block_size(struct drm_buddy_block *block)
66{
67	return (u64)PAGE_SIZE << drm_buddy_block_order(block);
68}
69
70static inline bool amdgpu_vram_mgr_is_cleared(struct drm_buddy_block *block)
71{
72	return drm_buddy_block_is_clear(block);
73}
74
75static inline struct amdgpu_vram_mgr_resource *
76to_amdgpu_vram_mgr_resource(struct ttm_resource *res)
77{
78	return container_of(res, struct amdgpu_vram_mgr_resource, base);
79}
80
81static inline void amdgpu_vram_mgr_set_cleared(struct ttm_resource *res)
82{
83	struct amdgpu_vram_mgr_resource *ares = to_amdgpu_vram_mgr_resource(res);
84
85	WARN_ON(ares->flags & DRM_BUDDY_CLEARED);
86	ares->flags |= DRM_BUDDY_CLEARED;
87}
88
89int amdgpu_vram_mgr_query_address_block_info(struct amdgpu_vram_mgr *mgr,
90		uint64_t address, struct amdgpu_vram_block_info *info);
91
92#endif