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amdgpu_trace.h
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linux-6.19.14/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
1/* 2 * Copyright 2017 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24#if !defined(_AMDGPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) 25#define _AMDGPU_TRACE_H_ 26 27#include <linux/stringify.h> 28#include <linux/types.h> 29#include <linux/tracepoint.h> 30 31#undef TRACE_SYSTEM 32#define TRACE_SYSTEM amdgpu 33#define TRACE_INCLUDE_FILE amdgpu_trace 34 35#define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ 36 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished) 37 38TRACE_EVENT(amdgpu_device_rreg, 39 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 40 TP_ARGS(did, reg, value), 41 TP_STRUCT__entry( 42 __field(unsigned, did) 43 __field(uint32_t, reg) 44 __field(uint32_t, value) 45 ), 46 TP_fast_assign( 47 __entry->did = did; 48 __entry->reg = reg; 49 __entry->value = value; 50 ), 51 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 52 (unsigned long)__entry->did, 53 (unsigned long)__entry->reg, 54 (unsigned long)__entry->value) 55); 56 57TRACE_EVENT(amdgpu_device_wreg, 58 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 59 TP_ARGS(did, reg, value), 60 TP_STRUCT__entry( 61 __field(unsigned, did) 62 __field(uint32_t, reg) 63 __field(uint32_t, value) 64 ), 65 TP_fast_assign( 66 __entry->did = did; 67 __entry->reg = reg; 68 __entry->value = value; 69 ), 70 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 71 (unsigned long)__entry->did, 72 (unsigned long)__entry->reg, 73 (unsigned long)__entry->value) 74); 75 76TRACE_EVENT(amdgpu_iv, 77 TP_PROTO(unsigned ih, struct amdgpu_iv_entry *iv), 78 TP_ARGS(ih, iv), 79 TP_STRUCT__entry( 80 __field(unsigned, ih) 81 __field(unsigned, client_id) 82 __field(unsigned, src_id) 83 __field(unsigned, ring_id) 84 __field(unsigned, vmid) 85 __field(unsigned, vmid_src) 86 __field(uint64_t, timestamp) 87 __field(unsigned, timestamp_src) 88 __field(unsigned, pasid) 89 __array(unsigned, src_data, 4) 90 ), 91 TP_fast_assign( 92 __entry->ih = ih; 93 __entry->client_id = iv->client_id; 94 __entry->src_id = iv->src_id; 95 __entry->ring_id = iv->ring_id; 96 __entry->vmid = iv->vmid; 97 __entry->vmid_src = iv->vmid_src; 98 __entry->timestamp = iv->timestamp; 99 __entry->timestamp_src = iv->timestamp_src; 100 __entry->pasid = iv->pasid; 101 __entry->src_data[0] = iv->src_data[0]; 102 __entry->src_data[1] = iv->src_data[1]; 103 __entry->src_data[2] = iv->src_data[2]; 104 __entry->src_data[3] = iv->src_data[3]; 105 ), 106 TP_printk("ih:%u client_id:%u src_id:%u ring:%u vmid:%u " 107 "timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x", 108 __entry->ih, __entry->client_id, __entry->src_id, 109 __entry->ring_id, __entry->vmid, 110 __entry->timestamp, __entry->pasid, 111 __entry->src_data[0], __entry->src_data[1], 112 __entry->src_data[2], __entry->src_data[3]) 113); 114 115 116TRACE_EVENT(amdgpu_bo_create, 117 TP_PROTO(struct amdgpu_bo *bo), 118 TP_ARGS(bo), 119 TP_STRUCT__entry( 120 __field(struct amdgpu_bo *, bo) 121 __field(u32, pages) 122 __field(u32, type) 123 __field(u32, prefer) 124 __field(u32, allow) 125 __field(u32, visible) 126 ), 127 128 TP_fast_assign( 129 __entry->bo = bo; 130 __entry->pages = PFN_UP(bo->tbo.resource->size); 131 __entry->type = bo->tbo.resource->mem_type; 132 __entry->prefer = bo->preferred_domains; 133 __entry->allow = bo->allowed_domains; 134 __entry->visible = bo->flags; 135 ), 136 137 TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d", 138 __entry->bo, __entry->pages, __entry->type, 139 __entry->prefer, __entry->allow, __entry->visible) 140); 141 142TRACE_EVENT(amdgpu_cs, 143 TP_PROTO(struct amdgpu_cs_parser *p, 144 struct amdgpu_job *job, 145 struct amdgpu_ib *ib), 146 TP_ARGS(p, job, ib), 147 TP_STRUCT__entry( 148 __field(struct amdgpu_bo_list *, bo_list) 149 __field(u32, ring) 150 __field(u32, dw) 151 __field(u32, fences) 152 ), 153 154 TP_fast_assign( 155 __entry->bo_list = p->bo_list; 156 __entry->ring = to_amdgpu_ring(job->base.entity->rq->sched)->idx; 157 __entry->dw = ib->length_dw; 158 __entry->fences = amdgpu_fence_count_emitted( 159 to_amdgpu_ring(job->base.entity->rq->sched)); 160 ), 161 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u", 162 __entry->bo_list, __entry->ring, __entry->dw, 163 __entry->fences) 164); 165 166TRACE_EVENT(amdgpu_cs_ioctl, 167 TP_PROTO(struct amdgpu_job *job), 168 TP_ARGS(job), 169 TP_STRUCT__entry( 170 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 171 __field(u64, context) 172 __field(u64, seqno) 173 __field(struct dma_fence *, fence) 174 __string(ring, to_amdgpu_ring(job->base.sched)->name) 175 __field(u32, num_ibs) 176 ), 177 178 TP_fast_assign( 179 __assign_str(timeline); 180 __entry->context = job->base.s_fence->finished.context; 181 __entry->seqno = job->base.s_fence->finished.seqno; 182 __assign_str(ring); 183 __entry->num_ibs = job->num_ibs; 184 ), 185 TP_printk("timeline=%s, fence=%llu:%llu, ring_name=%s, num_ibs=%u", 186 __get_str(timeline), __entry->context, 187 __entry->seqno, __get_str(ring), __entry->num_ibs) 188); 189 190TRACE_EVENT(amdgpu_sched_run_job, 191 TP_PROTO(struct amdgpu_job *job), 192 TP_ARGS(job), 193 TP_STRUCT__entry( 194 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 195 __field(u64, context) 196 __field(u64, seqno) 197 __string(ring, to_amdgpu_ring(job->base.sched)->name) 198 __field(u32, num_ibs) 199 ), 200 201 TP_fast_assign( 202 __assign_str(timeline); 203 __entry->context = job->base.s_fence->finished.context; 204 __entry->seqno = job->base.s_fence->finished.seqno; 205 __assign_str(ring); 206 __entry->num_ibs = job->num_ibs; 207 ), 208 TP_printk("timeline=%s, fence=%llu:%llu, ring_name=%s, num_ibs=%u", 209 __get_str(timeline), __entry->context, 210 __entry->seqno, __get_str(ring), __entry->num_ibs) 211); 212 213 214TRACE_EVENT(amdgpu_vm_grab_id, 215 TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring, 216 struct amdgpu_job *job), 217 TP_ARGS(vm, ring, job), 218 TP_STRUCT__entry( 219 __field(u32, pasid) 220 __string(ring, ring->name) 221 __field(u32, ring) 222 __field(u32, vmid) 223 __field(u32, vm_hub) 224 __field(u64, pd_addr) 225 __field(u32, needs_flush) 226 ), 227 228 TP_fast_assign( 229 __entry->pasid = vm->pasid; 230 __assign_str(ring); 231 __entry->vmid = job->vmid; 232 __entry->vm_hub = ring->vm_hub, 233 __entry->pd_addr = job->vm_pd_addr; 234 __entry->needs_flush = job->vm_needs_flush; 235 ), 236 TP_printk("pasid=%d, ring=%s, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u", 237 __entry->pasid, __get_str(ring), __entry->vmid, 238 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush) 239); 240 241TRACE_EVENT(amdgpu_vm_bo_map, 242 TP_PROTO(struct amdgpu_bo_va *bo_va, 243 struct amdgpu_bo_va_mapping *mapping), 244 TP_ARGS(bo_va, mapping), 245 TP_STRUCT__entry( 246 __field(struct amdgpu_bo *, bo) 247 __field(long, start) 248 __field(long, last) 249 __field(u64, offset) 250 __field(u64, flags) 251 ), 252 253 TP_fast_assign( 254 __entry->bo = bo_va ? bo_va->base.bo : NULL; 255 __entry->start = mapping->start; 256 __entry->last = mapping->last; 257 __entry->offset = mapping->offset; 258 __entry->flags = mapping->flags; 259 ), 260 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 261 __entry->bo, __entry->start, __entry->last, 262 __entry->offset, __entry->flags) 263); 264 265TRACE_EVENT(amdgpu_vm_bo_unmap, 266 TP_PROTO(struct amdgpu_bo_va *bo_va, 267 struct amdgpu_bo_va_mapping *mapping), 268 TP_ARGS(bo_va, mapping), 269 TP_STRUCT__entry( 270 __field(struct amdgpu_bo *, bo) 271 __field(long, start) 272 __field(long, last) 273 __field(u64, offset) 274 __field(u64, flags) 275 ), 276 277 TP_fast_assign( 278 __entry->bo = bo_va ? bo_va->base.bo : NULL; 279 __entry->start = mapping->start; 280 __entry->last = mapping->last; 281 __entry->offset = mapping->offset; 282 __entry->flags = mapping->flags; 283 ), 284 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 285 __entry->bo, __entry->start, __entry->last, 286 __entry->offset, __entry->flags) 287); 288 289DECLARE_EVENT_CLASS(amdgpu_vm_mapping, 290 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 291 TP_ARGS(mapping), 292 TP_STRUCT__entry( 293 __field(u64, soffset) 294 __field(u64, eoffset) 295 __field(u64, flags) 296 ), 297 298 TP_fast_assign( 299 __entry->soffset = mapping->start; 300 __entry->eoffset = mapping->last + 1; 301 __entry->flags = mapping->flags; 302 ), 303 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx", 304 __entry->soffset, __entry->eoffset, __entry->flags) 305); 306 307DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update, 308 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 309 TP_ARGS(mapping) 310); 311 312DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping, 313 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 314 TP_ARGS(mapping) 315); 316 317DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_cs, 318 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 319 TP_ARGS(mapping) 320); 321 322TRACE_EVENT(amdgpu_vm_update_ptes, 323 TP_PROTO(struct amdgpu_vm_update_params *p, 324 uint64_t start, uint64_t end, 325 unsigned int nptes, uint64_t dst, 326 uint64_t incr, uint64_t flags, 327 pid_t pid, uint64_t vm_ctx), 328 TP_ARGS(p, start, end, nptes, dst, incr, flags, pid, vm_ctx), 329 TP_STRUCT__entry( 330 __field(u64, start) 331 __field(u64, end) 332 __field(u64, flags) 333 __field(unsigned int, nptes) 334 __field(u64, incr) 335 __field(pid_t, pid) 336 __field(u64, vm_ctx) 337 __dynamic_array(u64, dst, nptes) 338 ), 339 340 TP_fast_assign( 341 unsigned int i; 342 343 __entry->start = start; 344 __entry->end = end; 345 __entry->flags = flags; 346 __entry->incr = incr; 347 __entry->nptes = nptes; 348 __entry->pid = pid; 349 __entry->vm_ctx = vm_ctx; 350 for (i = 0; i < nptes; ++i) { 351 u64 addr = p->pages_addr ? amdgpu_vm_map_gart( 352 p->pages_addr, dst) : dst; 353 354 ((u64 *)__get_dynamic_array(dst))[i] = addr; 355 dst += incr; 356 } 357 ), 358 TP_printk("pid:%u vm_ctx:0x%llx start:0x%010llx end:0x%010llx," 359 " flags:0x%llx, incr:%llu, dst:\n%s", __entry->pid, 360 __entry->vm_ctx, __entry->start, __entry->end, 361 __entry->flags, __entry->incr, __print_array( 362 __get_dynamic_array(dst), __entry->nptes, 8)) 363); 364 365TRACE_EVENT(amdgpu_vm_set_ptes, 366 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, 367 uint32_t incr, uint64_t flags, bool immediate), 368 TP_ARGS(pe, addr, count, incr, flags, immediate), 369 TP_STRUCT__entry( 370 __field(u64, pe) 371 __field(u64, addr) 372 __field(u32, count) 373 __field(u32, incr) 374 __field(u64, flags) 375 __field(bool, immediate) 376 ), 377 378 TP_fast_assign( 379 __entry->pe = pe; 380 __entry->addr = addr; 381 __entry->count = count; 382 __entry->incr = incr; 383 __entry->flags = flags; 384 __entry->immediate = immediate; 385 ), 386 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u, " 387 "immediate=%d", __entry->pe, __entry->addr, __entry->incr, 388 __entry->flags, __entry->count, __entry->immediate) 389); 390 391TRACE_EVENT(amdgpu_vm_copy_ptes, 392 TP_PROTO(uint64_t pe, uint64_t src, unsigned count, bool immediate), 393 TP_ARGS(pe, src, count, immediate), 394 TP_STRUCT__entry( 395 __field(u64, pe) 396 __field(u64, src) 397 __field(u32, count) 398 __field(bool, immediate) 399 ), 400 401 TP_fast_assign( 402 __entry->pe = pe; 403 __entry->src = src; 404 __entry->count = count; 405 __entry->immediate = immediate; 406 ), 407 TP_printk("pe=%010Lx, src=%010Lx, count=%u, immediate=%d", 408 __entry->pe, __entry->src, __entry->count, 409 __entry->immediate) 410); 411 412TRACE_EVENT(amdgpu_vm_flush, 413 TP_PROTO(struct amdgpu_ring *ring, unsigned vmid, 414 uint64_t pd_addr), 415 TP_ARGS(ring, vmid, pd_addr), 416 TP_STRUCT__entry( 417 __string(ring, ring->name) 418 __field(u32, vmid) 419 __field(u32, vm_hub) 420 __field(u64, pd_addr) 421 ), 422 423 TP_fast_assign( 424 __assign_str(ring); 425 __entry->vmid = vmid; 426 __entry->vm_hub = ring->vm_hub; 427 __entry->pd_addr = pd_addr; 428 ), 429 TP_printk("ring=%s, id=%u, hub=%u, pd_addr=%010Lx", 430 __get_str(ring), __entry->vmid, 431 __entry->vm_hub, __entry->pd_addr) 432); 433 434DECLARE_EVENT_CLASS(amdgpu_pasid, 435 TP_PROTO(unsigned pasid), 436 TP_ARGS(pasid), 437 TP_STRUCT__entry( 438 __field(unsigned, pasid) 439 ), 440 TP_fast_assign( 441 __entry->pasid = pasid; 442 ), 443 TP_printk("pasid=%u", __entry->pasid) 444); 445 446DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated, 447 TP_PROTO(unsigned pasid), 448 TP_ARGS(pasid) 449); 450 451DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed, 452 TP_PROTO(unsigned pasid), 453 TP_ARGS(pasid) 454); 455 456TRACE_EVENT(amdgpu_isolation, 457 TP_PROTO(void *prev, void *next), 458 TP_ARGS(prev, next), 459 TP_STRUCT__entry( 460 __field(void *, prev) 461 __field(void *, next) 462 ), 463 464 TP_fast_assign( 465 __entry->prev = prev; 466 __entry->next = next; 467 ), 468 TP_printk("prev=%p, next=%p", 469 __entry->prev, 470 __entry->next) 471); 472 473TRACE_EVENT(amdgpu_cleaner_shader, 474 TP_PROTO(struct amdgpu_ring *ring, struct dma_fence *fence), 475 TP_ARGS(ring, fence), 476 TP_STRUCT__entry( 477 __string(ring, ring->name) 478 __field(u64, seqno) 479 ), 480 481 TP_fast_assign( 482 __assign_str(ring); 483 __entry->seqno = fence->seqno; 484 ), 485 TP_printk("ring=%s, seqno=%Lu", __get_str(ring), __entry->seqno) 486); 487 488TRACE_EVENT(amdgpu_bo_list_set, 489 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo), 490 TP_ARGS(list, bo), 491 TP_STRUCT__entry( 492 __field(struct amdgpu_bo_list *, list) 493 __field(struct amdgpu_bo *, bo) 494 __field(u64, bo_size) 495 ), 496 497 TP_fast_assign( 498 __entry->list = list; 499 __entry->bo = bo; 500 __entry->bo_size = amdgpu_bo_size(bo); 501 ), 502 TP_printk("list=%p, bo=%p, bo_size=%Ld", 503 __entry->list, 504 __entry->bo, 505 __entry->bo_size) 506); 507 508TRACE_EVENT(amdgpu_cs_bo_status, 509 TP_PROTO(uint64_t total_bo, uint64_t total_size), 510 TP_ARGS(total_bo, total_size), 511 TP_STRUCT__entry( 512 __field(u64, total_bo) 513 __field(u64, total_size) 514 ), 515 516 TP_fast_assign( 517 __entry->total_bo = total_bo; 518 __entry->total_size = total_size; 519 ), 520 TP_printk("total_bo_size=%Ld, total_bo_count=%Ld", 521 __entry->total_bo, __entry->total_size) 522); 523 524TRACE_EVENT(amdgpu_bo_move, 525 TP_PROTO(struct amdgpu_bo *bo, uint32_t new_placement, uint32_t old_placement), 526 TP_ARGS(bo, new_placement, old_placement), 527 TP_STRUCT__entry( 528 __field(struct amdgpu_bo *, bo) 529 __field(u64, bo_size) 530 __field(u32, new_placement) 531 __field(u32, old_placement) 532 ), 533 534 TP_fast_assign( 535 __entry->bo = bo; 536 __entry->bo_size = amdgpu_bo_size(bo); 537 __entry->new_placement = new_placement; 538 __entry->old_placement = old_placement; 539 ), 540 TP_printk("bo=%p, from=%d, to=%d, size=%Ld", 541 __entry->bo, __entry->old_placement, 542 __entry->new_placement, __entry->bo_size) 543); 544 545TRACE_EVENT(amdgpu_ib_pipe_sync, 546 TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence), 547 TP_ARGS(sched_job, fence), 548 TP_STRUCT__entry( 549 __string(ring, sched_job->base.sched->name) 550 __field(struct dma_fence *, fence) 551 __field(u64, ctx) 552 __field(u64, seqno) 553 ), 554 555 TP_fast_assign( 556 __assign_str(ring); 557 __entry->fence = fence; 558 __entry->ctx = fence->context; 559 __entry->seqno = fence->seqno; 560 ), 561 TP_printk("job ring=%s need pipe sync to fence=%llu:%llu", 562 __get_str(ring), __entry->ctx, __entry->seqno) 563); 564 565TRACE_EVENT(amdgpu_reset_reg_dumps, 566 TP_PROTO(uint32_t address, uint32_t value), 567 TP_ARGS(address, value), 568 TP_STRUCT__entry( 569 __field(uint32_t, address) 570 __field(uint32_t, value) 571 ), 572 TP_fast_assign( 573 __entry->address = address; 574 __entry->value = value; 575 ), 576 TP_printk("amdgpu register dump 0x%x: 0x%x", 577 __entry->address, 578 __entry->value) 579); 580 581#undef AMDGPU_JOB_GET_TIMELINE_NAME 582#endif 583 584/* This part must be outside protection */ 585#undef TRACE_INCLUDE_PATH 586#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu 587#include <trace/define_trace.h>
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