amdgpu_bo_list.c

  1/*
  2 * Copyright 2015 Advanced Micro Devices, Inc.
  3 * All Rights Reserved.
  4 *
  5 * Permission is hereby granted, free of charge, to any person obtaining a
  6 * copy of this software and associated documentation files (the
  7 * "Software"), to deal in the Software without restriction, including
  8 * without limitation the rights to use, copy, modify, merge, publish,
  9 * distribute, sub license, and/or sell copies of the Software, and to
 10 * permit persons to whom the Software is furnished to do so, subject to
 11 * the following conditions:
 12 *
 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 20 *
 21 * The above copyright notice and this permission notice (including the
 22 * next paragraph) shall be included in all copies or substantial portions
 23 * of the Software.
 24 *
 25 */
 26/*
 27 * Authors:
 28 *    Christian König <deathsimple@vodafone.de>
 29 */
 30
 31#include <linux/sort.h>
 32#include <linux/uaccess.h>
 33
 34#include "amdgpu.h"
 35#include "amdgpu_trace.h"
 36
 37#define AMDGPU_BO_LIST_MAX_PRIORITY	32u
 38#define AMDGPU_BO_LIST_NUM_BUCKETS	(AMDGPU_BO_LIST_MAX_PRIORITY + 1)
 39#define AMDGPU_BO_LIST_MAX_ENTRIES	(128 * 1024)
 40
 41static void amdgpu_bo_list_free_rcu(struct rcu_head *rcu)
 42{
 43	struct amdgpu_bo_list *list = container_of(rcu, struct amdgpu_bo_list,
 44						   rhead);
 45	mutex_destroy(&list->bo_list_mutex);
 46	kvfree(list);
 47}
 48
 49static void amdgpu_bo_list_free(struct kref *ref)
 50{
 51	struct amdgpu_bo_list *list = container_of(ref, struct amdgpu_bo_list,
 52						   refcount);
 53	struct amdgpu_bo_list_entry *e;
 54
 55	amdgpu_bo_list_for_each_entry(e, list)
 56		amdgpu_bo_unref(&e->bo);
 57	call_rcu(&list->rhead, amdgpu_bo_list_free_rcu);
 58}
 59
 60static int amdgpu_bo_list_entry_cmp(const void *_a, const void *_b)
 61{
 62	const struct amdgpu_bo_list_entry *a = _a, *b = _b;
 63
 64	if (a->priority > b->priority)
 65		return 1;
 66	if (a->priority < b->priority)
 67		return -1;
 68	return 0;
 69}
 70
 71int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp,
 72			  struct drm_amdgpu_bo_list_entry *info,
 73			  size_t num_entries, struct amdgpu_bo_list **result)
 74{
 75	unsigned last_entry = 0, first_userptr = num_entries;
 76	struct amdgpu_bo_list_entry *array;
 77	struct amdgpu_bo_list *list;
 78	uint64_t total_size = 0;
 79	unsigned i;
 80	int r;
 81
 82	list = kvzalloc(struct_size(list, entries, num_entries), GFP_KERNEL);
 83	if (!list)
 84		return -ENOMEM;
 85
 86	kref_init(&list->refcount);
 87
 88	list->num_entries = num_entries;
 89	array = list->entries;
 90
 91	for (i = 0; i < num_entries; ++i) {
 92		struct amdgpu_bo_list_entry *entry;
 93		struct drm_gem_object *gobj;
 94		struct amdgpu_bo *bo;
 95		struct mm_struct *usermm;
 96
 97		gobj = drm_gem_object_lookup(filp, info[i].bo_handle);
 98		if (!gobj) {
 99			r = -ENOENT;
100			goto error_free;
101		}
102
103		bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
104		drm_gem_object_put(gobj);
105
106		usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm);
107		if (usermm) {
108			if (usermm != current->mm) {
109				amdgpu_bo_unref(&bo);
110				r = -EPERM;
111				goto error_free;
112			}
113			entry = &array[--first_userptr];
114		} else {
115			entry = &array[last_entry++];
116		}
117
118		entry->priority = min(info[i].bo_priority,
119				      AMDGPU_BO_LIST_MAX_PRIORITY);
120		entry->bo = bo;
121
122		if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GDS)
123			list->gds_obj = bo;
124		if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GWS)
125			list->gws_obj = bo;
126		if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_OA)
127			list->oa_obj = bo;
128
129		total_size += amdgpu_bo_size(bo);
130		trace_amdgpu_bo_list_set(list, bo);
131	}
132
133	list->first_userptr = first_userptr;
134	sort(array, last_entry, sizeof(struct amdgpu_bo_list_entry),
135	     amdgpu_bo_list_entry_cmp, NULL);
136
137	trace_amdgpu_cs_bo_status(list->num_entries, total_size);
138
139	mutex_init(&list->bo_list_mutex);
140	*result = list;
141	return 0;
142
143error_free:
144	for (i = 0; i < last_entry; ++i)
145		amdgpu_bo_unref(&array[i].bo);
146	for (i = first_userptr; i < num_entries; ++i)
147		amdgpu_bo_unref(&array[i].bo);
148	kvfree(list);
149	return r;
150
151}
152
153static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
154{
155	struct amdgpu_bo_list *list;
156
157	mutex_lock(&fpriv->bo_list_lock);
158	list = idr_remove(&fpriv->bo_list_handles, id);
159	mutex_unlock(&fpriv->bo_list_lock);
160	if (list)
161		kref_put(&list->refcount, amdgpu_bo_list_free);
162}
163
164int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
165		       struct amdgpu_bo_list **result)
166{
167	rcu_read_lock();
168	*result = idr_find(&fpriv->bo_list_handles, id);
169
170	if (*result && kref_get_unless_zero(&(*result)->refcount)) {
171		rcu_read_unlock();
172		return 0;
173	}
174
175	rcu_read_unlock();
176	*result = NULL;
177	return -ENOENT;
178}
179
180void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
181{
182	kref_put(&list->refcount, amdgpu_bo_list_free);
183}
184
185int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
186				      struct drm_amdgpu_bo_list_entry **info_param)
187{
188	const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
189	const void __user *uptr = u64_to_user_ptr(in->bo_info_ptr);
190	const uint32_t bo_info_size = in->bo_info_size;
191	const uint32_t bo_number = in->bo_number;
192	struct drm_amdgpu_bo_list_entry *info;
193
194	if (bo_number > AMDGPU_BO_LIST_MAX_ENTRIES)
195		return -EINVAL;
196
197	/* copy the handle array from userspace to a kernel buffer */
198	if (likely(info_size == bo_info_size)) {
199		info = vmemdup_array_user(uptr, bo_number, info_size);
200		if (IS_ERR(info))
201			return PTR_ERR(info);
202	} else {
203		const uint32_t bytes = min(bo_info_size, info_size);
204		unsigned i;
205
206		info = kvmalloc_array(bo_number, info_size, GFP_KERNEL);
207		if (!info)
208			return -ENOMEM;
209
210		memset(info, 0, bo_number * info_size);
211		for (i = 0; i < bo_number; ++i, uptr += bo_info_size) {
212			if (copy_from_user(&info[i], uptr, bytes)) {
213				kvfree(info);
214				return -EFAULT;
215			}
216		}
217	}
218
219	*info_param = info;
220	return 0;
221}
222
223int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
224				struct drm_file *filp)
225{
226	struct amdgpu_device *adev = drm_to_adev(dev);
227	struct amdgpu_fpriv *fpriv = filp->driver_priv;
228	union drm_amdgpu_bo_list *args = data;
229	uint32_t handle = args->in.list_handle;
230	struct drm_amdgpu_bo_list_entry *info = NULL;
231	struct amdgpu_bo_list *list, *old;
232	int r;
233
234	r = amdgpu_bo_create_list_entry_array(&args->in, &info);
235	if (r)
236		return r;
237
238	switch (args->in.operation) {
239	case AMDGPU_BO_LIST_OP_CREATE:
240		r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
241					  &list);
242		if (r)
243			goto error_free;
244
245		mutex_lock(&fpriv->bo_list_lock);
246		r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL);
247		mutex_unlock(&fpriv->bo_list_lock);
248		if (r < 0) {
249			goto error_put_list;
250		}
251
252		handle = r;
253		break;
254
255	case AMDGPU_BO_LIST_OP_DESTROY:
256		amdgpu_bo_list_destroy(fpriv, handle);
257		handle = 0;
258		break;
259
260	case AMDGPU_BO_LIST_OP_UPDATE:
261		r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
262					  &list);
263		if (r)
264			goto error_free;
265
266		mutex_lock(&fpriv->bo_list_lock);
267		old = idr_replace(&fpriv->bo_list_handles, list, handle);
268		mutex_unlock(&fpriv->bo_list_lock);
269
270		if (IS_ERR(old)) {
271			r = PTR_ERR(old);
272			goto error_put_list;
273		}
274
275		amdgpu_bo_list_put(old);
276		break;
277
278	default:
279		r = -EINVAL;
280		goto error_free;
281	}
282
283	memset(args, 0, sizeof(*args));
284	args->out.list_handle = handle;
285	kvfree(info);
286
287	return 0;
288
289error_put_list:
290	amdgpu_bo_list_put(list);
291
292error_free:
293	kvfree(info);
294	return r;
295}