amdgpu_amdkfd.h

  1/*
  2 * Copyright 2014 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 */
 22
 23/* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */
 24
 25#ifndef AMDGPU_AMDKFD_H_INCLUDED
 26#define AMDGPU_AMDKFD_H_INCLUDED
 27
 28#include <linux/list.h>
 29#include <linux/types.h>
 30#include <linux/mm.h>
 31#include <linux/kthread.h>
 32#include <linux/workqueue.h>
 33#include <linux/mmu_notifier.h>
 34#include <linux/memremap.h>
 35#include <kgd_kfd_interface.h>
 36#include <drm/drm_client.h>
 37#include "amdgpu_sync.h"
 38#include "amdgpu_vm.h"
 39#include "amdgpu_xcp.h"
 40
 41extern uint64_t amdgpu_amdkfd_total_mem_size;
 42
 43enum TLB_FLUSH_TYPE {
 44	TLB_FLUSH_LEGACY = 0,
 45	TLB_FLUSH_LIGHTWEIGHT,
 46	TLB_FLUSH_HEAVYWEIGHT
 47};
 48
 49struct amdgpu_device;
 50struct kfd_process_device;
 51struct amdgpu_reset_context;
 52
 53enum kfd_mem_attachment_type {
 54	KFD_MEM_ATT_SHARED,	/* Share kgd_mem->bo or another attachment's */
 55	KFD_MEM_ATT_USERPTR,	/* SG bo to DMA map pages from a userptr bo */
 56	KFD_MEM_ATT_DMABUF,	/* DMAbuf to DMA map TTM BOs */
 57	KFD_MEM_ATT_SG		/* Tag to DMA map SG BOs */
 58};
 59
 60struct kfd_mem_attachment {
 61	struct list_head list;
 62	enum kfd_mem_attachment_type type;
 63	bool is_mapped;
 64	struct amdgpu_bo_va *bo_va;
 65	struct amdgpu_device *adev;
 66	uint64_t va;
 67	uint64_t pte_flags;
 68};
 69
 70struct kgd_mem {
 71	struct mutex lock;
 72	struct amdgpu_bo *bo;
 73	struct dma_buf *dmabuf;
 74	struct amdgpu_hmm_range *range;
 75	struct list_head attachments;
 76	/* protected by amdkfd_process_info.lock */
 77	struct list_head validate_list;
 78	uint32_t domain;
 79	unsigned int mapped_to_gpu_memory;
 80	uint64_t va;
 81
 82	uint32_t alloc_flags;
 83
 84	uint32_t invalid;
 85	struct amdkfd_process_info *process_info;
 86
 87	struct amdgpu_sync sync;
 88
 89	uint32_t gem_handle;
 90	bool aql_queue;
 91	bool is_imported;
 92};
 93
 94/* KFD Memory Eviction */
 95struct amdgpu_amdkfd_fence {
 96	struct dma_fence base;
 97	struct mm_struct *mm;
 98	spinlock_t lock;
 99	char timeline_name[TASK_COMM_LEN];
100	struct svm_range_bo *svm_bo;
101};
102
103struct amdgpu_kfd_dev {
104	struct kfd_dev *dev;
105	int64_t vram_used[MAX_XCP];
106	uint64_t vram_used_aligned[MAX_XCP];
107	bool init_complete;
108	struct work_struct reset_work;
109
110	/* Client for KFD BO GEM handle allocations */
111	struct drm_client_dev client;
112
113	/* HMM page migration MEMORY_DEVICE_PRIVATE mapping
114	 * Must be last --ends in a flexible-array member.
115	 */
116	struct dev_pagemap pgmap;
117};
118
119enum kgd_engine_type {
120	KGD_ENGINE_PFP = 1,
121	KGD_ENGINE_ME,
122	KGD_ENGINE_CE,
123	KGD_ENGINE_MEC1,
124	KGD_ENGINE_MEC2,
125	KGD_ENGINE_RLC,
126	KGD_ENGINE_SDMA1,
127	KGD_ENGINE_SDMA2,
128	KGD_ENGINE_MAX
129};
130
131
132struct amdkfd_process_info {
133	/* List head of all VMs that belong to a KFD process */
134	struct list_head vm_list_head;
135	/* List head for all KFD BOs that belong to a KFD process. */
136	struct list_head kfd_bo_list;
137	/* List of userptr BOs that are valid or invalid */
138	struct list_head userptr_valid_list;
139	struct list_head userptr_inval_list;
140	/* Lock to protect kfd_bo_list */
141	struct mutex lock;
142
143	/* Number of VMs */
144	unsigned int n_vms;
145	/* Eviction Fence */
146	struct amdgpu_amdkfd_fence *eviction_fence;
147
148	/* MMU-notifier related fields */
149	struct mutex notifier_lock;
150	uint32_t evicted_bos;
151	struct delayed_work restore_userptr_work;
152	struct pid *pid;
153	bool block_mmu_notifications;
154};
155
156int amdgpu_amdkfd_init(void);
157void amdgpu_amdkfd_fini(void);
158
159void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc);
160int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc);
161void amdgpu_amdkfd_suspend_process(struct amdgpu_device *adev);
162int amdgpu_amdkfd_resume_process(struct amdgpu_device *adev);
163void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
164			const void *ih_ring_entry);
165void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
166void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
167void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev);
168int amdgpu_amdkfd_check_and_lock_kfd(struct amdgpu_device *adev);
169void amdgpu_amdkfd_unlock_kfd(struct amdgpu_device *adev);
170int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
171				enum kgd_engine_type engine,
172				uint32_t vmid, uint64_t gpu_addr,
173				uint32_t *ib_cmd, uint32_t ib_len);
174void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle);
175bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev);
176
177bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
178
179int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev,
180			    struct amdgpu_reset_context *reset_context);
181
182int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
183
184void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev);
185
186int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
187					int queue_bit);
188
189struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
190				struct mm_struct *mm,
191				struct svm_range_bo *svm_bo);
192
193int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev);
194#if defined(CONFIG_DEBUG_FS)
195int kfd_debugfs_kfd_mem_limits(struct seq_file *m, void *data);
196#endif
197#if IS_ENABLED(CONFIG_HSA_AMD)
198bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
199struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
200void amdgpu_amdkfd_remove_all_eviction_fences(struct amdgpu_bo *bo);
201int amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier *mni,
202				unsigned long cur_seq, struct kgd_mem *mem);
203int amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo *bo,
204					uint32_t domain,
205					struct dma_fence *fence);
206#else
207static inline
208bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
209{
210	return false;
211}
212
213static inline
214struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f)
215{
216	return NULL;
217}
218
219static inline
220void amdgpu_amdkfd_remove_all_eviction_fences(struct amdgpu_bo *bo)
221{
222}
223
224static inline
225int amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier *mni,
226				unsigned long cur_seq, struct kgd_mem *mem)
227{
228	return 0;
229}
230static inline
231int amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo *bo,
232					uint32_t domain,
233					struct dma_fence *fence)
234{
235	return 0;
236}
237#endif
238/* Shared API */
239int amdgpu_amdkfd_alloc_gtt_mem(struct amdgpu_device *adev, size_t size,
240				void **mem_obj, uint64_t *gpu_addr,
241				void **cpu_ptr, bool mqd_gfx9);
242void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void **mem_obj);
243int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,
244				void **mem_obj);
245void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj);
246int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);
247int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem);
248uint32_t amdgpu_amdkfd_get_fw_version(struct amdgpu_device *adev,
249				      enum kgd_engine_type type);
250void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
251				      struct kfd_local_mem_info *mem_info,
252				      struct amdgpu_xcp *xcp);
253uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct amdgpu_device *adev);
254
255uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct amdgpu_device *adev);
256int amdgpu_amdkfd_get_dmabuf_info(struct amdgpu_device *adev, int dma_buf_fd,
257				  struct amdgpu_device **dmabuf_adev,
258				  uint64_t *bo_size, void *metadata_buffer,
259				  size_t buffer_size, uint32_t *metadata_size,
260				  uint32_t *flags, int8_t *xcp_id);
261int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct amdgpu_device *adev, bool is_min);
262int amdgpu_amdkfd_send_close_event_drain_irq(struct amdgpu_device *adev,
263					uint32_t *payload);
264int amdgpu_amdkfd_unmap_hiq(struct amdgpu_device *adev, u32 doorbell_off,
265				u32 inst);
266int amdgpu_amdkfd_start_sched(struct amdgpu_device *adev, uint32_t node_id);
267int amdgpu_amdkfd_stop_sched(struct amdgpu_device *adev, uint32_t node_id);
268int amdgpu_amdkfd_config_sq_perfmon(struct amdgpu_device *adev, uint32_t xcp_id,
269	bool core_override_enable, bool reg_override_enable, bool perfmon_override_enable);
270bool amdgpu_amdkfd_compute_active(struct amdgpu_device *adev, uint32_t node_id);
271
272
273/* Read user wptr from a specified user address space with page fault
274 * disabled. The memory must be pinned and mapped to the hardware when
275 * this is called in hqd_load functions, so it should never fault in
276 * the first place. This resolves a circular lock dependency involving
277 * four locks, including the DQM lock and mmap_lock.
278 */
279#define read_user_wptr(mmptr, wptr, dst)				\
280	({								\
281		bool valid = false;					\
282		if ((mmptr) && (wptr)) {				\
283			pagefault_disable();				\
284			if ((mmptr) == current->mm) {			\
285				valid = !get_user((dst), (wptr));	\
286			} else if (current->flags & PF_KTHREAD) {	\
287				kthread_use_mm(mmptr);			\
288				valid = !get_user((dst), (wptr));	\
289				kthread_unuse_mm(mmptr);		\
290			}						\
291			pagefault_enable();				\
292		}							\
293		valid;							\
294	})
295
296/* GPUVM API */
297#define drm_priv_to_vm(drm_priv)					\
298	(&((struct amdgpu_fpriv *)					\
299		((struct drm_file *)(drm_priv))->driver_priv)->vm)
300
301int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct amdgpu_device *adev,
302					struct amdgpu_vm *avm,
303					void **process_info,
304					struct dma_fence **ef);
305uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *drm_priv);
306size_t amdgpu_amdkfd_get_available_memory(struct amdgpu_device *adev,
307					uint8_t xcp_id);
308int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
309		struct amdgpu_device *adev, uint64_t va, uint64_t size,
310		void *drm_priv, struct kgd_mem **mem,
311		uint64_t *offset, uint32_t flags, bool criu_resume);
312int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
313		struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv,
314		uint64_t *size);
315int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(struct amdgpu_device *adev,
316					  struct kgd_mem *mem, void *drm_priv);
317int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
318		struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv);
319int amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv);
320int amdgpu_amdkfd_gpuvm_sync_memory(
321		struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);
322int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_mem *mem,
323					     void **kptr, uint64_t *size);
324void amdgpu_amdkfd_gpuvm_unmap_gtt_bo_from_kernel(struct kgd_mem *mem);
325
326int amdgpu_amdkfd_map_gtt_bo_to_gart(struct amdgpu_bo *bo, struct amdgpu_bo **bo_gart);
327
328int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,
329					    struct dma_fence __rcu **ef);
330int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct amdgpu_device *adev,
331					      struct kfd_vm_fault_info *info);
332int amdgpu_amdkfd_gpuvm_import_dmabuf_fd(struct amdgpu_device *adev, int fd,
333					 uint64_t va, void *drm_priv,
334					 struct kgd_mem **mem, uint64_t *size,
335					 uint64_t *mmap_offset);
336int amdgpu_amdkfd_gpuvm_export_dmabuf(struct kgd_mem *mem,
337				      struct dma_buf **dmabuf);
338void amdgpu_amdkfd_debug_mem_fence(struct amdgpu_device *adev);
339int amdgpu_amdkfd_get_tile_config(struct amdgpu_device *adev,
340				struct tile_config *config);
341void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev,
342			enum amdgpu_ras_block block, uint32_t reset);
343
344void amdgpu_amdkfd_ras_pasid_poison_consumption_handler(struct amdgpu_device *adev,
345			enum amdgpu_ras_block block, uint16_t pasid,
346			pasid_notify pasid_fn, void *data, uint32_t reset);
347
348bool amdgpu_amdkfd_is_fed(struct amdgpu_device *adev);
349bool amdgpu_amdkfd_bo_mapped_to_dev(void *drm_priv, struct kgd_mem *mem);
350void amdgpu_amdkfd_block_mmu_notifications(void *p);
351int amdgpu_amdkfd_criu_resume(void *p);
352int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,
353		uint64_t size, u32 alloc_flag, int8_t xcp_id);
354void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,
355		uint64_t size, u32 alloc_flag, int8_t xcp_id);
356
357u64 amdgpu_amdkfd_xcp_memory_size(struct amdgpu_device *adev, int xcp_id);
358
359#define KFD_XCP_MEM_ID(adev, xcp_id) \
360		((adev)->xcp_mgr && (xcp_id) >= 0 ?\
361		(adev)->xcp_mgr->xcp[(xcp_id)].mem_id : -1)
362
363#define KFD_XCP_MEMORY_SIZE(adev, xcp_id) amdgpu_amdkfd_xcp_memory_size((adev), (xcp_id))
364
365
366#if IS_ENABLED(CONFIG_HSA_AMD)
367void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
368void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
369				struct amdgpu_vm *vm);
370
371/**
372 * @amdgpu_amdkfd_release_notify() - Notify KFD when GEM object is released
373 *
374 * Allows KFD to release its resources associated with the GEM object.
375 */
376void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo);
377void amdgpu_amdkfd_reserve_system_mem(uint64_t size);
378#else
379static inline
380void amdgpu_amdkfd_gpuvm_init_mem_limits(void)
381{
382}
383
384static inline
385void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
386					struct amdgpu_vm *vm)
387{
388}
389
390static inline
391void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo)
392{
393}
394#endif
395
396#if IS_ENABLED(CONFIG_HSA_AMD_SVM)
397int kgd2kfd_init_zone_device(struct amdgpu_device *adev);
398#else
399static inline
400int kgd2kfd_init_zone_device(struct amdgpu_device *adev)
401{
402	return 0;
403}
404#endif
405
406/* KGD2KFD callbacks */
407int kgd2kfd_quiesce_mm(struct mm_struct *mm, uint32_t trigger);
408int kgd2kfd_resume_mm(struct mm_struct *mm);
409int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
410						struct dma_fence *fence);
411#if IS_ENABLED(CONFIG_HSA_AMD)
412int kgd2kfd_init(void);
413void kgd2kfd_exit(void);
414struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf);
415bool kgd2kfd_device_init(struct kfd_dev *kfd,
416			 const struct kgd2kfd_shared_resources *gpu_resources);
417void kgd2kfd_device_exit(struct kfd_dev *kfd);
418void kgd2kfd_suspend(struct kfd_dev *kfd, bool suspend_proc);
419int kgd2kfd_resume(struct kfd_dev *kfd, bool resume_proc);
420void kgd2kfd_suspend_process(struct kfd_dev *kfd);
421int kgd2kfd_resume_process(struct kfd_dev *kfd);
422int kgd2kfd_pre_reset(struct kfd_dev *kfd,
423		      struct amdgpu_reset_context *reset_context);
424int kgd2kfd_post_reset(struct kfd_dev *kfd);
425void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
426void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd);
427void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask);
428int kgd2kfd_check_and_lock_kfd(struct kfd_dev *kfd);
429void kgd2kfd_unlock_kfd(struct kfd_dev *kfd);
430int kgd2kfd_start_sched(struct kfd_dev *kfd, uint32_t node_id);
431int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd);
432int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id);
433int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd);
434bool kgd2kfd_compute_active(struct kfd_dev *kfd, uint32_t node_id);
435bool kgd2kfd_vmfault_fast_path(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry,
436			       bool retry_fault);
437
438#else
439static inline int kgd2kfd_init(void)
440{
441	return -ENOENT;
442}
443
444static inline void kgd2kfd_exit(void)
445{
446}
447
448static inline
449struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
450{
451	return NULL;
452}
453
454static inline
455bool kgd2kfd_device_init(struct kfd_dev *kfd,
456				const struct kgd2kfd_shared_resources *gpu_resources)
457{
458	return false;
459}
460
461static inline void kgd2kfd_device_exit(struct kfd_dev *kfd)
462{
463}
464
465static inline void kgd2kfd_suspend(struct kfd_dev *kfd, bool suspend_proc)
466{
467}
468
469static inline int kgd2kfd_resume(struct kfd_dev *kfd, bool resume_proc)
470{
471	return 0;
472}
473
474static inline void kgd2kfd_suspend_process(struct kfd_dev *kfd)
475{
476}
477
478static inline int kgd2kfd_resume_process(struct kfd_dev *kfd)
479{
480	return 0;
481}
482
483static inline int kgd2kfd_pre_reset(struct kfd_dev *kfd,
484				    struct amdgpu_reset_context *reset_context)
485{
486	return 0;
487}
488
489static inline int kgd2kfd_post_reset(struct kfd_dev *kfd)
490{
491	return 0;
492}
493
494static inline
495void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
496{
497}
498
499static inline
500void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd)
501{
502}
503
504static inline
505void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask)
506{
507}
508
509static inline int kgd2kfd_check_and_lock_kfd(struct kfd_dev *kfd)
510{
511	return 0;
512}
513
514static inline void kgd2kfd_unlock_kfd(struct kfd_dev *kfd)
515{
516}
517
518static inline int kgd2kfd_start_sched(struct kfd_dev *kfd, uint32_t node_id)
519{
520	return 0;
521}
522
523static inline int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd)
524{
525	return 0;
526}
527
528static inline int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id)
529{
530	return 0;
531}
532
533static inline int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd)
534{
535	return 0;
536}
537
538static inline bool kgd2kfd_compute_active(struct kfd_dev *kfd, uint32_t node_id)
539{
540	return false;
541}
542
543static inline bool kgd2kfd_vmfault_fast_path(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry,
544				      bool retry_fault)
545{
546	return false;
547}
548
549#endif
550#endif /* AMDGPU_AMDKFD_H_INCLUDED */