gpio-xtensa.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (C) 2013 TangoTec Ltd.
  4 * Author: Baruch Siach <baruch@tkos.co.il>
  5 *
  6 * Driver for the Xtensa LX4 GPIO32 Option
  7 *
  8 * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22
  9 *
 10 * GPIO32 is a standard optional extension to the Xtensa architecture core that
 11 * provides preconfigured output and input ports for intra SoC signaling. The
 12 * GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE)
 13 * output state called EXPSTATE, and 32bit input wire called IMPWIRE. This
 14 * driver treats input and output states as two distinct devices.
 15 *
 16 * Access to GPIO32 specific instructions is controlled by the CPENABLE
 17 * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code
 18 * disables access to all coprocessors. This driver sets the CPENABLE bit
 19 * corresponding to GPIO32 before any GPIO32 specific instruction, and restores
 20 * CPENABLE state after that.
 21 *
 22 * This driver is currently incompatible with SMP. The GPIO32 extension is not
 23 * guaranteed to be available in all cores. Moreover, each core controls a
 24 * different set of IO wires. A theoretical SMP aware version of this driver
 25 * would need to have a per core workqueue to do the actual GPIO manipulation.
 26 */
 27
 28#include <linux/err.h>
 29#include <linux/module.h>
 30#include <linux/gpio/driver.h>
 31#include <linux/bitops.h>
 32#include <linux/platform_device.h>
 33
 34#include <asm/coprocessor.h> /* CPENABLE read/write macros */
 35
 36#ifndef XCHAL_CP_ID_XTIOP
 37#error GPIO32 option is not enabled for your xtensa core variant
 38#endif
 39
 40#if XCHAL_HAVE_CP
 41
 42static inline unsigned long enable_cp(unsigned long *cpenable)
 43{
 44	unsigned long flags;
 45
 46	local_irq_save(flags);
 47	*cpenable = xtensa_get_sr(cpenable);
 48	xtensa_set_sr(*cpenable | BIT(XCHAL_CP_ID_XTIOP), cpenable);
 49	return flags;
 50}
 51
 52static inline void disable_cp(unsigned long flags, unsigned long cpenable)
 53{
 54	xtensa_set_sr(cpenable, cpenable);
 55	local_irq_restore(flags);
 56}
 57
 58#else
 59
 60static inline unsigned long enable_cp(unsigned long *cpenable)
 61{
 62	*cpenable = 0; /* avoid uninitialized value warning */
 63	return 0;
 64}
 65
 66static inline void disable_cp(unsigned long flags, unsigned long cpenable)
 67{
 68}
 69
 70#endif /* XCHAL_HAVE_CP */
 71
 72static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset)
 73{
 74	return GPIO_LINE_DIRECTION_IN; /* input only */
 75}
 76
 77static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset)
 78{
 79	unsigned long flags, saved_cpenable;
 80	u32 impwire;
 81
 82	flags = enable_cp(&saved_cpenable);
 83	__asm__ __volatile__("read_impwire %0" : "=a" (impwire));
 84	disable_cp(flags, saved_cpenable);
 85
 86	return !!(impwire & BIT(offset));
 87}
 88
 89static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset)
 90{
 91	return GPIO_LINE_DIRECTION_OUT; /* output only */
 92}
 93
 94static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset)
 95{
 96	unsigned long flags, saved_cpenable;
 97	u32 expstate;
 98
 99	flags = enable_cp(&saved_cpenable);
100	__asm__ __volatile__("rur.expstate %0" : "=a" (expstate));
101	disable_cp(flags, saved_cpenable);
102
103	return !!(expstate & BIT(offset));
104}
105
106static int xtensa_expstate_set_value(struct gpio_chip *gc, unsigned int offset,
107				     int value)
108{
109	unsigned long flags, saved_cpenable;
110	u32 mask = BIT(offset);
111	u32 val = value ? BIT(offset) : 0;
112
113	flags = enable_cp(&saved_cpenable);
114	__asm__ __volatile__("wrmsk_expstate %0, %1"
115			     :: "a" (val), "a" (mask));
116	disable_cp(flags, saved_cpenable);
117
118	return 0;
119}
120
121static struct gpio_chip impwire_chip = {
122	.label		= "impwire",
123	.base		= -1,
124	.ngpio		= 32,
125	.get_direction	= xtensa_impwire_get_direction,
126	.get		= xtensa_impwire_get_value,
127};
128
129static struct gpio_chip expstate_chip = {
130	.label		= "expstate",
131	.base		= -1,
132	.ngpio		= 32,
133	.get_direction	= xtensa_expstate_get_direction,
134	.get		= xtensa_expstate_get_value,
135	.set		= xtensa_expstate_set_value,
136};
137
138static int xtensa_gpio_probe(struct platform_device *pdev)
139{
140	int ret;
141
142	ret = gpiochip_add_data(&impwire_chip, NULL);
143	if (ret)
144		return ret;
145	return gpiochip_add_data(&expstate_chip, NULL);
146}
147
148static struct platform_driver xtensa_gpio_driver = {
149	.driver		= {
150		.name		= "xtensa-gpio",
151	},
152	.probe		= xtensa_gpio_probe,
153};
154
155static int __init xtensa_gpio_init(void)
156{
157	struct platform_device *pdev;
158
159	pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0);
160	if (IS_ERR(pdev))
161		return PTR_ERR(pdev);
162
163	return platform_driver_register(&xtensa_gpio_driver);
164}
165device_initcall(xtensa_gpio_init);
166
167MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
168MODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver");
169MODULE_LICENSE("GPL");