gpio-xgene.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * AppliedMicro X-Gene SoC GPIO Driver
  4 *
  5 * Copyright (c) 2014, Applied Micro Circuits Corporation
  6 * Author: Feng Kan <fkan@apm.com>.
  7 */
  8
  9#include <linux/acpi.h>
 10#include <linux/kernel.h>
 11#include <linux/init.h>
 12#include <linux/io.h>
 13#include <linux/spinlock.h>
 14#include <linux/platform_device.h>
 15#include <linux/gpio/driver.h>
 16#include <linux/types.h>
 17#include <linux/bitops.h>
 18
 19#define GPIO_SET_DR_OFFSET	0x0C
 20#define GPIO_DATA_OFFSET	0x14
 21#define GPIO_BANK_STRIDE	0x0C
 22
 23#define XGENE_GPIOS_PER_BANK	16
 24#define XGENE_MAX_GPIO_BANKS	3
 25#define XGENE_MAX_GPIOS		(XGENE_GPIOS_PER_BANK * XGENE_MAX_GPIO_BANKS)
 26
 27#define GPIO_BIT_OFFSET(x)	(x % XGENE_GPIOS_PER_BANK)
 28#define GPIO_BANK_OFFSET(x)	((x / XGENE_GPIOS_PER_BANK) * GPIO_BANK_STRIDE)
 29
 30struct xgene_gpio {
 31	struct gpio_chip	chip;
 32	void __iomem		*base;
 33	spinlock_t		lock;
 34	u32			set_dr_val[XGENE_MAX_GPIO_BANKS];
 35};
 36
 37static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset)
 38{
 39	struct xgene_gpio *chip = gpiochip_get_data(gc);
 40	unsigned long bank_offset;
 41	u32 bit_offset;
 42
 43	bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset);
 44	bit_offset = GPIO_BIT_OFFSET(offset);
 45	return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));
 46}
 47
 48static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
 49{
 50	struct xgene_gpio *chip = gpiochip_get_data(gc);
 51	unsigned long bank_offset;
 52	u32 setval, bit_offset;
 53
 54	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
 55	bit_offset = GPIO_BIT_OFFSET(offset) + XGENE_GPIOS_PER_BANK;
 56
 57	setval = ioread32(chip->base + bank_offset);
 58	if (val)
 59		setval |= BIT(bit_offset);
 60	else
 61		setval &= ~BIT(bit_offset);
 62	iowrite32(setval, chip->base + bank_offset);
 63}
 64
 65static int xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
 66{
 67	struct xgene_gpio *chip = gpiochip_get_data(gc);
 68	unsigned long flags;
 69
 70	spin_lock_irqsave(&chip->lock, flags);
 71	__xgene_gpio_set(gc, offset, val);
 72	spin_unlock_irqrestore(&chip->lock, flags);
 73
 74	return 0;
 75}
 76
 77static int xgene_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
 78{
 79	struct xgene_gpio *chip = gpiochip_get_data(gc);
 80	unsigned long bank_offset, bit_offset;
 81
 82	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
 83	bit_offset = GPIO_BIT_OFFSET(offset);
 84
 85	if (ioread32(chip->base + bank_offset) & BIT(bit_offset))
 86		return GPIO_LINE_DIRECTION_IN;
 87
 88	return GPIO_LINE_DIRECTION_OUT;
 89}
 90
 91static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
 92{
 93	struct xgene_gpio *chip = gpiochip_get_data(gc);
 94	unsigned long flags, bank_offset;
 95	u32 dirval, bit_offset;
 96
 97	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
 98	bit_offset = GPIO_BIT_OFFSET(offset);
 99
100	spin_lock_irqsave(&chip->lock, flags);
101
102	dirval = ioread32(chip->base + bank_offset);
103	dirval |= BIT(bit_offset);
104	iowrite32(dirval, chip->base + bank_offset);
105
106	spin_unlock_irqrestore(&chip->lock, flags);
107
108	return 0;
109}
110
111static int xgene_gpio_dir_out(struct gpio_chip *gc,
112					unsigned int offset, int val)
113{
114	struct xgene_gpio *chip = gpiochip_get_data(gc);
115	unsigned long flags, bank_offset;
116	u32 dirval, bit_offset;
117
118	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
119	bit_offset = GPIO_BIT_OFFSET(offset);
120
121	spin_lock_irqsave(&chip->lock, flags);
122
123	dirval = ioread32(chip->base + bank_offset);
124	dirval &= ~BIT(bit_offset);
125	iowrite32(dirval, chip->base + bank_offset);
126	__xgene_gpio_set(gc, offset, val);
127
128	spin_unlock_irqrestore(&chip->lock, flags);
129
130	return 0;
131}
132
133static int xgene_gpio_suspend(struct device *dev)
134{
135	struct xgene_gpio *gpio = dev_get_drvdata(dev);
136	unsigned long bank_offset;
137	unsigned int bank;
138
139	for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
140		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
141		gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);
142	}
143	return 0;
144}
145
146static int xgene_gpio_resume(struct device *dev)
147{
148	struct xgene_gpio *gpio = dev_get_drvdata(dev);
149	unsigned long bank_offset;
150	unsigned int bank;
151
152	for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
153		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
154		iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset);
155	}
156	return 0;
157}
158
159static DEFINE_SIMPLE_DEV_PM_OPS(xgene_gpio_pm, xgene_gpio_suspend, xgene_gpio_resume);
160
161static int xgene_gpio_probe(struct platform_device *pdev)
162{
163	struct xgene_gpio *gpio;
164
165	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
166	if (!gpio)
167		return -ENOMEM;
168
169	gpio->base = devm_platform_ioremap_resource(pdev, 0);
170	if (IS_ERR(gpio->base))
171		return PTR_ERR(gpio->base);
172
173	gpio->chip.ngpio = XGENE_MAX_GPIOS;
174
175	spin_lock_init(&gpio->lock);
176	gpio->chip.parent = &pdev->dev;
177	gpio->chip.get_direction = xgene_gpio_get_direction;
178	gpio->chip.direction_input = xgene_gpio_dir_in;
179	gpio->chip.direction_output = xgene_gpio_dir_out;
180	gpio->chip.get = xgene_gpio_get;
181	gpio->chip.set = xgene_gpio_set;
182	gpio->chip.label = dev_name(&pdev->dev);
183	gpio->chip.base = -1;
184
185	platform_set_drvdata(pdev, gpio);
186
187	return devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
188}
189
190static const struct of_device_id xgene_gpio_of_match[] = {
191	{ .compatible = "apm,xgene-gpio", },
192	{},
193};
194
195#ifdef CONFIG_ACPI
196static const struct acpi_device_id xgene_gpio_acpi_match[] = {
197	{ "APMC0D14", 0 },
198	{ },
199};
200#endif
201
202static struct platform_driver xgene_gpio_driver = {
203	.driver = {
204		.name = "xgene-gpio",
205		.of_match_table = xgene_gpio_of_match,
206		.acpi_match_table = ACPI_PTR(xgene_gpio_acpi_match),
207		.pm     = pm_sleep_ptr(&xgene_gpio_pm),
208	},
209	.probe = xgene_gpio_probe,
210};
211builtin_platform_driver(xgene_gpio_driver);