gpio-vx855.c

  1// SPDX-License-Identifier: GPL-2.0+
  2/*
  3 * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
  4 *
  5 * Copyright (C) 2009 VIA Technologies, Inc.
  6 * Copyright (C) 2010 One Laptop per Child
  7 * Author: Harald Welte <HaraldWelte@viatech.com>
  8 * All rights reserved.
  9 */
 10#include <linux/kernel.h>
 11#include <linux/module.h>
 12#include <linux/gpio/driver.h>
 13#include <linux/slab.h>
 14#include <linux/device.h>
 15#include <linux/platform_device.h>
 16#include <linux/pci.h>
 17#include <linux/io.h>
 18
 19#define MODULE_NAME "vx855_gpio"
 20
 21/* The VX855 south bridge has the following GPIO pins:
 22 *	GPI 0...13	General Purpose Input
 23 *	GPO 0...12	General Purpose Output
 24 *	GPIO 0...14	General Purpose I/O (Open-Drain)
 25 */
 26
 27#define NR_VX855_GPI	14
 28#define NR_VX855_GPO	13
 29#define NR_VX855_GPIO	15
 30
 31#define NR_VX855_GPInO	(NR_VX855_GPI + NR_VX855_GPO)
 32#define NR_VX855_GP	(NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
 33
 34struct vx855_gpio {
 35	struct gpio_chip gpio;
 36	spinlock_t lock;
 37	u32 io_gpi;
 38	u32 io_gpo;
 39};
 40
 41/* resolve a GPIx into the corresponding bit position */
 42static inline u_int32_t gpi_i_bit(int i)
 43{
 44	if (i < 10)
 45		return 1 << i;
 46	else
 47		return 1 << (i + 14);
 48}
 49
 50static inline u_int32_t gpo_o_bit(int i)
 51{
 52	if (i < 11)
 53		return 1 << i;
 54	else
 55		return 1 << (i + 14);
 56}
 57
 58static inline u_int32_t gpio_i_bit(int i)
 59{
 60	if (i < 14)
 61		return 1 << (i + 10);
 62	else
 63		return 1 << (i + 14);
 64}
 65
 66static inline u_int32_t gpio_o_bit(int i)
 67{
 68	if (i < 14)
 69		return 1 << (i + 11);
 70	else
 71		return 1 << (i + 13);
 72}
 73
 74/* Mapping between numeric GPIO ID and the actual GPIO hardware numbering:
 75 * 0..13	GPI 0..13
 76 * 14..26	GPO 0..12
 77 * 27..41	GPIO 0..14
 78 */
 79
 80static int vx855gpio_direction_input(struct gpio_chip *gpio,
 81				     unsigned int nr)
 82{
 83	struct vx855_gpio *vg = gpiochip_get_data(gpio);
 84	unsigned long flags;
 85	u_int32_t reg_out;
 86
 87	/* Real GPI bits are always in input direction */
 88	if (nr < NR_VX855_GPI)
 89		return 0;
 90
 91	/* Real GPO bits cannot be put in output direction */
 92	if (nr < NR_VX855_GPInO)
 93		return -EINVAL;
 94
 95	/* Open Drain GPIO have to be set to one */
 96	spin_lock_irqsave(&vg->lock, flags);
 97	reg_out = inl(vg->io_gpo);
 98	reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
 99	outl(reg_out, vg->io_gpo);
100	spin_unlock_irqrestore(&vg->lock, flags);
101
102	return 0;
103}
104
105static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
106{
107	struct vx855_gpio *vg = gpiochip_get_data(gpio);
108	u_int32_t reg_in;
109	int ret = 0;
110
111	if (nr < NR_VX855_GPI) {
112		reg_in = inl(vg->io_gpi);
113		if (reg_in & gpi_i_bit(nr))
114			ret = 1;
115	} else if (nr < NR_VX855_GPInO) {
116		/* GPO don't have an input bit, we need to read it
117		 * back from the output register */
118		reg_in = inl(vg->io_gpo);
119		if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
120			ret = 1;
121	} else {
122		reg_in = inl(vg->io_gpi);
123		if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
124			ret = 1;
125	}
126
127	return ret;
128}
129
130static int vx855gpio_set(struct gpio_chip *gpio, unsigned int nr, int val)
131{
132	struct vx855_gpio *vg = gpiochip_get_data(gpio);
133	unsigned long flags;
134	u_int32_t reg_out;
135
136	/* True GPI cannot be switched to output mode */
137	if (nr < NR_VX855_GPI)
138		return -EPERM;
139
140	spin_lock_irqsave(&vg->lock, flags);
141	reg_out = inl(vg->io_gpo);
142	if (nr < NR_VX855_GPInO) {
143		if (val)
144			reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
145		else
146			reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
147	} else {
148		if (val)
149			reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
150		else
151			reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
152	}
153	outl(reg_out, vg->io_gpo);
154	spin_unlock_irqrestore(&vg->lock, flags);
155
156	return 0;
157}
158
159static int vx855gpio_direction_output(struct gpio_chip *gpio,
160				      unsigned int nr, int val)
161{
162	/* True GPI cannot be switched to output mode */
163	if (nr < NR_VX855_GPI)
164		return -EINVAL;
165
166	/* True GPO don't need to be switched to output mode,
167	 * and GPIO are open-drain, i.e. also need no switching,
168	 * so all we do is set the level */
169	vx855gpio_set(gpio, nr, val);
170
171	return 0;
172}
173
174static int vx855gpio_set_config(struct gpio_chip *gpio, unsigned int nr,
175				unsigned long config)
176{
177	enum pin_config_param param = pinconf_to_config_param(config);
178
179	/* The GPI cannot be single-ended */
180	if (nr < NR_VX855_GPI)
181		return -EINVAL;
182
183	/* The GPO's are push-pull */
184	if (nr < NR_VX855_GPInO) {
185		if (param != PIN_CONFIG_DRIVE_PUSH_PULL)
186			return -ENOTSUPP;
187		return 0;
188	}
189
190	/* The GPIO's are open drain */
191	if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN)
192		return -ENOTSUPP;
193
194	return 0;
195}
196
197static const char *vx855gpio_names[NR_VX855_GP] = {
198	"VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
199	"VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
200	"VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
201	"VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
202	"VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
203	"VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
204	"VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
205	"VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
206	"VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
207	"VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
208};
209
210static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
211{
212	struct gpio_chip *c = &vg->gpio;
213
214	c->label = "VX855 South Bridge";
215	c->owner = THIS_MODULE;
216	c->direction_input = vx855gpio_direction_input;
217	c->direction_output = vx855gpio_direction_output;
218	c->get = vx855gpio_get;
219	c->set = vx855gpio_set;
220	c->set_config = vx855gpio_set_config;
221	c->dbg_show = NULL;
222	c->base = 0;
223	c->ngpio = NR_VX855_GP;
224	c->can_sleep = false;
225	c->names = vx855gpio_names;
226}
227
228/* This platform device is ordinarily registered by the vx855 mfd driver */
229static int vx855gpio_probe(struct platform_device *pdev)
230{
231	struct resource *res_gpi;
232	struct resource *res_gpo;
233	struct vx855_gpio *vg;
234
235	res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
236	res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
237	if (!res_gpi || !res_gpo)
238		return -EBUSY;
239
240	vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
241	if (!vg)
242		return -ENOMEM;
243
244	dev_info(&pdev->dev, "found VX855 GPIO controller\n");
245	vg->io_gpi = res_gpi->start;
246	vg->io_gpo = res_gpo->start;
247	spin_lock_init(&vg->lock);
248
249	/*
250	 * A single byte is used to control various GPIO ports on the VX855,
251	 * and in the case of the OLPC XO-1.5, some of those ports are used
252	 * for switches that are interpreted and exposed through ACPI. ACPI
253	 * will have reserved the region, so our own reservation will not
254	 * succeed. Ignore and continue.
255	 */
256
257	if (!devm_request_region(&pdev->dev, res_gpi->start,
258				 resource_size(res_gpi), MODULE_NAME "_gpi"))
259		dev_warn(&pdev->dev,
260			"GPI I/O resource busy, probably claimed by ACPI\n");
261
262	if (!devm_request_region(&pdev->dev, res_gpo->start,
263				 resource_size(res_gpo), MODULE_NAME "_gpo"))
264		dev_warn(&pdev->dev,
265			"GPO I/O resource busy, probably claimed by ACPI\n");
266
267	vx855gpio_gpio_setup(vg);
268
269	return devm_gpiochip_add_data(&pdev->dev, &vg->gpio, vg);
270}
271
272static struct platform_driver vx855gpio_driver = {
273	.driver = {
274		.name	= MODULE_NAME,
275	},
276	.probe		= vx855gpio_probe,
277};
278
279module_platform_driver(vx855gpio_driver);
280
281MODULE_LICENSE("GPL");
282MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
283MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
284MODULE_ALIAS("platform:vx855_gpio");