gpio-pisosr.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (C) 2015-2023 Texas Instruments Incorporated - https://www.ti.com/
  4 *	Andrew Davis <afd@ti.com>
  5 */
  6
  7#include <linux/bitmap.h>
  8#include <linux/bitops.h>
  9#include <linux/delay.h>
 10#include <linux/gpio/consumer.h>
 11#include <linux/gpio/driver.h>
 12#include <linux/module.h>
 13#include <linux/mutex.h>
 14#include <linux/spi/spi.h>
 15
 16#define DEFAULT_NGPIO 8
 17
 18/**
 19 * struct pisosr_gpio - GPIO driver data
 20 * @chip: GPIO controller chip
 21 * @spi: SPI device pointer
 22 * @buffer: Buffer for device reads
 23 * @buffer_size: Size of buffer
 24 * @load_gpio: GPIO pin used to load input into device
 25 * @lock: Protects read sequences
 26 */
 27struct pisosr_gpio {
 28	struct gpio_chip chip;
 29	struct spi_device *spi;
 30	u8 *buffer;
 31	size_t buffer_size;
 32	struct gpio_desc *load_gpio;
 33	struct mutex lock;
 34};
 35
 36static int pisosr_gpio_refresh(struct pisosr_gpio *gpio)
 37{
 38	int ret;
 39
 40	mutex_lock(&gpio->lock);
 41
 42	if (gpio->load_gpio) {
 43		gpiod_set_value_cansleep(gpio->load_gpio, 1);
 44		udelay(1); /* registers load time (~10ns) */
 45		gpiod_set_value_cansleep(gpio->load_gpio, 0);
 46		udelay(1); /* registers recovery time (~5ns) */
 47	}
 48
 49	ret = spi_read(gpio->spi, gpio->buffer, gpio->buffer_size);
 50
 51	mutex_unlock(&gpio->lock);
 52
 53	return ret;
 54}
 55
 56static int pisosr_gpio_get_direction(struct gpio_chip *chip,
 57				     unsigned offset)
 58{
 59	/* This device always input */
 60	return GPIO_LINE_DIRECTION_IN;
 61}
 62
 63static int pisosr_gpio_direction_input(struct gpio_chip *chip,
 64				       unsigned offset)
 65{
 66	/* This device always input */
 67	return 0;
 68}
 69
 70static int pisosr_gpio_get(struct gpio_chip *chip, unsigned offset)
 71{
 72	struct pisosr_gpio *gpio = gpiochip_get_data(chip);
 73
 74	/* Refresh may not always be needed */
 75	pisosr_gpio_refresh(gpio);
 76
 77	return (gpio->buffer[offset / 8] >> (offset % 8)) & 0x1;
 78}
 79
 80static int pisosr_gpio_get_multiple(struct gpio_chip *chip,
 81				    unsigned long *mask, unsigned long *bits)
 82{
 83	struct pisosr_gpio *gpio = gpiochip_get_data(chip);
 84	unsigned long offset;
 85	unsigned long gpio_mask;
 86	unsigned long buffer_state;
 87
 88	pisosr_gpio_refresh(gpio);
 89
 90	bitmap_zero(bits, chip->ngpio);
 91	for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
 92		buffer_state = gpio->buffer[offset / 8] & gpio_mask;
 93		bitmap_set_value8(bits, buffer_state, offset);
 94	}
 95
 96	return 0;
 97}
 98
 99static const struct gpio_chip template_chip = {
100	.label			= "pisosr-gpio",
101	.owner			= THIS_MODULE,
102	.get_direction		= pisosr_gpio_get_direction,
103	.direction_input	= pisosr_gpio_direction_input,
104	.get			= pisosr_gpio_get,
105	.get_multiple		= pisosr_gpio_get_multiple,
106	.base			= -1,
107	.ngpio			= DEFAULT_NGPIO,
108	.can_sleep		= true,
109};
110
111static int pisosr_gpio_probe(struct spi_device *spi)
112{
113	struct device *dev = &spi->dev;
114	struct pisosr_gpio *gpio;
115	int ret;
116
117	gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL);
118	if (!gpio)
119		return -ENOMEM;
120
121	gpio->chip = template_chip;
122	gpio->chip.parent = dev;
123	of_property_read_u16(dev->of_node, "ngpios", &gpio->chip.ngpio);
124
125	gpio->spi = spi;
126
127	gpio->buffer_size = DIV_ROUND_UP(gpio->chip.ngpio, 8);
128	gpio->buffer = devm_kzalloc(dev, gpio->buffer_size, GFP_KERNEL);
129	if (!gpio->buffer)
130		return -ENOMEM;
131
132	gpio->load_gpio = devm_gpiod_get_optional(dev, "load", GPIOD_OUT_LOW);
133	if (IS_ERR(gpio->load_gpio))
134		return dev_err_probe(dev, PTR_ERR(gpio->load_gpio),
135				     "Unable to allocate load GPIO\n");
136
137	ret = devm_mutex_init(dev, &gpio->lock);
138	if (ret)
139		return ret;
140
141	ret = devm_gpiochip_add_data(dev, &gpio->chip, gpio);
142	if (ret < 0) {
143		dev_err(dev, "Unable to register gpiochip\n");
144		return ret;
145	}
146
147	return 0;
148}
149
150static const struct spi_device_id pisosr_gpio_id_table[] = {
151	{ "pisosr-gpio", },
152	{ /* sentinel */ }
153};
154MODULE_DEVICE_TABLE(spi, pisosr_gpio_id_table);
155
156static const struct of_device_id pisosr_gpio_of_match_table[] = {
157	{ .compatible = "pisosr-gpio", },
158	{ /* sentinel */ }
159};
160MODULE_DEVICE_TABLE(of, pisosr_gpio_of_match_table);
161
162static struct spi_driver pisosr_gpio_driver = {
163	.driver = {
164		.name = "pisosr-gpio",
165		.of_match_table = pisosr_gpio_of_match_table,
166	},
167	.probe = pisosr_gpio_probe,
168	.id_table = pisosr_gpio_id_table,
169};
170module_spi_driver(pisosr_gpio_driver);
171
172MODULE_AUTHOR("Andrew Davis <afd@ti.com>");
173MODULE_DESCRIPTION("SPI Compatible PISO Shift Register GPIO Driver");
174MODULE_LICENSE("GPL v2");