gpio-idt3243x.c

  1// SPDX-License-Identifier: GPL-2.0
  2/* Driver for IDT/Renesas 79RC3243x Interrupt Controller  */
  3
  4#include <linux/bitops.h>
  5#include <linux/gpio/driver.h>
  6#include <linux/gpio/generic.h>
  7#include <linux/irq.h>
  8#include <linux/module.h>
  9#include <linux/mod_devicetable.h>
 10#include <linux/platform_device.h>
 11#include <linux/spinlock.h>
 12
 13#define IDT_PIC_IRQ_PEND	0x00
 14#define IDT_PIC_IRQ_MASK	0x08
 15
 16#define IDT_GPIO_DIR		0x00
 17#define IDT_GPIO_DATA		0x04
 18#define IDT_GPIO_ILEVEL		0x08
 19#define IDT_GPIO_ISTAT		0x0C
 20
 21struct idt_gpio_ctrl {
 22	struct gpio_generic_chip chip;
 23	void __iomem *pic;
 24	void __iomem *gpio;
 25	u32 mask_cache;
 26};
 27
 28static void idt_gpio_dispatch(struct irq_desc *desc)
 29{
 30	struct gpio_chip *gc = irq_desc_get_handler_data(desc);
 31	struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc);
 32	struct irq_chip *host_chip = irq_desc_get_chip(desc);
 33	unsigned int bit, virq;
 34	unsigned long pending;
 35
 36	chained_irq_enter(host_chip, desc);
 37
 38	pending = readl(ctrl->pic + IDT_PIC_IRQ_PEND);
 39	pending &= ~ctrl->mask_cache;
 40	for_each_set_bit(bit, &pending, gc->ngpio) {
 41		virq = irq_find_mapping(gc->irq.domain, bit);
 42		if (virq)
 43			generic_handle_irq(virq);
 44	}
 45
 46	chained_irq_exit(host_chip, desc);
 47}
 48
 49static int idt_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
 50{
 51	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 52	struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc);
 53	unsigned int sense = flow_type & IRQ_TYPE_SENSE_MASK;
 54	u32 ilevel;
 55
 56	/* hardware only supports level triggered */
 57	if (sense == IRQ_TYPE_NONE || (sense & IRQ_TYPE_EDGE_BOTH))
 58		return -EINVAL;
 59
 60	guard(gpio_generic_lock_irqsave)(&ctrl->chip);
 61
 62	ilevel = readl(ctrl->gpio + IDT_GPIO_ILEVEL);
 63	if (sense & IRQ_TYPE_LEVEL_HIGH)
 64		ilevel |= BIT(d->hwirq);
 65	else if (sense & IRQ_TYPE_LEVEL_LOW)
 66		ilevel &= ~BIT(d->hwirq);
 67
 68	writel(ilevel, ctrl->gpio + IDT_GPIO_ILEVEL);
 69	irq_set_handler_locked(d, handle_level_irq);
 70
 71	return 0;
 72}
 73
 74static void idt_gpio_ack(struct irq_data *d)
 75{
 76	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 77	struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc);
 78
 79	writel(~BIT(d->hwirq), ctrl->gpio + IDT_GPIO_ISTAT);
 80}
 81
 82static void idt_gpio_mask(struct irq_data *d)
 83{
 84	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 85	struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc);
 86
 87	scoped_guard(gpio_generic_lock_irqsave, &ctrl->chip) {
 88		ctrl->mask_cache |= BIT(d->hwirq);
 89		writel(ctrl->mask_cache, ctrl->pic + IDT_PIC_IRQ_MASK);
 90	}
 91
 92	gpiochip_disable_irq(gc, irqd_to_hwirq(d));
 93}
 94
 95static void idt_gpio_unmask(struct irq_data *d)
 96{
 97	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 98	struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc);
 99
100	gpiochip_enable_irq(gc, irqd_to_hwirq(d));
101
102	guard(gpio_generic_lock_irqsave)(&ctrl->chip);
103
104	ctrl->mask_cache &= ~BIT(d->hwirq);
105	writel(ctrl->mask_cache, ctrl->pic + IDT_PIC_IRQ_MASK);
106}
107
108static int idt_gpio_irq_init_hw(struct gpio_chip *gc)
109{
110	struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc);
111
112	/* Mask interrupts. */
113	ctrl->mask_cache = 0xffffffff;
114	writel(ctrl->mask_cache, ctrl->pic + IDT_PIC_IRQ_MASK);
115
116	return 0;
117}
118
119static const struct irq_chip idt_gpio_irqchip = {
120	.name = "IDTGPIO",
121	.irq_mask = idt_gpio_mask,
122	.irq_ack = idt_gpio_ack,
123	.irq_unmask = idt_gpio_unmask,
124	.irq_set_type = idt_gpio_irq_set_type,
125	.flags = IRQCHIP_IMMUTABLE,
126	GPIOCHIP_IRQ_RESOURCE_HELPERS,
127};
128
129static int idt_gpio_probe(struct platform_device *pdev)
130{
131	struct gpio_generic_chip_config config;
132	struct device *dev = &pdev->dev;
133	struct gpio_irq_chip *girq;
134	struct idt_gpio_ctrl *ctrl;
135	int parent_irq;
136	int ngpios;
137	int ret;
138
139
140	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
141	if (!ctrl)
142		return -ENOMEM;
143
144	ctrl->gpio = devm_platform_ioremap_resource_byname(pdev, "gpio");
145	if (IS_ERR(ctrl->gpio))
146		return PTR_ERR(ctrl->gpio);
147
148	ctrl->chip.gc.parent = dev;
149
150	config = (struct gpio_generic_chip_config) {
151		.dev = &pdev->dev,
152		.sz = 4,
153		.dat = ctrl->gpio + IDT_GPIO_DATA,
154		.dirout = ctrl->gpio + IDT_GPIO_DIR,
155	};
156
157	ret = gpio_generic_chip_init(&ctrl->chip, &config);
158	if (ret) {
159		dev_err(dev, "failed to initialize the generic GPIO chip\n");
160		return ret;
161	}
162
163	ret = device_property_read_u32(dev, "ngpios", &ngpios);
164	if (!ret)
165		ctrl->chip.gc.ngpio = ngpios;
166
167	if (device_property_read_bool(dev, "interrupt-controller")) {
168		ctrl->pic = devm_platform_ioremap_resource_byname(pdev, "pic");
169		if (IS_ERR(ctrl->pic))
170			return PTR_ERR(ctrl->pic);
171
172		parent_irq = platform_get_irq(pdev, 0);
173		if (parent_irq < 0)
174			return parent_irq;
175
176		girq = &ctrl->chip.gc.irq;
177		gpio_irq_chip_set_chip(girq, &idt_gpio_irqchip);
178		girq->init_hw = idt_gpio_irq_init_hw;
179		girq->parent_handler = idt_gpio_dispatch;
180		girq->num_parents = 1;
181		girq->parents = devm_kcalloc(dev, girq->num_parents,
182					     sizeof(*girq->parents),
183					     GFP_KERNEL);
184		if (!girq->parents)
185			return -ENOMEM;
186
187		girq->parents[0] = parent_irq;
188		girq->default_type = IRQ_TYPE_NONE;
189		girq->handler = handle_bad_irq;
190	}
191
192	return devm_gpiochip_add_data(&pdev->dev, &ctrl->chip.gc, ctrl);
193}
194
195static const struct of_device_id idt_gpio_of_match[] = {
196	{ .compatible = "idt,32434-gpio" },
197	{ }
198};
199MODULE_DEVICE_TABLE(of, idt_gpio_of_match);
200
201static struct platform_driver idt_gpio_driver = {
202	.probe = idt_gpio_probe,
203	.driver = {
204		.name = "idt3243x-gpio",
205		.of_match_table = idt_gpio_of_match,
206	},
207};
208module_platform_driver(idt_gpio_driver);
209
210MODULE_DESCRIPTION("IDT 79RC3243x GPIO/PIC Driver");
211MODULE_AUTHOR("Thomas Bogendoerfer <tsbogend@alpha.franken.de>");
212MODULE_LICENSE("GPL");