hp82335.h

 1/* SPDX-License-Identifier: GPL-2.0 */
 2
 3/***************************************************************************
 4 *    copyright            : (C) 2002 by Frank Mori Hess                   *
 5 ***************************************************************************/
 6
 7#ifndef _HP82335_H
 8#define _HP82335_H
 9
10#include "tms9914.h"
11#include "gpibP.h"
12
13// struct which defines private_data for board
14struct hp82335_priv  {
15	struct tms9914_priv tms9914_priv;
16	unsigned int irq;
17	unsigned long raw_iobase;
18};
19
20// size of io memory region used
21static const int hp82335_rom_size = 0x2000;
22static const int hp82335_upper_iomem_size = 0x2000;
23
24// hp82335 register offsets
25enum hp_read_regs {
26	HPREG_CSR = 0x17f8,
27	HPREG_STATUS = 0x1ffc,
28};
29
30enum hp_write_regs {
31	HPREG_INTR_CLEAR = 0x17f7,
32	HPREG_CCR = HPREG_CSR,
33};
34
35enum ccr_bits {
36	DMA_ENABLE = (1 << 0),   /* DMA enable                  */
37	DMA_CHAN_SELECT = (1 << 1),   /* DMA channel select  O=3,1=2 */
38	INTR_ENABLE = (1 << 2),   /* interrupt enable            */
39	SYS_DISABLE = (1 << 3),   /* system controller disable   */
40};
41
42enum csr_bits {
43	SWITCH6 = (1 << 0),   /* switch 6 position           */
44	SWITCH5 = (1 << 1),   /* switch 5 position           */
45	SYS_CONTROLLER = (1 << 2),   /* system controller bit       */
46	DMA_ENABLE_STATUS = (1 << 4),   /* DMA enabled                 */
47	DMA_CHAN_STATUS = (1 << 5),   /* DMA channel   0=3,1=2       */
48	INTR_ENABLE_STATUS = (1 << 6),   /* Interrupt enable            */
49	INTR_PENDING = (1 << 7),   /* Interrupt Pending           */
50};
51
52#endif	// _HP82335_H