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fluke_gpib.h
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linux-6.19.14/drivers/gpib/eastwood/fluke_gpib.h
1/* SPDX-License-Identifier: GPL-2.0 */ 2 3/*************************************************************************** 4 * Author: Frank Mori Hess <fmh6jj@gmail.com> 5 * copyright: (C) 2006, 2010, 2015 Fluke Corporation 6 ***************************************************************************/ 7 8#include <linux/compiler.h> 9#include <linux/dmaengine.h> 10#include <linux/io.h> 11#include <linux/delay.h> 12#include <linux/interrupt.h> 13#include "nec7210.h" 14 15struct fluke_priv { 16 struct nec7210_priv nec7210_priv; 17 struct resource *gpib_iomem_res; 18 struct resource *write_transfer_counter_res; 19 struct resource *dma_port_res; 20 int irq; 21 struct dma_chan *dma_channel; 22 u8 *dma_buffer; 23 int dma_buffer_size; 24 void __iomem *write_transfer_counter; 25}; 26 27// cb7210 specific registers and bits 28enum cb7210_regs { 29 STATE1_REG = 0x4, 30 ISR0_IMR0 = 0x6, 31 BUS_STATUS = 0x7 32}; 33 34enum cb7210_page_in { 35 ISR0_IMR0_PAGE = 1, 36 BUS_STATUS_PAGE = 1, 37 STATE1_PAGE = 1 38}; 39 40/* IMR0 -- Interrupt Mode Register 0 */ 41enum imr0_bits { 42 FLUKE_IFCIE_BIT = 0x8, /* interface clear interrupt */ 43}; 44 45/* ISR0 -- Interrupt Status Register 0 */ 46enum isr0_bits { 47 FLUKE_IFCI_BIT = 0x8, /* interface clear interrupt */ 48}; 49 50enum state1_bits { 51 SOURCE_HANDSHAKE_SIDS_BITS = 0x0, /* source idle state */ 52 SOURCE_HANDSHAKE_SGNS_BITS = 0x1, /* source generate state */ 53 SOURCE_HANDSHAKE_SDYS_BITS = 0x2, /* source delay state */ 54 SOURCE_HANDSHAKE_STRS_BITS = 0x5, /* source transfer state */ 55 SOURCE_HANDSHAKE_MASK = 0x7 56}; 57 58/* 59 * we customized the cb7210 vhdl to give the "data in" status 60 * on the unused bit 7 of the address0 register. 61 */ 62enum cb7210_address0 { 63 DATA_IN_STATUS = 0x80 64}; 65 66static inline int cb7210_page_in_bits(unsigned int page) 67{ 68 return 0x50 | (page & 0xf); 69} 70 71// don't use without locking nec_priv->register_page_lock 72static inline u8 fluke_read_byte_nolock(struct nec7210_priv *nec_priv, 73 int register_num) 74{ 75 u8 retval; 76 77 retval = readl(nec_priv->mmiobase + register_num * nec_priv->offset); 78 return retval; 79} 80 81// don't use without locking nec_priv->register_page_lock 82static inline void fluke_write_byte_nolock(struct nec7210_priv *nec_priv, u8 data, 83 int register_num) 84{ 85 writel(data, nec_priv->mmiobase + register_num * nec_priv->offset); 86} 87 88static inline u8 fluke_paged_read_byte(struct fluke_priv *e_priv, 89 unsigned int register_num, unsigned int page) 90{ 91 struct nec7210_priv *nec_priv = &e_priv->nec7210_priv; 92 u8 retval; 93 unsigned long flags; 94 95 spin_lock_irqsave(&nec_priv->register_page_lock, flags); 96 fluke_write_byte_nolock(nec_priv, cb7210_page_in_bits(page), AUXMR); 97 udelay(1); 98 /* chip auto clears the page after a read */ 99 retval = fluke_read_byte_nolock(nec_priv, register_num); 100 spin_unlock_irqrestore(&nec_priv->register_page_lock, flags); 101 return retval; 102} 103 104static inline void fluke_paged_write_byte(struct fluke_priv *e_priv, u8 data, 105 unsigned int register_num, unsigned int page) 106{ 107 struct nec7210_priv *nec_priv = &e_priv->nec7210_priv; 108 unsigned long flags; 109 110 spin_lock_irqsave(&nec_priv->register_page_lock, flags); 111 fluke_write_byte_nolock(nec_priv, cb7210_page_in_bits(page), AUXMR); 112 udelay(1); 113 fluke_write_byte_nolock(nec_priv, data, register_num); 114 spin_unlock_irqrestore(&nec_priv->register_page_lock, flags); 115} 116 117enum bus_status_bits { 118 BSR_ATN_BIT = 0x1, 119 BSR_EOI_BIT = 0x2, 120 BSR_SRQ_BIT = 0x4, 121 BSR_IFC_BIT = 0x8, 122 BSR_REN_BIT = 0x10, 123 BSR_DAV_BIT = 0x20, 124 BSR_NRFD_BIT = 0x40, 125 BSR_NDAC_BIT = 0x80, 126}; 127 128enum cb7210_aux_cmds { 129/* 130 * AUX_RTL2 is an undocumented aux command which causes cb7210 to assert 131 * (and keep asserted) local rtl message. This is used in conjunction 132 * with the (stupid) cb7210 implementation 133 * of the normal nec7210 AUX_RTL aux command, which 134 * causes the rtl message to toggle between on and off. 135 */ 136 AUX_RTL2 = 0xd, 137 AUX_NBAF = 0xe, // new byte available false (also clears seoi) 138 AUX_LO_SPEED = 0x40, 139 AUX_HI_SPEED = 0x41, 140}; 141 142enum { 143 fluke_reg_offset = 4, 144 fluke_num_regs = 8, 145 write_transfer_counter_mask = 0x7ff, 146};
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