agilent_82350b.c

  1// SPDX-License-Identifier: GPL-2.0
  2
  3/***************************************************************************
  4 *   copyright            : (C) 2002, 2004 by Frank Mori Hess              *
  5 ***************************************************************************/
  6
  7#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  8#define dev_fmt pr_fmt
  9#define DRV_NAME KBUILD_MODNAME
 10
 11#include "agilent_82350b.h"
 12#include <linux/delay.h>
 13#include <linux/ioport.h>
 14#include <linux/sched.h>
 15#include <linux/module.h>
 16#include <linux/slab.h>
 17#include <asm/dma.h>
 18#include <linux/pci.h>
 19#include <linux/pci_ids.h>
 20#include <linux/string.h>
 21#include <linux/init.h>
 22#include <linux/wait.h>
 23
 24MODULE_LICENSE("GPL");
 25MODULE_DESCRIPTION("GPIB driver for Agilent 82350b");
 26
 27static int read_transfer_counter(struct agilent_82350b_priv *a_priv);
 28static unsigned short read_and_clear_event_status(struct gpib_board *board);
 29static void set_transfer_counter(struct agilent_82350b_priv *a_priv, int count);
 30static int agilent_82350b_write(struct gpib_board *board, u8 *buffer,
 31				size_t length, int send_eoi, size_t *bytes_written);
 32
 33static int agilent_82350b_accel_read(struct gpib_board *board, u8 *buffer,
 34				     size_t length, int *end, size_t *bytes_read)
 35
 36{
 37	struct agilent_82350b_priv *a_priv = board->private_data;
 38	struct tms9914_priv *tms_priv = &a_priv->tms9914_priv;
 39	int retval = 0;
 40	unsigned short event_status;
 41	int i, num_fifo_bytes;
 42	/* hardware doesn't support checking for end-of-string character when using fifo */
 43	if (tms_priv->eos_flags & REOS)
 44		return tms9914_read(board, tms_priv, buffer, length, end, bytes_read);
 45
 46	clear_bit(DEV_CLEAR_BN, &tms_priv->state);
 47
 48	read_and_clear_event_status(board);
 49	*end = 0;
 50	*bytes_read = 0;
 51	if (length == 0)
 52		return 0;
 53	/* disable fifo for the moment */
 54	writeb(DIRECTION_GPIB_TO_HOST, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
 55	/* handle corner case of board not in holdoff and one byte might slip in early */
 56	if (tms_priv->holdoff_active == 0 && length > 1) {
 57		size_t num_bytes;
 58
 59		retval = tms9914_read(board, tms_priv, buffer, 1, end, &num_bytes);
 60		*bytes_read += num_bytes;
 61		if (retval < 0 || *end)
 62			return retval;
 63		++buffer;
 64		--length;
 65	}
 66	tms9914_set_holdoff_mode(tms_priv, TMS9914_HOLDOFF_EOI);
 67	tms9914_release_holdoff(tms_priv);
 68	i = 0;
 69	num_fifo_bytes = length - 1;
 70	/* disable BI interrupts */
 71	write_byte(tms_priv, tms_priv->imr0_bits & ~HR_BIIE, IMR0);
 72	while (i < num_fifo_bytes && *end == 0) {
 73		int block_size;
 74		int j;
 75		int count;
 76
 77		block_size = min(num_fifo_bytes - i, agilent_82350b_fifo_size);
 78		set_transfer_counter(a_priv, block_size);
 79		writeb(ENABLE_TI_TO_SRAM | DIRECTION_GPIB_TO_HOST,
 80		       a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
 81		if (agilent_82350b_fifo_is_halted(a_priv))
 82			writeb(RESTART_STREAM_BIT, a_priv->gpib_base + STREAM_STATUS_REG);
 83
 84		clear_bit(READ_READY_BN, &tms_priv->state);
 85
 86		retval = wait_event_interruptible(board->wait,
 87						  ((event_status =
 88						    read_and_clear_event_status(board)) &
 89						   (TERM_COUNT_STATUS_BIT |
 90						    BUFFER_END_STATUS_BIT)) ||
 91						  test_bit(DEV_CLEAR_BN, &tms_priv->state) ||
 92						  test_bit(TIMO_NUM, &board->status));
 93		if (retval) {
 94			retval = -ERESTARTSYS;
 95			break;
 96		}
 97		count = block_size - read_transfer_counter(a_priv);
 98		for (j = 0; j < count && i < num_fifo_bytes; ++j)
 99			buffer[i++] = readb(a_priv->sram_base + j);
100		if (event_status & BUFFER_END_STATUS_BIT) {
101			clear_bit(RECEIVED_END_BN, &tms_priv->state);
102
103			tms_priv->holdoff_active = 1;
104			*end = 1;
105		}
106		if (test_bit(TIMO_NUM, &board->status)) {
107			retval = -ETIMEDOUT;
108			break;
109		}
110		if (test_bit(DEV_CLEAR_BN, &tms_priv->state)) {
111			retval = -EINTR;
112			break;
113		}
114	}
115	/* re-enable BI interrupts */
116	write_byte(tms_priv, tms_priv->imr0_bits, IMR0);
117	*bytes_read += i;
118	buffer += i;
119	length -= i;
120	writeb(DIRECTION_GPIB_TO_HOST, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
121	if (retval < 0)
122		return retval;
123	/* read last bytes if we havn't received an END yet */
124	if (*end == 0) {
125		size_t num_bytes;
126		/* try to make sure we holdoff after last byte read */
127		retval = tms9914_read(board, tms_priv, buffer, length, end, &num_bytes);
128		*bytes_read += num_bytes;
129		if (retval < 0)
130			return retval;
131	}
132	return 0;
133}
134
135static int translate_wait_return_value(struct gpib_board *board, int retval)
136
137{
138	struct agilent_82350b_priv *a_priv = board->private_data;
139	struct tms9914_priv *tms_priv = &a_priv->tms9914_priv;
140
141	if (retval)
142		return -ERESTARTSYS;
143	if (test_bit(TIMO_NUM, &board->status))
144		return -ETIMEDOUT;
145	if (test_bit(DEV_CLEAR_BN, &tms_priv->state))
146		return -EINTR;
147	return 0;
148}
149
150static int agilent_82350b_accel_write(struct gpib_board *board, u8 *buffer,
151				      size_t length, int send_eoi,
152				      size_t *bytes_written)
153{
154	struct agilent_82350b_priv *a_priv = board->private_data;
155	struct tms9914_priv *tms_priv = &a_priv->tms9914_priv;
156	int i, j;
157	unsigned short event_status;
158	int retval = 0;
159	int fifotransferlength = length;
160	int block_size = 0;
161	size_t num_bytes;
162
163	*bytes_written = 0;
164	if (send_eoi)
165		--fifotransferlength;
166
167	clear_bit(DEV_CLEAR_BN, &tms_priv->state);
168
169	writeb(0, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
170
171	event_status = read_and_clear_event_status(board);
172
173#ifdef EXPERIMENTAL
174	/* wait for previous BO to complete if any */
175	retval = wait_event_interruptible(board->wait,
176					  test_bit(DEV_CLEAR_BN, &tms_priv->state) ||
177					  test_bit(WRITE_READY_BN, &tms_priv->state) ||
178					  test_bit(TIMO_NUM, &board->status));
179	retval = translate_wait_return_value(board, retval);
180
181	if (retval)
182		return retval;
183#endif
184
185	if (fifotransferlength > 0) {
186		retval = agilent_82350b_write(board, buffer, 1, 0, &num_bytes);
187		*bytes_written += num_bytes;
188		if (retval < 0)
189			return retval;
190	}
191
192	write_byte(tms_priv, tms_priv->imr0_bits & ~HR_BOIE, IMR0);
193	for (i = 1; i < fifotransferlength;) {
194		clear_bit(WRITE_READY_BN, &tms_priv->state);
195
196		block_size = min(fifotransferlength - i, agilent_82350b_fifo_size);
197		set_transfer_counter(a_priv, block_size);
198		for (j = 0; j < block_size; ++j, ++i) {
199			/* load data into board's sram */
200			writeb(buffer[i], a_priv->sram_base + j);
201		}
202		writeb(ENABLE_TI_TO_SRAM, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
203
204		if (agilent_82350b_fifo_is_halted(a_priv))
205			writeb(RESTART_STREAM_BIT, a_priv->gpib_base + STREAM_STATUS_REG);
206
207		retval = wait_event_interruptible(board->wait,
208						  ((event_status =
209						    read_and_clear_event_status(board)) &
210						   TERM_COUNT_STATUS_BIT) ||
211						  test_bit(DEV_CLEAR_BN, &tms_priv->state) ||
212						  test_bit(TIMO_NUM, &board->status));
213		writeb(0, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
214		num_bytes = block_size - read_transfer_counter(a_priv);
215
216		*bytes_written += num_bytes;
217		retval = translate_wait_return_value(board, retval);
218		if (retval)
219			break;
220	}
221	write_byte(tms_priv, tms_priv->imr0_bits, IMR0);
222	if (retval < 0)
223		return retval;
224
225	if (send_eoi) {
226		retval = agilent_82350b_write(board, buffer + fifotransferlength, 1, send_eoi,
227					      &num_bytes);
228		*bytes_written += num_bytes;
229		if (retval < 0)
230			return retval;
231	}
232	return 0;
233}
234
235static unsigned short read_and_clear_event_status(struct gpib_board *board)
236{
237	struct agilent_82350b_priv *a_priv = board->private_data;
238	unsigned long flags;
239	unsigned short status;
240
241	spin_lock_irqsave(&board->spinlock, flags);
242	status = a_priv->event_status_bits;
243	a_priv->event_status_bits = 0;
244	spin_unlock_irqrestore(&board->spinlock, flags);
245	return status;
246}
247
248static irqreturn_t agilent_82350b_interrupt(int irq, void *arg)
249
250{
251	int tms9914_status1 = 0, tms9914_status2 = 0;
252	int event_status;
253	struct gpib_board *board = arg;
254	struct agilent_82350b_priv *a_priv = board->private_data;
255	unsigned long flags;
256	irqreturn_t retval = IRQ_NONE;
257
258	spin_lock_irqsave(&board->spinlock, flags);
259	event_status = readb(a_priv->gpib_base + EVENT_STATUS_REG);
260	if (event_status & IRQ_STATUS_BIT)
261		retval = IRQ_HANDLED;
262
263	if (event_status & TMS9914_IRQ_STATUS_BIT) {
264		tms9914_status1 = read_byte(&a_priv->tms9914_priv, ISR0);
265		tms9914_status2 = read_byte(&a_priv->tms9914_priv, ISR1);
266		tms9914_interrupt_have_status(board, &a_priv->tms9914_priv, tms9914_status1,
267					      tms9914_status2);
268	}
269	/* write-clear status bits */
270	if (event_status & (BUFFER_END_STATUS_BIT | TERM_COUNT_STATUS_BIT)) {
271		writeb(event_status & (BUFFER_END_STATUS_BIT | TERM_COUNT_STATUS_BIT),
272		       a_priv->gpib_base + EVENT_STATUS_REG);
273		a_priv->event_status_bits |= event_status;
274		wake_up_interruptible(&board->wait);
275	}
276	spin_unlock_irqrestore(&board->spinlock, flags);
277	return retval;
278}
279
280static void agilent_82350b_detach(struct gpib_board *board);
281
282static int read_transfer_counter(struct agilent_82350b_priv *a_priv)
283{
284	int lo, mid, value;
285
286	lo = readb(a_priv->gpib_base + XFER_COUNT_LO_REG);
287	mid = readb(a_priv->gpib_base + XFER_COUNT_MID_REG);
288	value = (lo & 0xff) | ((mid << 8) & 0x7f00);
289	value = ~(value - 1) & 0x7fff;
290	return value;
291}
292
293static void set_transfer_counter(struct agilent_82350b_priv *a_priv, int count)
294{
295	int complement = -count;
296
297	writeb(complement & 0xff, a_priv->gpib_base + XFER_COUNT_LO_REG);
298	writeb((complement >> 8) & 0xff, a_priv->gpib_base + XFER_COUNT_MID_REG);
299	/* I don't think the hi count reg is even used, but oh well */
300	writeb((complement >> 16) & 0xf, a_priv->gpib_base + XFER_COUNT_HI_REG);
301}
302
303/* wrappers for interface functions */
304static int agilent_82350b_read(struct gpib_board *board, u8 *buffer,
305			       size_t length, int *end, size_t *bytes_read)
306{
307	struct agilent_82350b_priv *priv = board->private_data;
308
309	return tms9914_read(board, &priv->tms9914_priv, buffer, length, end, bytes_read);
310}
311
312static int agilent_82350b_write(struct gpib_board *board, u8 *buffer,
313				size_t length, int send_eoi, size_t *bytes_written)
314
315{
316	struct agilent_82350b_priv *priv = board->private_data;
317
318	return tms9914_write(board, &priv->tms9914_priv, buffer, length, send_eoi, bytes_written);
319}
320
321static int agilent_82350b_command(struct gpib_board *board, u8 *buffer,
322				  size_t length, size_t *bytes_written)
323
324{
325	struct agilent_82350b_priv *priv = board->private_data;
326
327	return tms9914_command(board, &priv->tms9914_priv, buffer, length, bytes_written);
328}
329
330static int agilent_82350b_take_control(struct gpib_board *board, int synchronous)
331
332{
333	struct agilent_82350b_priv *priv = board->private_data;
334
335	return tms9914_take_control_workaround(board, &priv->tms9914_priv, synchronous);
336}
337
338static int agilent_82350b_go_to_standby(struct gpib_board *board)
339
340{
341	struct agilent_82350b_priv *priv = board->private_data;
342
343	return tms9914_go_to_standby(board, &priv->tms9914_priv);
344}
345
346static int agilent_82350b_request_system_control(struct gpib_board *board, int request_control)
347{
348	struct agilent_82350b_priv *a_priv = board->private_data;
349
350	if (request_control) {
351		a_priv->card_mode_bits |= CM_SYSTEM_CONTROLLER_BIT;
352		if (a_priv->model != MODEL_82350A)
353			writeb(IC_SYSTEM_CONTROLLER_BIT, a_priv->gpib_base + INTERNAL_CONFIG_REG);
354	} else {
355		a_priv->card_mode_bits &= ~CM_SYSTEM_CONTROLLER_BIT;
356		if (a_priv->model != MODEL_82350A)
357			writeb(0, a_priv->gpib_base + INTERNAL_CONFIG_REG);
358	}
359	writeb(a_priv->card_mode_bits, a_priv->gpib_base + CARD_MODE_REG);
360	return tms9914_request_system_control(board, &a_priv->tms9914_priv, request_control);
361}
362
363static void agilent_82350b_interface_clear(struct gpib_board *board, int assert)
364
365{
366	struct agilent_82350b_priv *priv = board->private_data;
367
368	tms9914_interface_clear(board, &priv->tms9914_priv, assert);
369}
370
371static void agilent_82350b_remote_enable(struct gpib_board *board, int enable)
372{
373	struct agilent_82350b_priv *priv = board->private_data;
374
375	tms9914_remote_enable(board, &priv->tms9914_priv, enable);
376}
377
378static int agilent_82350b_enable_eos(struct gpib_board *board, u8 eos_byte,
379				     int compare_8_bits)
380{
381	struct agilent_82350b_priv *priv = board->private_data;
382
383	return tms9914_enable_eos(board, &priv->tms9914_priv, eos_byte, compare_8_bits);
384}
385
386static void agilent_82350b_disable_eos(struct gpib_board *board)
387{
388	struct agilent_82350b_priv *priv = board->private_data;
389
390	tms9914_disable_eos(board, &priv->tms9914_priv);
391}
392
393static unsigned int agilent_82350b_update_status(struct gpib_board *board,
394						 unsigned int clear_mask)
395{
396	struct agilent_82350b_priv *priv = board->private_data;
397
398	return tms9914_update_status(board, &priv->tms9914_priv, clear_mask);
399}
400
401static int agilent_82350b_primary_address(struct gpib_board *board,
402					  unsigned int address)
403{
404	struct agilent_82350b_priv *priv = board->private_data;
405
406	return tms9914_primary_address(board, &priv->tms9914_priv, address);
407}
408
409static int agilent_82350b_secondary_address(struct gpib_board *board,
410					    unsigned int address, int enable)
411{
412	struct agilent_82350b_priv *priv = board->private_data;
413
414	return tms9914_secondary_address(board, &priv->tms9914_priv, address, enable);
415}
416
417static int agilent_82350b_parallel_poll(struct gpib_board *board, u8 *result)
418{
419	struct agilent_82350b_priv *priv = board->private_data;
420
421	return tms9914_parallel_poll(board, &priv->tms9914_priv, result);
422}
423
424static void agilent_82350b_parallel_poll_configure(struct gpib_board *board,
425						   u8 config)
426{
427	struct agilent_82350b_priv *priv = board->private_data;
428
429	tms9914_parallel_poll_configure(board, &priv->tms9914_priv, config);
430}
431
432static void agilent_82350b_parallel_poll_response(struct gpib_board *board, int ist)
433{
434	struct agilent_82350b_priv *priv = board->private_data;
435
436	tms9914_parallel_poll_response(board, &priv->tms9914_priv, ist);
437}
438
439static void agilent_82350b_serial_poll_response(struct gpib_board *board, u8 status)
440{
441	struct agilent_82350b_priv *priv = board->private_data;
442
443	tms9914_serial_poll_response(board, &priv->tms9914_priv, status);
444}
445
446static u8 agilent_82350b_serial_poll_status(struct gpib_board *board)
447{
448	struct agilent_82350b_priv *priv = board->private_data;
449
450	return tms9914_serial_poll_status(board, &priv->tms9914_priv);
451}
452
453static int agilent_82350b_line_status(const struct gpib_board *board)
454{
455	struct agilent_82350b_priv *priv = board->private_data;
456
457	return tms9914_line_status(board, &priv->tms9914_priv);
458}
459
460static int agilent_82350b_t1_delay(struct gpib_board *board, unsigned int nanosec)
461{
462	struct agilent_82350b_priv *a_priv = board->private_data;
463	static const int nanosec_per_clock = 30;
464	unsigned int value;
465
466	tms9914_t1_delay(board, &a_priv->tms9914_priv, nanosec);
467
468	value = (nanosec + nanosec_per_clock - 1) / nanosec_per_clock;
469	if (value > 0xff)
470		value = 0xff;
471	writeb(value, a_priv->gpib_base + T1_DELAY_REG);
472	return value * nanosec_per_clock;
473}
474
475static void agilent_82350b_return_to_local(struct gpib_board *board)
476{
477	struct agilent_82350b_priv *priv = board->private_data;
478
479	tms9914_return_to_local(board, &priv->tms9914_priv);
480}
481
482static int agilent_82350b_allocate_private(struct gpib_board *board)
483{
484	board->private_data = kzalloc(sizeof(struct agilent_82350b_priv), GFP_KERNEL);
485	if (!board->private_data)
486		return -ENOMEM;
487	return 0;
488}
489
490static void agilent_82350b_free_private(struct gpib_board *board)
491{
492	kfree(board->private_data);
493	board->private_data = NULL;
494}
495
496static int init_82350a_hardware(struct gpib_board *board,
497				const struct gpib_board_config *config)
498{
499	struct agilent_82350b_priv *a_priv = board->private_data;
500	static const unsigned int firmware_length = 5302;
501	unsigned int borg_status;
502	static const unsigned int timeout = 1000;
503	int i, j;
504	const char *firmware_data = config->init_data;
505	const unsigned int plx_cntrl_static_bits = PLX9050_WAITO_NOT_USER0_SELECT_BIT |
506		PLX9050_USER0_OUTPUT_BIT |
507		PLX9050_LLOCK_NOT_USER1_SELECT_BIT |
508		PLX9050_USER1_OUTPUT_BIT |
509		PLX9050_USER2_OUTPUT_BIT |
510		PLX9050_USER3_OUTPUT_BIT |
511		PLX9050_PCI_READ_MODE_BIT |
512		PLX9050_PCI_WRITE_MODE_BIT |
513		PLX9050_PCI_RETRY_DELAY_BITS(64) |
514		PLX9050_DIRECT_SLAVE_LOCK_ENABLE_BIT;
515
516	/* load borg data */
517	borg_status = readb(a_priv->borg_base);
518	if ((borg_status & BORG_DONE_BIT))
519		return 0;
520	/* need to programme borg */
521	if (!config->init_data || config->init_data_length != firmware_length) {
522		dev_err(board->gpib_dev, "the 82350A board requires firmware after powering on.\n");
523		return -EIO;
524	}
525	dev_dbg(board->gpib_dev, "Loading firmware...\n");
526
527	/* tickle the borg */
528	writel(plx_cntrl_static_bits | PLX9050_USER3_DATA_BIT,
529	       a_priv->plx_base + PLX9050_CNTRL_REG);
530	usleep_range(1000, 2000);
531	writel(plx_cntrl_static_bits, a_priv->plx_base + PLX9050_CNTRL_REG);
532	usleep_range(1000, 2000);
533	writel(plx_cntrl_static_bits | PLX9050_USER3_DATA_BIT,
534	       a_priv->plx_base + PLX9050_CNTRL_REG);
535	usleep_range(1000, 2000);
536
537	for (i = 0; i < config->init_data_length; ++i) {
538		for (j = 0; j < timeout && (readb(a_priv->borg_base) & BORG_READY_BIT) == 0; ++j) {
539			if (need_resched())
540				schedule();
541			usleep_range(10, 20);
542		}
543		if (j == timeout) {
544			dev_err(board->gpib_dev, "timed out loading firmware.\n");
545			return -ETIMEDOUT;
546		}
547		writeb(firmware_data[i], a_priv->gpib_base + CONFIG_DATA_REG);
548	}
549	for (j = 0; j < timeout && (readb(a_priv->borg_base) & BORG_DONE_BIT) == 0; ++j) {
550		if (need_resched())
551			schedule();
552		usleep_range(10, 20);
553	}
554	if (j == timeout) {
555		dev_err(board->gpib_dev, "timed out waiting for firmware load to complete.\n");
556		return -ETIMEDOUT;
557	}
558	dev_dbg(board->gpib_dev, " ...done.\n");
559	return 0;
560}
561
562static int test_sram(struct gpib_board *board)
563
564{
565	struct agilent_82350b_priv *a_priv = board->private_data;
566	unsigned int i;
567	const unsigned int sram_length = pci_resource_len(a_priv->pci_device, SRAM_82350A_REGION);
568	/* test SRAM */
569	const unsigned int byte_mask = 0xff;
570
571	for (i = 0; i < sram_length; ++i) {
572		writeb(i & byte_mask, a_priv->sram_base + i);
573		if (need_resched())
574			schedule();
575	}
576	for (i = 0; i < sram_length; ++i) {
577		unsigned int read_value = readb(a_priv->sram_base + i);
578
579		if ((i & byte_mask) != read_value) {
580			dev_err(board->gpib_dev, "SRAM test failed at %d wanted %d got %d\n",
581				i, (i & byte_mask), read_value);
582			return -EIO;
583		}
584		if (need_resched())
585			schedule();
586	}
587	dev_dbg(board->gpib_dev, "SRAM test passed 0x%x bytes checked\n", sram_length);
588	return 0;
589}
590
591static int agilent_82350b_generic_attach(struct gpib_board *board,
592					 const struct gpib_board_config *config,
593					 int use_fifos)
594
595{
596	struct agilent_82350b_priv *a_priv;
597	struct tms9914_priv *tms_priv;
598	int retval;
599
600	board->status = 0;
601
602	if (agilent_82350b_allocate_private(board))
603		return -ENOMEM;
604	a_priv = board->private_data;
605	a_priv->using_fifos = use_fifos;
606	tms_priv = &a_priv->tms9914_priv;
607	tms_priv->read_byte = tms9914_iomem_read_byte;
608	tms_priv->write_byte = tms9914_iomem_write_byte;
609	tms_priv->offset = 1;
610
611	/* find board */
612	a_priv->pci_device = gpib_pci_get_device(config, PCI_VENDOR_ID_AGILENT,
613						 PCI_DEVICE_ID_82350B, NULL);
614	if (a_priv->pci_device) {
615		a_priv->model = MODEL_82350B;
616		dev_dbg(board->gpib_dev, "Agilent 82350B board found\n");
617
618	} else	{
619		a_priv->pci_device = gpib_pci_get_device(config, PCI_VENDOR_ID_AGILENT,
620							 PCI_DEVICE_ID_82351A, NULL);
621		if (a_priv->pci_device)	{
622			a_priv->model = MODEL_82351A;
623			dev_dbg(board->gpib_dev, "Agilent 82351B board found\n");
624
625		} else {
626			a_priv->pci_device = gpib_pci_get_subsys(config, PCI_VENDOR_ID_PLX,
627								 PCI_DEVICE_ID_PLX_9050,
628								 PCI_VENDOR_ID_HP,
629								 PCI_SUBDEVICE_ID_82350A,
630								 a_priv->pci_device);
631			if (a_priv->pci_device) {
632				a_priv->model = MODEL_82350A;
633				dev_dbg(board->gpib_dev, "HP/Agilent 82350A board found\n");
634			} else {
635				dev_err(board->gpib_dev, "no 82350/82351 board found\n");
636				return -ENODEV;
637			}
638		}
639	}
640	if (pci_enable_device(a_priv->pci_device)) {
641		dev_err(board->gpib_dev, "error enabling pci device\n");
642		return -EIO;
643	}
644	if (pci_request_regions(a_priv->pci_device, DRV_NAME))
645		return -ENOMEM;
646	switch (a_priv->model) {
647	case MODEL_82350A:
648		a_priv->plx_base = ioremap(pci_resource_start(a_priv->pci_device, PLX_MEM_REGION),
649					   pci_resource_len(a_priv->pci_device, PLX_MEM_REGION));
650		dev_dbg(board->gpib_dev, "plx base address remapped to 0x%p\n", a_priv->plx_base);
651		a_priv->gpib_base = ioremap(pci_resource_start(a_priv->pci_device,
652							       GPIB_82350A_REGION),
653					    pci_resource_len(a_priv->pci_device,
654							     GPIB_82350A_REGION));
655		dev_dbg(board->gpib_dev, "chip base address remapped to 0x%p\n", a_priv->gpib_base);
656		tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG;
657		a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device,
658							       SRAM_82350A_REGION),
659					    pci_resource_len(a_priv->pci_device,
660							     SRAM_82350A_REGION));
661		dev_dbg(board->gpib_dev, "sram base address remapped to 0x%p\n", a_priv->sram_base);
662		a_priv->borg_base = ioremap(pci_resource_start(a_priv->pci_device,
663							       BORG_82350A_REGION),
664					    pci_resource_len(a_priv->pci_device,
665							     BORG_82350A_REGION));
666		dev_dbg(board->gpib_dev, "borg base address remapped to 0x%p\n", a_priv->borg_base);
667
668		retval = init_82350a_hardware(board, config);
669		if (retval < 0)
670			return retval;
671		break;
672	case MODEL_82350B:
673	case MODEL_82351A:
674		a_priv->gpib_base = ioremap(pci_resource_start(a_priv->pci_device, GPIB_REGION),
675					    pci_resource_len(a_priv->pci_device, GPIB_REGION));
676		dev_dbg(board->gpib_dev, "chip base address remapped to 0x%p\n", a_priv->gpib_base);
677		tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG;
678		a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, SRAM_REGION),
679					    pci_resource_len(a_priv->pci_device, SRAM_REGION));
680		dev_dbg(board->gpib_dev, "sram base address remapped to 0x%p\n", a_priv->sram_base);
681		a_priv->misc_base = ioremap(pci_resource_start(a_priv->pci_device, MISC_REGION),
682					    pci_resource_len(a_priv->pci_device, MISC_REGION));
683		dev_dbg(board->gpib_dev, "misc base address remapped to 0x%p\n", a_priv->misc_base);
684		break;
685	default:
686		dev_err(board->gpib_dev, "invalid board\n");
687		return -ENODEV;
688	}
689
690	retval = test_sram(board);
691	if (retval < 0)
692		return retval;
693
694	if (request_irq(a_priv->pci_device->irq, agilent_82350b_interrupt,
695			IRQF_SHARED, DRV_NAME, board)) {
696		dev_err(board->gpib_dev, "failed to obtain irq %d\n", a_priv->pci_device->irq);
697		return -EIO;
698	}
699	a_priv->irq = a_priv->pci_device->irq;
700	dev_dbg(board->gpib_dev, " IRQ %d\n", a_priv->irq);
701
702	writeb(0, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
703	a_priv->card_mode_bits = ENABLE_PCI_IRQ_BIT;
704	writeb(a_priv->card_mode_bits, a_priv->gpib_base + CARD_MODE_REG);
705
706	if (a_priv->model == MODEL_82350A) {
707		/* enable PCI interrupts for 82350a */
708		writel(PLX9050_LINTR1_EN_BIT | PLX9050_LINTR2_POLARITY_BIT |
709		       PLX9050_PCI_INTR_EN_BIT,
710		       a_priv->plx_base + PLX9050_INTCSR_REG);
711	}
712
713	if (use_fifos) {
714		writeb(ENABLE_BUFFER_END_EVENTS_BIT | ENABLE_TERM_COUNT_EVENTS_BIT,
715		       a_priv->gpib_base + EVENT_ENABLE_REG);
716		writeb(ENABLE_TERM_COUNT_INTERRUPT_BIT | ENABLE_BUFFER_END_INTERRUPT_BIT |
717		       ENABLE_TMS9914_INTERRUPTS_BIT, a_priv->gpib_base + INTERRUPT_ENABLE_REG);
718		/* write-clear event status bits */
719		writeb(BUFFER_END_STATUS_BIT | TERM_COUNT_STATUS_BIT,
720		       a_priv->gpib_base + EVENT_STATUS_REG);
721	} else {
722		writeb(0, a_priv->gpib_base + EVENT_ENABLE_REG);
723		writeb(ENABLE_TMS9914_INTERRUPTS_BIT,
724		       a_priv->gpib_base + INTERRUPT_ENABLE_REG);
725	}
726	board->t1_nano_sec = agilent_82350b_t1_delay(board, 2000);
727	tms9914_board_reset(tms_priv);
728
729	tms9914_online(board, tms_priv);
730
731	return 0;
732}
733
734static int agilent_82350b_unaccel_attach(struct gpib_board *board,
735					 const struct gpib_board_config *config)
736{
737	return agilent_82350b_generic_attach(board, config, 0);
738}
739
740static int agilent_82350b_accel_attach(struct gpib_board *board,
741				       const struct gpib_board_config *config)
742{
743	return agilent_82350b_generic_attach(board, config, 1);
744}
745
746static void agilent_82350b_detach(struct gpib_board *board)
747{
748	struct agilent_82350b_priv *a_priv = board->private_data;
749	struct tms9914_priv *tms_priv;
750
751	if (a_priv) {
752		if (a_priv->plx_base) /* disable interrupts */
753			writel(0, a_priv->plx_base + PLX9050_INTCSR_REG);
754
755		tms_priv = &a_priv->tms9914_priv;
756		if (a_priv->irq)
757			free_irq(a_priv->irq, board);
758		if (a_priv->gpib_base) {
759			tms9914_board_reset(tms_priv);
760			if (a_priv->misc_base)
761				iounmap(a_priv->misc_base);
762			if (a_priv->borg_base)
763				iounmap(a_priv->borg_base);
764			if (a_priv->sram_base)
765				iounmap(a_priv->sram_base);
766			if (a_priv->gpib_base)
767				iounmap(a_priv->gpib_base);
768			if (a_priv->plx_base)
769				iounmap(a_priv->plx_base);
770			pci_release_regions(a_priv->pci_device);
771		}
772		if (a_priv->pci_device)
773			pci_dev_put(a_priv->pci_device);
774	}
775	agilent_82350b_free_private(board);
776}
777
778static struct gpib_interface agilent_82350b_unaccel_interface = {
779	.name = "agilent_82350b_unaccel",
780	.attach = agilent_82350b_unaccel_attach,
781	.detach = agilent_82350b_detach,
782	.read = agilent_82350b_read,
783	.write = agilent_82350b_write,
784	.command = agilent_82350b_command,
785	.request_system_control = agilent_82350b_request_system_control,
786	.take_control = agilent_82350b_take_control,
787	.go_to_standby = agilent_82350b_go_to_standby,
788	.interface_clear = agilent_82350b_interface_clear,
789	.remote_enable = agilent_82350b_remote_enable,
790	.enable_eos = agilent_82350b_enable_eos,
791	.disable_eos = agilent_82350b_disable_eos,
792	.parallel_poll = agilent_82350b_parallel_poll,
793	.parallel_poll_configure = agilent_82350b_parallel_poll_configure,
794	.parallel_poll_response = agilent_82350b_parallel_poll_response,
795	.local_parallel_poll_mode = NULL, /* XXX */
796	.line_status = agilent_82350b_line_status,
797	.update_status = agilent_82350b_update_status,
798	.primary_address = agilent_82350b_primary_address,
799	.secondary_address = agilent_82350b_secondary_address,
800	.serial_poll_response = agilent_82350b_serial_poll_response,
801	.serial_poll_status = agilent_82350b_serial_poll_status,
802	.t1_delay = agilent_82350b_t1_delay,
803	.return_to_local = agilent_82350b_return_to_local,
804};
805
806static struct gpib_interface agilent_82350b_interface = {
807	.name = "agilent_82350b",
808	.attach = agilent_82350b_accel_attach,
809	.detach = agilent_82350b_detach,
810	.read = agilent_82350b_accel_read,
811	.write = agilent_82350b_accel_write,
812	.command = agilent_82350b_command,
813	.request_system_control = agilent_82350b_request_system_control,
814	.take_control = agilent_82350b_take_control,
815	.go_to_standby = agilent_82350b_go_to_standby,
816	.interface_clear = agilent_82350b_interface_clear,
817	.remote_enable = agilent_82350b_remote_enable,
818	.enable_eos = agilent_82350b_enable_eos,
819	.disable_eos = agilent_82350b_disable_eos,
820	.parallel_poll = agilent_82350b_parallel_poll,
821	.parallel_poll_configure = agilent_82350b_parallel_poll_configure,
822	.parallel_poll_response = agilent_82350b_parallel_poll_response,
823	.local_parallel_poll_mode = NULL, /* XXX */
824	.line_status = agilent_82350b_line_status,
825	.update_status = agilent_82350b_update_status,
826	.primary_address = agilent_82350b_primary_address,
827	.secondary_address = agilent_82350b_secondary_address,
828	.serial_poll_response = agilent_82350b_serial_poll_response,
829	.serial_poll_status = agilent_82350b_serial_poll_status,
830	.t1_delay = agilent_82350b_t1_delay,
831	.return_to_local = agilent_82350b_return_to_local,
832};
833
834static int agilent_82350b_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
835
836{
837	return 0;
838}
839
840static const struct pci_device_id agilent_82350b_pci_table[] = {
841	{ PCI_VENDOR_ID_PLX,     PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_HP,
842	  PCI_SUBDEVICE_ID_82350A, 0, 0, 0 },
843	{ PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_82350B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
844	{ PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_82351A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
845	{ 0 }
846};
847MODULE_DEVICE_TABLE(pci, agilent_82350b_pci_table);
848
849static struct pci_driver agilent_82350b_pci_driver = {
850	.name = DRV_NAME,
851	.id_table = agilent_82350b_pci_table,
852	.probe = &agilent_82350b_pci_probe
853};
854
855static int __init agilent_82350b_init_module(void)
856{
857	int result;
858
859	result = pci_register_driver(&agilent_82350b_pci_driver);
860	if (result) {
861		pr_err("pci_register_driver failed: error = %d\n", result);
862		return result;
863	}
864
865	result = gpib_register_driver(&agilent_82350b_unaccel_interface, THIS_MODULE);
866	if (result) {
867		pr_err("gpib_register_driver failed: error = %d\n", result);
868		goto err_unaccel;
869	}
870
871	result = gpib_register_driver(&agilent_82350b_interface, THIS_MODULE);
872	if (result) {
873		pr_err("gpib_register_driver failed: error = %d\n", result);
874		goto err_interface;
875	}
876
877	return 0;
878
879err_interface:
880	gpib_unregister_driver(&agilent_82350b_unaccel_interface);
881err_unaccel:
882	pci_unregister_driver(&agilent_82350b_pci_driver);
883
884	return result;
885}
886
887static void __exit agilent_82350b_exit_module(void)
888{
889	gpib_unregister_driver(&agilent_82350b_interface);
890	gpib_unregister_driver(&agilent_82350b_unaccel_interface);
891
892	pci_unregister_driver(&agilent_82350b_pci_driver);
893}
894
895module_init(agilent_82350b_init_module);
896module_exit(agilent_82350b_exit_module);