k3-psil-j7200.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 *  Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
  4 *  Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
  5 */
  6
  7#include <linux/kernel.h>
  8
  9#include "k3-psil-priv.h"
 10
 11#define PSIL_PDMA_XY_TR(x)				\
 12	{						\
 13		.thread_id = x,				\
 14		.ep_config = {				\
 15			.ep_type = PSIL_EP_PDMA_XY,	\
 16		},					\
 17	}
 18
 19#define PSIL_PDMA_XY_PKT(x)				\
 20	{						\
 21		.thread_id = x,				\
 22		.ep_config = {				\
 23			.ep_type = PSIL_EP_PDMA_XY,	\
 24			.pkt_mode = 1,			\
 25		},					\
 26	}
 27
 28#define PSIL_PDMA_MCASP(x)				\
 29	{						\
 30		.thread_id = x,				\
 31		.ep_config = {				\
 32			.ep_type = PSIL_EP_PDMA_XY,	\
 33			.pdma_acc32 = 1,		\
 34			.pdma_burst = 1,		\
 35		},					\
 36	}
 37
 38#define PSIL_ETHERNET(x)				\
 39	{						\
 40		.thread_id = x,				\
 41		.ep_config = {				\
 42			.ep_type = PSIL_EP_NATIVE,	\
 43			.pkt_mode = 1,			\
 44			.needs_epib = 1,		\
 45			.psd_size = 16,			\
 46		},					\
 47	}
 48
 49#define PSIL_SA2UL(x, tx)				\
 50	{						\
 51		.thread_id = x,				\
 52		.ep_config = {				\
 53			.ep_type = PSIL_EP_NATIVE,	\
 54			.pkt_mode = 1,			\
 55			.needs_epib = 1,		\
 56			.psd_size = 64,			\
 57			.notdpkt = tx,			\
 58		},					\
 59	}
 60
 61/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
 62static struct psil_ep j7200_src_ep_map[] = {
 63	/* PDMA_MCASP - McASP0-2 */
 64	PSIL_PDMA_MCASP(0x4400),
 65	PSIL_PDMA_MCASP(0x4401),
 66	PSIL_PDMA_MCASP(0x4402),
 67	/* PDMA_SPI_G0 - SPI0-3 */
 68	PSIL_PDMA_XY_PKT(0x4600),
 69	PSIL_PDMA_XY_PKT(0x4601),
 70	PSIL_PDMA_XY_PKT(0x4602),
 71	PSIL_PDMA_XY_PKT(0x4603),
 72	PSIL_PDMA_XY_PKT(0x4604),
 73	PSIL_PDMA_XY_PKT(0x4605),
 74	PSIL_PDMA_XY_PKT(0x4606),
 75	PSIL_PDMA_XY_PKT(0x4607),
 76	PSIL_PDMA_XY_PKT(0x4608),
 77	PSIL_PDMA_XY_PKT(0x4609),
 78	PSIL_PDMA_XY_PKT(0x460a),
 79	PSIL_PDMA_XY_PKT(0x460b),
 80	PSIL_PDMA_XY_PKT(0x460c),
 81	PSIL_PDMA_XY_PKT(0x460d),
 82	PSIL_PDMA_XY_PKT(0x460e),
 83	PSIL_PDMA_XY_PKT(0x460f),
 84	/* PDMA_SPI_G1 - SPI4-7 */
 85	PSIL_PDMA_XY_PKT(0x4610),
 86	PSIL_PDMA_XY_PKT(0x4611),
 87	PSIL_PDMA_XY_PKT(0x4612),
 88	PSIL_PDMA_XY_PKT(0x4613),
 89	PSIL_PDMA_XY_PKT(0x4614),
 90	PSIL_PDMA_XY_PKT(0x4615),
 91	PSIL_PDMA_XY_PKT(0x4616),
 92	PSIL_PDMA_XY_PKT(0x4617),
 93	PSIL_PDMA_XY_PKT(0x4618),
 94	PSIL_PDMA_XY_PKT(0x4619),
 95	PSIL_PDMA_XY_PKT(0x461a),
 96	PSIL_PDMA_XY_PKT(0x461b),
 97	PSIL_PDMA_XY_PKT(0x461c),
 98	PSIL_PDMA_XY_PKT(0x461d),
 99	PSIL_PDMA_XY_PKT(0x461e),
100	PSIL_PDMA_XY_PKT(0x461f),
101	/* PDMA_USART_G0 - UART0-1 */
102	PSIL_PDMA_XY_PKT(0x4700),
103	PSIL_PDMA_XY_PKT(0x4701),
104	/* PDMA_USART_G1 - UART2-3 */
105	PSIL_PDMA_XY_PKT(0x4702),
106	PSIL_PDMA_XY_PKT(0x4703),
107	/* PDMA_USART_G2 - UART4-9 */
108	PSIL_PDMA_XY_PKT(0x4704),
109	PSIL_PDMA_XY_PKT(0x4705),
110	PSIL_PDMA_XY_PKT(0x4706),
111	PSIL_PDMA_XY_PKT(0x4707),
112	PSIL_PDMA_XY_PKT(0x4708),
113	PSIL_PDMA_XY_PKT(0x4709),
114	/* CPSW5 */
115	PSIL_ETHERNET(0x4a00),
116	/* CPSW0 */
117	PSIL_ETHERNET(0x7000),
118	/* MCU_PDMA_MISC_G0 - SPI0 */
119	PSIL_PDMA_XY_PKT(0x7100),
120	PSIL_PDMA_XY_PKT(0x7101),
121	PSIL_PDMA_XY_PKT(0x7102),
122	PSIL_PDMA_XY_PKT(0x7103),
123	/* MCU_PDMA_MISC_G1 - SPI1-2 */
124	PSIL_PDMA_XY_PKT(0x7200),
125	PSIL_PDMA_XY_PKT(0x7201),
126	PSIL_PDMA_XY_PKT(0x7202),
127	PSIL_PDMA_XY_PKT(0x7203),
128	PSIL_PDMA_XY_PKT(0x7204),
129	PSIL_PDMA_XY_PKT(0x7205),
130	PSIL_PDMA_XY_PKT(0x7206),
131	PSIL_PDMA_XY_PKT(0x7207),
132	/* MCU_PDMA_MISC_G2 - UART0 */
133	PSIL_PDMA_XY_PKT(0x7300),
134	/* MCU_PDMA_ADC - ADC0-1 */
135	PSIL_PDMA_XY_TR(0x7400),
136	PSIL_PDMA_XY_TR(0x7401),
137	/* SA2UL */
138	PSIL_SA2UL(0x7500, 0),
139	PSIL_SA2UL(0x7501, 0),
140	PSIL_SA2UL(0x7502, 0),
141	PSIL_SA2UL(0x7503, 0),
142};
143
144/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
145static struct psil_ep j7200_dst_ep_map[] = {
146	/* PDMA_MCASP - McASP0-2 */
147	PSIL_PDMA_MCASP(0xc400),
148	PSIL_PDMA_MCASP(0xc401),
149	PSIL_PDMA_MCASP(0xc402),
150	/* PDMA_SPI_G0 - SPI0-3 */
151	PSIL_PDMA_XY_PKT(0xc600),
152	PSIL_PDMA_XY_PKT(0xc601),
153	PSIL_PDMA_XY_PKT(0xc602),
154	PSIL_PDMA_XY_PKT(0xc603),
155	PSIL_PDMA_XY_PKT(0xc604),
156	PSIL_PDMA_XY_PKT(0xc605),
157	PSIL_PDMA_XY_PKT(0xc606),
158	PSIL_PDMA_XY_PKT(0xc607),
159	PSIL_PDMA_XY_PKT(0xc608),
160	PSIL_PDMA_XY_PKT(0xc609),
161	PSIL_PDMA_XY_PKT(0xc60a),
162	PSIL_PDMA_XY_PKT(0xc60b),
163	PSIL_PDMA_XY_PKT(0xc60c),
164	PSIL_PDMA_XY_PKT(0xc60d),
165	PSIL_PDMA_XY_PKT(0xc60e),
166	PSIL_PDMA_XY_PKT(0xc60f),
167	/* PDMA_SPI_G1 - SPI4-7 */
168	PSIL_PDMA_XY_PKT(0xc610),
169	PSIL_PDMA_XY_PKT(0xc611),
170	PSIL_PDMA_XY_PKT(0xc612),
171	PSIL_PDMA_XY_PKT(0xc613),
172	PSIL_PDMA_XY_PKT(0xc614),
173	PSIL_PDMA_XY_PKT(0xc615),
174	PSIL_PDMA_XY_PKT(0xc616),
175	PSIL_PDMA_XY_PKT(0xc617),
176	PSIL_PDMA_XY_PKT(0xc618),
177	PSIL_PDMA_XY_PKT(0xc619),
178	PSIL_PDMA_XY_PKT(0xc61a),
179	PSIL_PDMA_XY_PKT(0xc61b),
180	PSIL_PDMA_XY_PKT(0xc61c),
181	PSIL_PDMA_XY_PKT(0xc61d),
182	PSIL_PDMA_XY_PKT(0xc61e),
183	PSIL_PDMA_XY_PKT(0xc61f),
184	/* PDMA_USART_G0 - UART0-1 */
185	PSIL_PDMA_XY_PKT(0xc700),
186	PSIL_PDMA_XY_PKT(0xc701),
187	/* PDMA_USART_G1 - UART2-3 */
188	PSIL_PDMA_XY_PKT(0xc702),
189	PSIL_PDMA_XY_PKT(0xc703),
190	/* PDMA_USART_G2 - UART4-9 */
191	PSIL_PDMA_XY_PKT(0xc704),
192	PSIL_PDMA_XY_PKT(0xc705),
193	PSIL_PDMA_XY_PKT(0xc706),
194	PSIL_PDMA_XY_PKT(0xc707),
195	PSIL_PDMA_XY_PKT(0xc708),
196	PSIL_PDMA_XY_PKT(0xc709),
197	/* CPSW5 */
198	PSIL_ETHERNET(0xca00),
199	PSIL_ETHERNET(0xca01),
200	PSIL_ETHERNET(0xca02),
201	PSIL_ETHERNET(0xca03),
202	PSIL_ETHERNET(0xca04),
203	PSIL_ETHERNET(0xca05),
204	PSIL_ETHERNET(0xca06),
205	PSIL_ETHERNET(0xca07),
206	/* CPSW0 */
207	PSIL_ETHERNET(0xf000),
208	PSIL_ETHERNET(0xf001),
209	PSIL_ETHERNET(0xf002),
210	PSIL_ETHERNET(0xf003),
211	PSIL_ETHERNET(0xf004),
212	PSIL_ETHERNET(0xf005),
213	PSIL_ETHERNET(0xf006),
214	PSIL_ETHERNET(0xf007),
215	/* MCU_PDMA_MISC_G0 - SPI0 */
216	PSIL_PDMA_XY_PKT(0xf100),
217	PSIL_PDMA_XY_PKT(0xf101),
218	PSIL_PDMA_XY_PKT(0xf102),
219	PSIL_PDMA_XY_PKT(0xf103),
220	/* MCU_PDMA_MISC_G1 - SPI1-2 */
221	PSIL_PDMA_XY_PKT(0xf200),
222	PSIL_PDMA_XY_PKT(0xf201),
223	PSIL_PDMA_XY_PKT(0xf202),
224	PSIL_PDMA_XY_PKT(0xf203),
225	PSIL_PDMA_XY_PKT(0xf204),
226	PSIL_PDMA_XY_PKT(0xf205),
227	PSIL_PDMA_XY_PKT(0xf206),
228	PSIL_PDMA_XY_PKT(0xf207),
229	/* MCU_PDMA_MISC_G2 - UART0 */
230	PSIL_PDMA_XY_PKT(0xf300),
231	/* SA2UL */
232	PSIL_SA2UL(0xf500, 1),
233	PSIL_SA2UL(0xf501, 1),
234};
235
236struct psil_ep_map j7200_ep_map = {
237	.name = "j7200",
238	.src = j7200_src_ep_map,
239	.src_count = ARRAY_SIZE(j7200_src_ep_map),
240	.dst = j7200_dst_ep_map,
241	.dst_count = ARRAY_SIZE(j7200_dst_ep_map),
242};