k3-psil-am62.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 *  Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com
  4 */
  5
  6#include <linux/kernel.h>
  7
  8#include "k3-psil-priv.h"
  9
 10#define PSIL_PDMA_XY_PKT(x)					\
 11	{							\
 12		.thread_id = x,					\
 13		.ep_config = {					\
 14			.ep_type = PSIL_EP_PDMA_XY,		\
 15			.mapped_channel_id = -1,		\
 16			.default_flow_id = -1,			\
 17			.pkt_mode = 1,				\
 18		},						\
 19	}
 20
 21#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt)		\
 22	{							\
 23		.thread_id = x,					\
 24		.ep_config = {					\
 25			.ep_type = PSIL_EP_NATIVE,		\
 26			.pkt_mode = 1,				\
 27			.needs_epib = 1,			\
 28			.psd_size = 16,				\
 29			.mapped_channel_id = ch,		\
 30			.flow_start = flow_base,		\
 31			.flow_num = flow_cnt,			\
 32			.default_flow_id = flow_base,		\
 33		},						\
 34	}
 35
 36#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx)	\
 37	{							\
 38		.thread_id = x,					\
 39		.ep_config = {					\
 40			.ep_type = PSIL_EP_NATIVE,		\
 41			.pkt_mode = 1,				\
 42			.needs_epib = 1,			\
 43			.psd_size = 64,				\
 44			.mapped_channel_id = ch,		\
 45			.flow_start = flow_base,		\
 46			.flow_num = flow_cnt,			\
 47			.default_flow_id = default_flow,	\
 48			.notdpkt = tx,				\
 49		},						\
 50	}
 51
 52#define PSIL_PDMA_MCASP(x)				\
 53	{						\
 54		.thread_id = x,				\
 55		.ep_config = {				\
 56			.ep_type = PSIL_EP_PDMA_XY,	\
 57			.pdma_acc32 = 1,		\
 58			.pdma_burst = 1,		\
 59		},					\
 60	}
 61
 62#define PSIL_CSI2RX(x)					\
 63	{						\
 64		.thread_id = x,				\
 65		.ep_config = {				\
 66			.ep_type = PSIL_EP_NATIVE,	\
 67		},					\
 68	}
 69
 70/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
 71static struct psil_ep am62_src_ep_map[] = {
 72	/* SAUL */
 73	PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
 74	PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
 75	PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
 76	PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
 77	/* PDMA_MAIN0 - SPI0-2 */
 78	PSIL_PDMA_XY_PKT(0x4300),
 79	PSIL_PDMA_XY_PKT(0x4301),
 80	PSIL_PDMA_XY_PKT(0x4302),
 81	PSIL_PDMA_XY_PKT(0x4303),
 82	PSIL_PDMA_XY_PKT(0x4304),
 83	PSIL_PDMA_XY_PKT(0x4305),
 84	PSIL_PDMA_XY_PKT(0x4306),
 85	PSIL_PDMA_XY_PKT(0x4307),
 86	PSIL_PDMA_XY_PKT(0x4308),
 87	PSIL_PDMA_XY_PKT(0x4309),
 88	PSIL_PDMA_XY_PKT(0x430a),
 89	PSIL_PDMA_XY_PKT(0x430b),
 90	/* PDMA_MAIN1 - UART0-6 */
 91	PSIL_PDMA_XY_PKT(0x4400),
 92	PSIL_PDMA_XY_PKT(0x4401),
 93	PSIL_PDMA_XY_PKT(0x4402),
 94	PSIL_PDMA_XY_PKT(0x4403),
 95	PSIL_PDMA_XY_PKT(0x4404),
 96	PSIL_PDMA_XY_PKT(0x4405),
 97	PSIL_PDMA_XY_PKT(0x4406),
 98	/* PDMA_MAIN2 - MCASP0-2 */
 99	PSIL_PDMA_MCASP(0x4500),
100	PSIL_PDMA_MCASP(0x4501),
101	PSIL_PDMA_MCASP(0x4502),
102	/* CPSW3G */
103	PSIL_ETHERNET(0x4600, 19, 19, 16),
104	/* CSI2RX */
105	PSIL_CSI2RX(0x4700),
106	PSIL_CSI2RX(0x4701),
107	PSIL_CSI2RX(0x4702),
108	PSIL_CSI2RX(0x4703),
109	PSIL_CSI2RX(0x4704),
110	PSIL_CSI2RX(0x4705),
111	PSIL_CSI2RX(0x4706),
112	PSIL_CSI2RX(0x4707),
113	PSIL_CSI2RX(0x4708),
114	PSIL_CSI2RX(0x4709),
115	PSIL_CSI2RX(0x470a),
116	PSIL_CSI2RX(0x470b),
117	PSIL_CSI2RX(0x470c),
118	PSIL_CSI2RX(0x470d),
119	PSIL_CSI2RX(0x470e),
120	PSIL_CSI2RX(0x470f),
121	PSIL_CSI2RX(0x4710),
122	PSIL_CSI2RX(0x4711),
123	PSIL_CSI2RX(0x4712),
124	PSIL_CSI2RX(0x4713),
125	PSIL_CSI2RX(0x4714),
126	PSIL_CSI2RX(0x4715),
127	PSIL_CSI2RX(0x4716),
128	PSIL_CSI2RX(0x4717),
129	PSIL_CSI2RX(0x4718),
130	PSIL_CSI2RX(0x4719),
131	PSIL_CSI2RX(0x471a),
132	PSIL_CSI2RX(0x471b),
133	PSIL_CSI2RX(0x471c),
134	PSIL_CSI2RX(0x471d),
135	PSIL_CSI2RX(0x471e),
136	PSIL_CSI2RX(0x471f),
137};
138
139/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
140static struct psil_ep am62_dst_ep_map[] = {
141	/* SAUL */
142	PSIL_SAUL(0xf500, 27, 83, 8, 83, 1),
143	PSIL_SAUL(0xf501, 28, 91, 8, 91, 1),
144	/* PDMA_MAIN0 - SPI0-2 */
145	PSIL_PDMA_XY_PKT(0xc300),
146	PSIL_PDMA_XY_PKT(0xc301),
147	PSIL_PDMA_XY_PKT(0xc302),
148	PSIL_PDMA_XY_PKT(0xc303),
149	PSIL_PDMA_XY_PKT(0xc304),
150	PSIL_PDMA_XY_PKT(0xc305),
151	PSIL_PDMA_XY_PKT(0xc306),
152	PSIL_PDMA_XY_PKT(0xc307),
153	PSIL_PDMA_XY_PKT(0xc308),
154	PSIL_PDMA_XY_PKT(0xc309),
155	PSIL_PDMA_XY_PKT(0xc30a),
156	PSIL_PDMA_XY_PKT(0xc30b),
157	/* PDMA_MAIN1 - UART0-6 */
158	PSIL_PDMA_XY_PKT(0xc400),
159	PSIL_PDMA_XY_PKT(0xc401),
160	PSIL_PDMA_XY_PKT(0xc402),
161	PSIL_PDMA_XY_PKT(0xc403),
162	PSIL_PDMA_XY_PKT(0xc404),
163	PSIL_PDMA_XY_PKT(0xc405),
164	PSIL_PDMA_XY_PKT(0xc406),
165	/* PDMA_MAIN2 - MCASP0-2 */
166	PSIL_PDMA_MCASP(0xc500),
167	PSIL_PDMA_MCASP(0xc501),
168	PSIL_PDMA_MCASP(0xc502),
169	/* CPSW3G */
170	PSIL_ETHERNET(0xc600, 19, 19, 8),
171	PSIL_ETHERNET(0xc601, 20, 27, 8),
172	PSIL_ETHERNET(0xc602, 21, 35, 8),
173	PSIL_ETHERNET(0xc603, 22, 43, 8),
174	PSIL_ETHERNET(0xc604, 23, 51, 8),
175	PSIL_ETHERNET(0xc605, 24, 59, 8),
176	PSIL_ETHERNET(0xc606, 25, 67, 8),
177	PSIL_ETHERNET(0xc607, 26, 75, 8),
178};
179
180struct psil_ep_map am62_ep_map = {
181	.name = "am62",
182	.src = am62_src_ep_map,
183	.src_count = ARRAY_SIZE(am62_src_ep_map),
184	.dst = am62_dst_ep_map,
185	.dst_count = ARRAY_SIZE(am62_dst_ep_map),
186};