internal.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Driver for the Synopsys DesignWare DMA Controller
  4 *
  5 * Copyright (C) 2013 Intel Corporation
  6 */
  7
  8#ifndef _DMA_DW_INTERNAL_H
  9#define _DMA_DW_INTERNAL_H
 10
 11#include <linux/dma/dw.h>
 12
 13#include "regs.h"
 14
 15int do_dma_probe(struct dw_dma_chip *chip);
 16int do_dma_remove(struct dw_dma_chip *chip);
 17
 18void do_dw_dma_on(struct dw_dma *dw);
 19void do_dw_dma_off(struct dw_dma *dw);
 20
 21int do_dw_dma_disable(struct dw_dma_chip *chip);
 22int do_dw_dma_enable(struct dw_dma_chip *chip);
 23
 24extern bool dw_dma_filter(struct dma_chan *chan, void *param);
 25
 26#ifdef CONFIG_ACPI
 27void dw_dma_acpi_controller_register(struct dw_dma *dw);
 28void dw_dma_acpi_controller_free(struct dw_dma *dw);
 29#else /* !CONFIG_ACPI */
 30static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
 31static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {}
 32#endif /* !CONFIG_ACPI */
 33
 34struct platform_device;
 35
 36#ifdef CONFIG_OF
 37struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev);
 38void dw_dma_of_controller_register(struct dw_dma *dw);
 39void dw_dma_of_controller_free(struct dw_dma *dw);
 40#else
 41static inline struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev)
 42{
 43	return NULL;
 44}
 45static inline void dw_dma_of_controller_register(struct dw_dma *dw) {}
 46static inline void dw_dma_of_controller_free(struct dw_dma *dw) {}
 47#endif
 48
 49struct dw_dma_chip_pdata {
 50	const struct dw_dma_platform_data *pdata;
 51	int (*probe)(struct dw_dma_chip *chip);
 52	int (*remove)(struct dw_dma_chip *chip);
 53	struct dw_dma_chip *chip;
 54	u8 m_master;
 55	u8 p_master;
 56};
 57
 58static __maybe_unused const struct dw_dma_chip_pdata dw_dma_chip_pdata = {
 59	.probe = dw_dma_probe,
 60	.remove = dw_dma_remove,
 61	.m_master = 0,
 62	.p_master = 1,
 63};
 64
 65static const struct dw_dma_platform_data idma32_pdata = {
 66	.nr_channels = 8,
 67	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
 68	.chan_priority = CHAN_PRIORITY_ASCENDING,
 69	.block_size = 131071,
 70	.nr_masters = 1,
 71	.data_width = {4},
 72	.multi_block = {1, 1, 1, 1, 1, 1, 1, 1},
 73};
 74
 75static __maybe_unused const struct dw_dma_chip_pdata idma32_chip_pdata = {
 76	.pdata = &idma32_pdata,
 77	.probe = idma32_dma_probe,
 78	.remove = idma32_dma_remove,
 79	.m_master = 0,
 80	.p_master = 0,
 81};
 82
 83static const struct dw_dma_platform_data xbar_pdata = {
 84	.nr_channels = 8,
 85	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
 86	.chan_priority = CHAN_PRIORITY_ASCENDING,
 87	.block_size = 131071,
 88	.nr_masters = 1,
 89	.data_width = {4},
 90	.quirks = DW_DMA_QUIRK_XBAR_PRESENT,
 91};
 92
 93static __maybe_unused const struct dw_dma_chip_pdata xbar_chip_pdata = {
 94	.pdata = &xbar_pdata,
 95	.probe = idma32_dma_probe,
 96	.remove = idma32_dma_remove,
 97	.m_master = 0,
 98	.p_master = 0,
 99};
100
101#endif /* _DMA_DW_INTERNAL_H */