nx-842.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2
  3#ifndef __NX_842_H__
  4#define __NX_842_H__
  5
  6#include <linux/kernel.h>
  7#include <linux/init.h>
  8#include <linux/module.h>
  9#include <linux/of.h>
 10#include <linux/slab.h>
 11#include <linux/io.h>
 12#include <linux/mm.h>
 13#include <linux/ratelimit.h>
 14
 15/* Restrictions on Data Descriptor List (DDL) and Entry (DDE) buffers
 16 *
 17 * From NX P8 workbook, sec 4.9.1 "842 details"
 18 *   Each DDE buffer is 128 byte aligned
 19 *   Each DDE buffer size is a multiple of 32 bytes (except the last)
 20 *   The last DDE buffer size is a multiple of 8 bytes
 21 */
 22#define DDE_BUFFER_ALIGN	(128)
 23#define DDE_BUFFER_SIZE_MULT	(32)
 24#define DDE_BUFFER_LAST_MULT	(8)
 25
 26/* Arbitrary DDL length limit
 27 * Allows max buffer size of MAX-1 to MAX pages
 28 * (depending on alignment)
 29 */
 30#define DDL_LEN_MAX		(17)
 31
 32/* CCW 842 CI/FC masks
 33 * NX P8 workbook, section 4.3.1, figure 4-6
 34 * "CI/FC Boundary by NX CT type"
 35 */
 36#define CCW_CI_842		(0x00003ff8)
 37#define CCW_FC_842		(0x00000007)
 38
 39/* CCW Function Codes (FC) for 842
 40 * NX P8 workbook, section 4.9, table 4-28
 41 * "Function Code Definitions for 842 Memory Compression"
 42 */
 43#define CCW_FC_842_COMP_NOCRC	(0)
 44#define CCW_FC_842_COMP_CRC	(1)
 45#define CCW_FC_842_DECOMP_NOCRC	(2)
 46#define CCW_FC_842_DECOMP_CRC	(3)
 47#define CCW_FC_842_MOVE		(4)
 48
 49/* CSB CC Error Types for 842
 50 * NX P8 workbook, section 4.10.3, table 4-30
 51 * "Reported Error Types Summary Table"
 52 */
 53/* These are all duplicates of existing codes defined in icswx.h. */
 54#define CSB_CC_TRANSLATION_DUP1	(80)
 55#define CSB_CC_TRANSLATION_DUP2	(82)
 56#define CSB_CC_TRANSLATION_DUP3	(84)
 57#define CSB_CC_TRANSLATION_DUP4	(86)
 58#define CSB_CC_TRANSLATION_DUP5	(92)
 59#define CSB_CC_TRANSLATION_DUP6	(94)
 60#define CSB_CC_PROTECTION_DUP1	(81)
 61#define CSB_CC_PROTECTION_DUP2	(83)
 62#define CSB_CC_PROTECTION_DUP3	(85)
 63#define CSB_CC_PROTECTION_DUP4	(87)
 64#define CSB_CC_PROTECTION_DUP5	(93)
 65#define CSB_CC_PROTECTION_DUP6	(95)
 66#define CSB_CC_RD_EXTERNAL_DUP1	(89)
 67#define CSB_CC_RD_EXTERNAL_DUP2	(90)
 68#define CSB_CC_RD_EXTERNAL_DUP3	(91)
 69/* These are specific to NX */
 70/* 842 codes */
 71#define CSB_CC_TPBC_GT_SPBC	(64) /* no error, but >1 comp ratio */
 72#define CSB_CC_CRC_MISMATCH	(65) /* decomp crc mismatch */
 73#define CSB_CC_TEMPL_INVALID	(66) /* decomp invalid template value */
 74#define CSB_CC_TEMPL_OVERFLOW	(67) /* decomp template shows data after end */
 75/* sym crypt codes */
 76#define CSB_CC_DECRYPT_OVERFLOW	(64)
 77/* asym crypt codes */
 78#define CSB_CC_MINV_OVERFLOW	(128)
 79/*
 80 * HW error - Job did not finish in the maximum time allowed.
 81 * Job terminated.
 82 */
 83#define CSB_CC_HW_EXPIRED_TIMER		(224)
 84/* These are reserved for hypervisor use */
 85#define CSB_CC_HYP_RESERVE_START	(240)
 86#define CSB_CC_HYP_RESERVE_END		(253)
 87#define CSB_CC_HYP_RESERVE_P9_END	(251)
 88/* No valid interrupt server (P9 or later). */
 89#define CSB_CC_HYP_RESERVE_NO_INTR_SERVER	(252)
 90#define CSB_CC_HYP_NO_HW		(254)
 91#define CSB_CC_HYP_HANG_ABORTED		(255)
 92
 93/* CCB Completion Modes (CM) for 842
 94 * NX P8 workbook, section 4.3, figure 4-5
 95 * "CRB Details - Normal Cop_Req (CL=00, C=1)"
 96 */
 97#define CCB_CM_EXTRA_WRITE	(CCB_CM0_ALL_COMPLETIONS & CCB_CM12_STORE)
 98#define CCB_CM_INTERRUPT	(CCB_CM0_ALL_COMPLETIONS & CCB_CM12_INTERRUPT)
 99
100#define LEN_ON_SIZE(pa, size)	((size) - ((pa) & ((size) - 1)))
101#define LEN_ON_PAGE(pa)		LEN_ON_SIZE(pa, PAGE_SIZE)
102
103struct crypto_scomp;
104
105static inline unsigned long nx842_get_pa(void *addr)
106{
107	if (!is_vmalloc_addr(addr))
108		return __pa(addr);
109
110	return page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr);
111}
112
113/**
114 * This provides the driver's constraints.  Different nx842 implementations
115 * may have varying requirements.  The constraints are:
116 *   @alignment:	All buffers should be aligned to this
117 *   @multiple:		All buffer lengths should be a multiple of this
118 *   @minimum:		Buffer lengths must not be less than this amount
119 *   @maximum:		Buffer lengths must not be more than this amount
120 *
121 * The constraints apply to all buffers and lengths, both input and output,
122 * for both compression and decompression, except for the minimum which
123 * only applies to compression input and decompression output; the
124 * compressed data can be less than the minimum constraint.  It can be
125 * assumed that compressed data will always adhere to the multiple
126 * constraint.
127 *
128 * The driver may succeed even if these constraints are violated;
129 * however the driver can return failure or suffer reduced performance
130 * if any constraint is not met.
131 */
132struct nx842_constraints {
133	int alignment;
134	int multiple;
135	int minimum;
136	int maximum;
137};
138
139struct nx842_driver {
140	char *name;
141	struct module *owner;
142	size_t workmem_size;
143
144	struct nx842_constraints *constraints;
145
146	int (*compress)(const unsigned char *in, unsigned int in_len,
147			unsigned char *out, unsigned int *out_len,
148			void *wrkmem);
149	int (*decompress)(const unsigned char *in, unsigned int in_len,
150			  unsigned char *out, unsigned int *out_len,
151			  void *wrkmem);
152};
153
154struct nx842_crypto_header_group {
155	__be16 padding;			/* unused bytes at start of group */
156	__be32 compressed_length;	/* compressed bytes in group */
157	__be32 uncompressed_length;	/* bytes after decompression */
158} __packed;
159
160struct nx842_crypto_header {
161	/* New members MUST be added within the struct_group() macro below. */
162	struct_group_tagged(nx842_crypto_header_hdr, hdr,
163		__be16 magic;		/* NX842_CRYPTO_MAGIC */
164		__be16 ignore;		/* decompressed end bytes to ignore */
165		u8 groups;		/* total groups in this header */
166	);
167	struct nx842_crypto_header_group group[];
168} __packed;
169static_assert(offsetof(struct nx842_crypto_header, group) == sizeof(struct nx842_crypto_header_hdr),
170	      "struct member likely outside of struct_group_tagged()");
171
172#define NX842_CRYPTO_GROUP_MAX	(0x20)
173
174struct nx842_crypto_ctx {
175	spinlock_t lock;
176
177	u8 *wmem;
178	u8 *sbounce, *dbounce;
179
180	struct nx842_crypto_header_hdr header;
181	struct nx842_crypto_header_group group[NX842_CRYPTO_GROUP_MAX];
182
183	struct nx842_driver *driver;
184};
185
186void *nx842_crypto_alloc_ctx(struct nx842_driver *driver);
187void nx842_crypto_free_ctx(void *ctx);
188int nx842_crypto_compress(struct crypto_scomp *tfm,
189			  const u8 *src, unsigned int slen,
190			  u8 *dst, unsigned int *dlen, void *ctx);
191int nx842_crypto_decompress(struct crypto_scomp *tfm,
192			    const u8 *src, unsigned int slen,
193			    u8 *dst, unsigned int *dlen, void *ctx);
194
195#endif /* __NX_842_H__ */