adf_drv.c

  1// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
  2/* Copyright(c) 2014 - 2020 Intel Corporation */
  3#include <linux/kernel.h>
  4#include <linux/module.h>
  5#include <linux/pci.h>
  6#include <linux/init.h>
  7#include <linux/types.h>
  8#include <linux/fs.h>
  9#include <linux/slab.h>
 10#include <linux/errno.h>
 11#include <linux/device.h>
 12#include <linux/dma-mapping.h>
 13#include <linux/platform_device.h>
 14#include <linux/workqueue.h>
 15#include <linux/io.h>
 16#include <adf_accel_devices.h>
 17#include <adf_common_drv.h>
 18#include <adf_cfg.h>
 19#include <adf_dbgfs.h>
 20#include "adf_dh895xcc_hw_data.h"
 21
 22static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev)
 23{
 24	pci_release_regions(accel_dev->accel_pci_dev.pci_dev);
 25	pci_disable_device(accel_dev->accel_pci_dev.pci_dev);
 26}
 27
 28static void adf_cleanup_accel(struct adf_accel_dev *accel_dev)
 29{
 30	struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
 31	int i;
 32
 33	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
 34		struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
 35
 36		if (bar->virt_addr)
 37			pci_iounmap(accel_pci_dev->pci_dev, bar->virt_addr);
 38	}
 39
 40	if (accel_dev->hw_device) {
 41		switch (accel_pci_dev->pci_dev->device) {
 42		case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
 43			adf_clean_hw_data_dh895xcc(accel_dev->hw_device);
 44			break;
 45		default:
 46			break;
 47		}
 48		kfree(accel_dev->hw_device);
 49		accel_dev->hw_device = NULL;
 50	}
 51	adf_dbgfs_exit(accel_dev);
 52	adf_cfg_dev_remove(accel_dev);
 53	adf_devmgr_rm_dev(accel_dev, NULL);
 54}
 55
 56static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 57{
 58	struct adf_accel_dev *accel_dev;
 59	struct adf_accel_pci *accel_pci_dev;
 60	struct adf_hw_device_data *hw_data;
 61	unsigned int i, bar_nr;
 62	unsigned long bar_mask;
 63	int ret;
 64
 65	switch (ent->device) {
 66	case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
 67		break;
 68	default:
 69		dev_err(&pdev->dev, "Invalid device 0x%x.\n", ent->device);
 70		return -ENODEV;
 71	}
 72
 73	if (num_possible_nodes() > 1 && dev_to_node(&pdev->dev) < 0) {
 74		/* If the accelerator is connected to a node with no memory
 75		 * there is no point in using the accelerator since the remote
 76		 * memory transaction will be very slow. */
 77		dev_err(&pdev->dev, "Invalid NUMA configuration.\n");
 78		return -EINVAL;
 79	}
 80
 81	accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL,
 82				 dev_to_node(&pdev->dev));
 83	if (!accel_dev)
 84		return -ENOMEM;
 85
 86	INIT_LIST_HEAD(&accel_dev->crypto_list);
 87	accel_pci_dev = &accel_dev->accel_pci_dev;
 88	accel_pci_dev->pci_dev = pdev;
 89
 90	/* Add accel device to accel table.
 91	 * This should be called before adf_cleanup_accel is called */
 92	if (adf_devmgr_add_dev(accel_dev, NULL)) {
 93		dev_err(&pdev->dev, "Failed to add new accelerator device.\n");
 94		kfree(accel_dev);
 95		return -EFAULT;
 96	}
 97
 98	accel_dev->owner = THIS_MODULE;
 99	/* Allocate and configure device configuration structure */
100	hw_data = kzalloc_node(sizeof(*hw_data), GFP_KERNEL,
101			       dev_to_node(&pdev->dev));
102	if (!hw_data) {
103		ret = -ENOMEM;
104		goto out_err;
105	}
106
107	accel_dev->hw_device = hw_data;
108	adf_init_hw_data_dh895xcc(accel_dev->hw_device);
109	pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
110	pci_read_config_dword(pdev, ADF_DEVICE_FUSECTL_OFFSET,
111			      &hw_data->fuses[ADF_FUSECTL0]);
112
113	/* Get Accelerators and Accelerators Engines masks */
114	hw_data->accel_mask = hw_data->get_accel_mask(hw_data);
115	hw_data->ae_mask = hw_data->get_ae_mask(hw_data);
116	accel_pci_dev->sku = hw_data->get_sku(hw_data);
117	/* If the device has no acceleration engines then ignore it. */
118	if (!hw_data->accel_mask || !hw_data->ae_mask ||
119	    ((~hw_data->ae_mask) & 0x01)) {
120		dev_err(&pdev->dev, "No acceleration units found");
121		ret = -EFAULT;
122		goto out_err;
123	}
124
125	/* Create device configuration table */
126	ret = adf_cfg_dev_add(accel_dev);
127	if (ret)
128		goto out_err;
129
130	pcie_set_readrq(pdev, 1024);
131
132	/* enable PCI device */
133	if (pci_enable_device(pdev)) {
134		ret = -EFAULT;
135		goto out_err;
136	}
137
138	/* set dma identifier */
139	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
140	if (ret) {
141		dev_err(&pdev->dev, "No usable DMA configuration\n");
142		goto out_err_disable;
143	}
144
145	if (pci_request_regions(pdev, ADF_DH895XCC_DEVICE_NAME)) {
146		ret = -EFAULT;
147		goto out_err_disable;
148	}
149
150	/* Get accelerator capabilities mask */
151	hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev);
152
153	/* Find and map all the device's BARS */
154	i = 0;
155	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
156	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
157		struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
158
159		bar->base_addr = pci_resource_start(pdev, bar_nr);
160		if (!bar->base_addr)
161			break;
162		bar->size = pci_resource_len(pdev, bar_nr);
163		bar->virt_addr = pci_iomap(accel_pci_dev->pci_dev, bar_nr, 0);
164		if (!bar->virt_addr) {
165			dev_err(&pdev->dev, "Failed to map BAR %d\n", bar_nr);
166			ret = -EFAULT;
167			goto out_err_free_reg;
168		}
169	}
170	pci_set_master(pdev);
171
172	if (pci_save_state(pdev)) {
173		dev_err(&pdev->dev, "Failed to save pci state\n");
174		ret = -ENOMEM;
175		goto out_err_free_reg;
176	}
177
178	adf_dbgfs_init(accel_dev);
179
180	ret = adf_dev_up(accel_dev, true);
181	if (ret)
182		goto out_err_dev_stop;
183
184	return ret;
185
186out_err_dev_stop:
187	adf_dev_down(accel_dev);
188out_err_free_reg:
189	pci_release_regions(accel_pci_dev->pci_dev);
190out_err_disable:
191	pci_disable_device(accel_pci_dev->pci_dev);
192out_err:
193	adf_cleanup_accel(accel_dev);
194	kfree(accel_dev);
195	return ret;
196}
197
198static void adf_remove(struct pci_dev *pdev)
199{
200	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
201
202	if (!accel_dev) {
203		pr_err("QAT: Driver removal failed\n");
204		return;
205	}
206	adf_dev_down(accel_dev);
207	adf_cleanup_accel(accel_dev);
208	adf_cleanup_pci_dev(accel_dev);
209	kfree(accel_dev);
210}
211
212static void adf_shutdown(struct pci_dev *pdev)
213{
214	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
215
216	adf_dev_down(accel_dev);
217}
218
219static const struct pci_device_id adf_pci_tbl[] = {
220	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_DH895XCC) },
221	{ }
222};
223MODULE_DEVICE_TABLE(pci, adf_pci_tbl);
224
225static struct pci_driver adf_driver = {
226	.id_table = adf_pci_tbl,
227	.name = ADF_DH895XCC_DEVICE_NAME,
228	.probe = adf_probe,
229	.remove = adf_remove,
230	.shutdown = adf_shutdown,
231	.sriov_configure = adf_sriov_configure,
232	.err_handler = &adf_err_handler,
233};
234
235static int __init adfdrv_init(void)
236{
237	request_module("intel_qat");
238
239	if (pci_register_driver(&adf_driver)) {
240		pr_err("QAT: Driver initialization failed\n");
241		return -EFAULT;
242	}
243	return 0;
244}
245
246static void __exit adfdrv_release(void)
247{
248	pci_unregister_driver(&adf_driver);
249}
250
251module_init(adfdrv_init);
252module_exit(adfdrv_release);
253
254MODULE_LICENSE("Dual BSD/GPL");
255MODULE_AUTHOR("Intel");
256MODULE_FIRMWARE(ADF_DH895XCC_FW);
257MODULE_FIRMWARE(ADF_DH895XCC_MMP);
258MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");
259MODULE_VERSION(ADF_DRV_VERSION);
260MODULE_IMPORT_NS("CRYPTO_QAT");