adf_common_drv.h

  1/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
  2/* Copyright(c) 2014 - 2021 Intel Corporation */
  3#ifndef ADF_DRV_H
  4#define ADF_DRV_H
  5
  6#include <linux/list.h>
  7#include <linux/pci.h>
  8#include "adf_accel_devices.h"
  9#include "icp_qat_fw_loader_handle.h"
 10#include "icp_qat_hal.h"
 11
 12#define ADF_MAJOR_VERSION	0
 13#define ADF_MINOR_VERSION	6
 14#define ADF_BUILD_VERSION	0
 15#define ADF_DRV_VERSION		__stringify(ADF_MAJOR_VERSION) "." \
 16				__stringify(ADF_MINOR_VERSION) "." \
 17				__stringify(ADF_BUILD_VERSION)
 18
 19#define ADF_STATUS_RESTARTING 0
 20#define ADF_STATUS_STARTING 1
 21#define ADF_STATUS_CONFIGURED 2
 22#define ADF_STATUS_STARTED 3
 23#define ADF_STATUS_AE_INITIALISED 4
 24#define ADF_STATUS_AE_UCODE_LOADED 5
 25#define ADF_STATUS_AE_STARTED 6
 26#define ADF_STATUS_PF_RUNNING 7
 27#define ADF_STATUS_IRQ_ALLOCATED 8
 28#define ADF_STATUS_CRYPTO_ALGS_REGISTERED 9
 29#define ADF_STATUS_COMP_ALGS_REGISTERED 10
 30
 31enum adf_dev_reset_mode {
 32	ADF_DEV_RESET_ASYNC = 0,
 33	ADF_DEV_RESET_SYNC
 34};
 35
 36enum adf_event {
 37	ADF_EVENT_INIT = 0,
 38	ADF_EVENT_START,
 39	ADF_EVENT_STOP,
 40	ADF_EVENT_SHUTDOWN,
 41	ADF_EVENT_RESTARTING,
 42	ADF_EVENT_RESTARTED,
 43	ADF_EVENT_FATAL_ERROR,
 44};
 45
 46struct service_hndl {
 47	int (*event_hld)(struct adf_accel_dev *accel_dev,
 48			 enum adf_event event);
 49	unsigned long init_status[ADF_DEVS_ARRAY_SIZE];
 50	unsigned long start_status[ADF_DEVS_ARRAY_SIZE];
 51	char *name;
 52	struct list_head list;
 53};
 54
 55int adf_service_register(struct service_hndl *service);
 56int adf_service_unregister(struct service_hndl *service);
 57
 58int adf_dev_up(struct adf_accel_dev *accel_dev, bool init_config);
 59int adf_dev_down(struct adf_accel_dev *accel_dev);
 60int adf_dev_restart(struct adf_accel_dev *accel_dev);
 61
 62void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data);
 63void adf_clean_vf_map(bool);
 64int adf_notify_fatal_error(struct adf_accel_dev *accel_dev);
 65void adf_error_notifier(struct adf_accel_dev *accel_dev);
 66int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev,
 67		       struct adf_accel_dev *pf);
 68void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev,
 69		       struct adf_accel_dev *pf);
 70struct list_head *adf_devmgr_get_head(void);
 71struct adf_accel_dev *adf_devmgr_get_dev_by_id(u32 id);
 72struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev);
 73int adf_devmgr_verify_id(u32 id);
 74void adf_devmgr_get_num_dev(u32 *num);
 75int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev);
 76int adf_dev_started(struct adf_accel_dev *accel_dev);
 77int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev);
 78int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev);
 79int adf_ae_init(struct adf_accel_dev *accel_dev);
 80int adf_ae_shutdown(struct adf_accel_dev *accel_dev);
 81int adf_ae_fw_load(struct adf_accel_dev *accel_dev);
 82void adf_ae_fw_release(struct adf_accel_dev *accel_dev);
 83int adf_ae_start(struct adf_accel_dev *accel_dev);
 84int adf_ae_stop(struct adf_accel_dev *accel_dev);
 85
 86extern const struct pci_error_handlers adf_err_handler;
 87void adf_reset_sbr(struct adf_accel_dev *accel_dev);
 88void adf_reset_flr(struct adf_accel_dev *accel_dev);
 89void adf_dev_restore(struct adf_accel_dev *accel_dev);
 90int adf_init_aer(void);
 91void adf_exit_aer(void);
 92int adf_init_arb(struct adf_accel_dev *accel_dev);
 93void adf_exit_arb(struct adf_accel_dev *accel_dev);
 94void adf_update_ring_arb(struct adf_etr_ring_data *ring);
 95int adf_disable_arb_thd(struct adf_accel_dev *accel_dev, u32 ae, u32 thr);
 96
 97int adf_dev_get(struct adf_accel_dev *accel_dev);
 98void adf_dev_put(struct adf_accel_dev *accel_dev);
 99int adf_dev_in_use(struct adf_accel_dev *accel_dev);
100int adf_init_etr_data(struct adf_accel_dev *accel_dev);
101void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
102int qat_crypto_register(void);
103int qat_crypto_unregister(void);
104int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev);
105struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
106void qat_crypto_put_instance(struct qat_crypto_instance *inst);
107void qat_alg_callback(void *resp);
108void qat_alg_asym_callback(void *resp);
109int qat_algs_register(void);
110void qat_algs_unregister(void);
111int qat_asym_algs_register(void);
112void qat_asym_algs_unregister(void);
113
114struct qat_compression_instance *qat_compression_get_instance_node(int node);
115void qat_compression_put_instance(struct qat_compression_instance *inst);
116int qat_compression_register(void);
117int qat_compression_unregister(void);
118int qat_comp_algs_register(void);
119void qat_comp_algs_unregister(void);
120void qat_comp_alg_callback(void *resp);
121
122int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
123void adf_isr_resource_free(struct adf_accel_dev *accel_dev);
124int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
125void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev);
126
127int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev);
128
129int adf_sysfs_init(struct adf_accel_dev *accel_dev);
130
131int qat_hal_init(struct adf_accel_dev *accel_dev);
132void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle);
133int qat_hal_start(struct icp_qat_fw_loader_handle *handle);
134void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
135		  unsigned int ctx_mask);
136void qat_hal_reset(struct icp_qat_fw_loader_handle *handle);
137int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle);
138void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle,
139			  unsigned char ae, unsigned int ctx_mask);
140int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle,
141			    unsigned int ae);
142int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,
143			   unsigned char ae, enum icp_qat_uof_regtype lm_type,
144			   unsigned char mode);
145int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle,
146			    unsigned char ae, unsigned char mode);
147int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle,
148			   unsigned char ae, unsigned char mode);
149void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle,
150		    unsigned char ae, unsigned int ctx_mask, unsigned int upc);
151void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
152		       unsigned char ae, unsigned int uaddr,
153		       unsigned int words_num, u64 *uword);
154void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
155		     unsigned int uword_addr, unsigned int words_num,
156		     unsigned int *data);
157int qat_hal_get_ins_num(void);
158int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle,
159			unsigned char ae,
160			struct icp_qat_uof_batch_init *lm_init_header);
161int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle,
162		     unsigned char ae, unsigned long ctx_mask,
163		     enum icp_qat_uof_regtype reg_type,
164		     unsigned short reg_num, unsigned int regdata);
165int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle,
166			 unsigned char ae, unsigned long ctx_mask,
167			 enum icp_qat_uof_regtype reg_type,
168			 unsigned short reg_num, unsigned int regdata);
169int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle,
170			 unsigned char ae, unsigned long ctx_mask,
171			 enum icp_qat_uof_regtype reg_type,
172			 unsigned short reg_num, unsigned int regdata);
173int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle,
174		    unsigned char ae, unsigned long ctx_mask,
175		    unsigned short reg_num, unsigned int regdata);
176void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle,
177				unsigned char ae, unsigned char mode);
178int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
179void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle);
180int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, void *addr_ptr,
181		       int mem_size);
182int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle,
183		     void *addr_ptr, u32 mem_size, const char *obj_name);
184int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle,
185			     unsigned int cfg_ae_mask);
186int adf_init_misc_wq(void);
187void adf_exit_misc_wq(void);
188bool adf_misc_wq_queue_work(struct work_struct *work);
189bool adf_misc_wq_queue_delayed_work(struct delayed_work *work,
190				    unsigned long delay);
191void adf_misc_wq_flush(void);
192#if defined(CONFIG_PCI_IOV)
193int adf_sriov_configure(struct pci_dev *pdev, int numvfs);
194void adf_disable_sriov(struct adf_accel_dev *accel_dev);
195void adf_reenable_sriov(struct adf_accel_dev *accel_dev);
196void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask);
197void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev);
198bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev);
199bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr);
200int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev);
201void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
202void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
203void adf_schedule_vf2pf_handler(struct adf_accel_vf_info *vf_info);
204int adf_init_pf_wq(void);
205void adf_exit_pf_wq(void);
206int adf_init_vf_wq(void);
207void adf_exit_vf_wq(void);
208void adf_flush_vf_wq(struct adf_accel_dev *accel_dev);
209#else
210#define adf_sriov_configure NULL
211
212static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev)
213{
214}
215
216static inline void adf_reenable_sriov(struct adf_accel_dev *accel_dev)
217{
218}
219
220static inline int adf_init_pf_wq(void)
221{
222	return 0;
223}
224
225static inline void adf_exit_pf_wq(void)
226{
227}
228
229static inline int adf_init_vf_wq(void)
230{
231	return 0;
232}
233
234static inline void adf_exit_vf_wq(void)
235{
236}
237
238#endif
239
240static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev)
241{
242	struct adf_hw_device_data *hw_data = accel_dev->hw_device;
243	struct adf_bar *pmisc;
244
245	pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
246
247	return pmisc->virt_addr;
248}
249
250static inline void __iomem *adf_get_etr_base(struct adf_accel_dev *accel_dev)
251{
252	struct adf_hw_device_data *hw_data = accel_dev->hw_device;
253	struct adf_bar *etr;
254
255	etr = &GET_BARS(accel_dev)[hw_data->get_etr_bar_id(hw_data)];
256
257	return etr->virt_addr;
258}
259
260static inline void __iomem *adf_get_aram_base(struct adf_accel_dev *accel_dev)
261{
262	struct adf_hw_device_data *hw_data = accel_dev->hw_device;
263	struct adf_bar *param;
264
265	param = &GET_BARS(accel_dev)[hw_data->get_sram_bar_id(hw_data)];
266
267	return param->virt_addr;
268}
269
270#endif