trng.c

  1// SPDX-License-Identifier: GPL-2.0
  2/* Copyright (c) 2019 HiSilicon Limited. */
  3
  4#include <crypto/internal/rng.h>
  5#include <linux/acpi.h>
  6#include <linux/crypto.h>
  7#include <linux/err.h>
  8#include <linux/hw_random.h>
  9#include <linux/io.h>
 10#include <linux/iopoll.h>
 11#include <linux/kernel.h>
 12#include <linux/list.h>
 13#include <linux/module.h>
 14#include <linux/mutex.h>
 15#include <linux/platform_device.h>
 16#include <linux/random.h>
 17
 18#define HISI_TRNG_REG		0x00F0
 19#define HISI_TRNG_BYTES		4
 20#define HISI_TRNG_QUALITY	512
 21#define HISI_TRNG_VERSION	0x01B8
 22#define HISI_TRNG_VER_V1	GENMASK(31, 0)
 23#define SLEEP_US		10
 24#define TIMEOUT_US		10000
 25#define SW_DRBG_NUM_SHIFT	2
 26#define SW_DRBG_KEY_BASE	0x082C
 27#define SW_DRBG_SEED(n)         (SW_DRBG_KEY_BASE - ((n) << SW_DRBG_NUM_SHIFT))
 28#define SW_DRBG_SEED_REGS_NUM	12
 29#define SW_DRBG_SEED_SIZE	48
 30#define SW_DRBG_BLOCKS		0x0830
 31#define SW_DRBG_INIT		0x0834
 32#define SW_DRBG_GEN		0x083c
 33#define SW_DRBG_STATUS		0x0840
 34#define SW_DRBG_BLOCKS_NUM	4095
 35#define SW_DRBG_DATA_BASE	0x0850
 36#define SW_DRBG_DATA_NUM	4
 37#define SW_DRBG_DATA(n)		(SW_DRBG_DATA_BASE - ((n) << SW_DRBG_NUM_SHIFT))
 38#define SW_DRBG_BYTES		16
 39#define SW_DRBG_ENABLE_SHIFT	12
 40#define SEED_SHIFT_24		24
 41#define SEED_SHIFT_16		16
 42#define SEED_SHIFT_8		8
 43#define SW_MAX_RANDOM_BYTES	65520
 44
 45struct hisi_trng_list {
 46	struct mutex lock;
 47	struct list_head list;
 48	bool is_init;
 49};
 50
 51struct hisi_trng {
 52	void __iomem *base;
 53	struct hisi_trng_list *trng_list;
 54	struct list_head list;
 55	struct hwrng rng;
 56	u32 ver;
 57	u32 ctx_num;
 58	/* The bytes of the random number generated since the last seeding. */
 59	u32 random_bytes;
 60	struct mutex lock;
 61};
 62
 63struct hisi_trng_ctx {
 64	struct hisi_trng *trng;
 65};
 66
 67static atomic_t trng_active_devs;
 68static struct hisi_trng_list trng_devices;
 69static int hisi_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait);
 70
 71static int hisi_trng_set_seed(struct hisi_trng *trng, const u8 *seed)
 72{
 73	u32 val, seed_reg, i;
 74	int ret;
 75
 76	writel(0x0, trng->base + SW_DRBG_BLOCKS);
 77
 78	for (i = 0; i < SW_DRBG_SEED_SIZE;
 79	     i += SW_DRBG_SEED_SIZE / SW_DRBG_SEED_REGS_NUM) {
 80		val = seed[i] << SEED_SHIFT_24;
 81		val |= seed[i + 1UL] << SEED_SHIFT_16;
 82		val |= seed[i + 2UL] << SEED_SHIFT_8;
 83		val |= seed[i + 3UL];
 84
 85		seed_reg = (i >> SW_DRBG_NUM_SHIFT) % SW_DRBG_SEED_REGS_NUM;
 86		writel(val, trng->base + SW_DRBG_SEED(seed_reg));
 87	}
 88
 89	writel(SW_DRBG_BLOCKS_NUM | (0x1 << SW_DRBG_ENABLE_SHIFT),
 90	       trng->base + SW_DRBG_BLOCKS);
 91	writel(0x1, trng->base + SW_DRBG_INIT);
 92	ret = readl_relaxed_poll_timeout(trng->base + SW_DRBG_STATUS,
 93					 val, val & BIT(0), SLEEP_US, TIMEOUT_US);
 94	if (ret) {
 95		pr_err("failed to init trng(%d)\n", ret);
 96		return -EIO;
 97	}
 98
 99	trng->random_bytes = 0;
100
101	return 0;
102}
103
104static int hisi_trng_seed(struct crypto_rng *tfm, const u8 *seed,
105			  unsigned int slen)
106{
107	struct hisi_trng_ctx *ctx = crypto_rng_ctx(tfm);
108	struct hisi_trng *trng = ctx->trng;
109	int ret;
110
111	if (slen < SW_DRBG_SEED_SIZE) {
112		pr_err("slen(%u) is not matched with trng(%d)\n", slen,
113			SW_DRBG_SEED_SIZE);
114		return -EINVAL;
115	}
116
117	mutex_lock(&trng->lock);
118	ret = hisi_trng_set_seed(trng, seed);
119	mutex_unlock(&trng->lock);
120
121	return ret;
122}
123
124static int hisi_trng_reseed(struct hisi_trng *trng)
125{
126	u8 seed[SW_DRBG_SEED_SIZE];
127	int size;
128
129	if (!trng->random_bytes)
130		return 0;
131
132	size = hisi_trng_read(&trng->rng, seed, SW_DRBG_SEED_SIZE, false);
133	if (size != SW_DRBG_SEED_SIZE)
134		return -EIO;
135
136	return hisi_trng_set_seed(trng, seed);
137}
138
139static int hisi_trng_get_bytes(struct hisi_trng *trng, u8 *dstn, unsigned int dlen)
140{
141	u32 data[SW_DRBG_DATA_NUM];
142	u32 currsize = 0;
143	u32 val = 0;
144	int ret;
145	u32 i;
146
147	ret = hisi_trng_reseed(trng);
148	if (ret)
149		return ret;
150
151	do {
152		ret = readl_relaxed_poll_timeout(trng->base + SW_DRBG_STATUS,
153						 val, val & BIT(1), SLEEP_US, TIMEOUT_US);
154		if (ret) {
155			pr_err("failed to generate random number(%d)!\n", ret);
156			break;
157		}
158
159		for (i = 0; i < SW_DRBG_DATA_NUM; i++)
160			data[i] = readl(trng->base + SW_DRBG_DATA(i));
161
162		if (dlen - currsize >= SW_DRBG_BYTES) {
163			memcpy(dstn + currsize, data, SW_DRBG_BYTES);
164			currsize += SW_DRBG_BYTES;
165		} else {
166			memcpy(dstn + currsize, data, dlen - currsize);
167			currsize = dlen;
168		}
169
170		trng->random_bytes += SW_DRBG_BYTES;
171		writel(0x1, trng->base + SW_DRBG_GEN);
172	} while (currsize < dlen);
173
174	return ret;
175}
176
177static int hisi_trng_generate(struct crypto_rng *tfm, const u8 *src,
178			      unsigned int slen, u8 *dstn, unsigned int dlen)
179{
180	struct hisi_trng_ctx *ctx = crypto_rng_ctx(tfm);
181	struct hisi_trng *trng = ctx->trng;
182	unsigned int currsize = 0;
183	unsigned int block_size;
184	int ret;
185
186	if (!dstn || !dlen) {
187		pr_err("output is error, dlen %u!\n", dlen);
188		return -EINVAL;
189	}
190
191	do {
192		block_size = min_t(unsigned int, dlen - currsize, SW_MAX_RANDOM_BYTES);
193		mutex_lock(&trng->lock);
194		ret = hisi_trng_get_bytes(trng, dstn + currsize, block_size);
195		mutex_unlock(&trng->lock);
196		if (ret)
197			return ret;
198		currsize += block_size;
199	} while (currsize < dlen);
200
201	return 0;
202}
203
204static int hisi_trng_init(struct crypto_tfm *tfm)
205{
206	struct hisi_trng_ctx *ctx = crypto_tfm_ctx(tfm);
207	struct hisi_trng *trng;
208	u32 ctx_num = ~0;
209
210	mutex_lock(&trng_devices.lock);
211	list_for_each_entry(trng, &trng_devices.list, list) {
212		if (trng->ctx_num < ctx_num) {
213			ctx_num = trng->ctx_num;
214			ctx->trng = trng;
215		}
216	}
217	ctx->trng->ctx_num++;
218	mutex_unlock(&trng_devices.lock);
219
220	return 0;
221}
222
223static void hisi_trng_exit(struct crypto_tfm *tfm)
224{
225	struct hisi_trng_ctx *ctx = crypto_tfm_ctx(tfm);
226
227	mutex_lock(&trng_devices.lock);
228	ctx->trng->ctx_num--;
229	mutex_unlock(&trng_devices.lock);
230}
231
232static int hisi_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
233{
234	struct hisi_trng *trng;
235	int currsize = 0;
236	u32 val = 0;
237	int ret;
238
239	trng = container_of(rng, struct hisi_trng, rng);
240
241	do {
242		ret = readl_poll_timeout(trng->base + HISI_TRNG_REG, val,
243					 val, SLEEP_US, TIMEOUT_US);
244		if (ret)
245			return currsize;
246
247		if (max - currsize >= HISI_TRNG_BYTES) {
248			memcpy(buf + currsize, &val, HISI_TRNG_BYTES);
249			currsize += HISI_TRNG_BYTES;
250			if (currsize == max)
251				return currsize;
252			continue;
253		}
254
255		/* copy remaining bytes */
256		memcpy(buf + currsize, &val, max - currsize);
257		currsize = max;
258	} while (currsize < max);
259
260	return currsize;
261}
262
263static struct rng_alg hisi_trng_alg = {
264	.generate = hisi_trng_generate,
265	.seed =	hisi_trng_seed,
266	.seedsize = SW_DRBG_SEED_SIZE,
267	.base = {
268		.cra_name = "stdrng",
269		.cra_driver_name = "hisi_stdrng",
270		.cra_priority = 300,
271		.cra_ctxsize = sizeof(struct hisi_trng_ctx),
272		.cra_module = THIS_MODULE,
273		.cra_init = hisi_trng_init,
274		.cra_exit = hisi_trng_exit,
275	},
276};
277
278static void hisi_trng_add_to_list(struct hisi_trng *trng)
279{
280	mutex_lock(&trng_devices.lock);
281	list_add_tail(&trng->list, &trng_devices.list);
282	mutex_unlock(&trng_devices.lock);
283}
284
285static int hisi_trng_del_from_list(struct hisi_trng *trng)
286{
287	int ret = -EBUSY;
288
289	mutex_lock(&trng_devices.lock);
290	if (!trng->ctx_num) {
291		list_del(&trng->list);
292		ret = 0;
293	}
294	mutex_unlock(&trng_devices.lock);
295
296	return ret;
297}
298
299static int hisi_trng_probe(struct platform_device *pdev)
300{
301	struct hisi_trng *trng;
302	int ret;
303
304	trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL);
305	if (!trng)
306		return -ENOMEM;
307
308	platform_set_drvdata(pdev, trng);
309
310	trng->base = devm_platform_ioremap_resource(pdev, 0);
311	if (IS_ERR(trng->base))
312		return PTR_ERR(trng->base);
313
314	trng->ctx_num = 0;
315	trng->random_bytes = SW_MAX_RANDOM_BYTES;
316	mutex_init(&trng->lock);
317	trng->ver = readl(trng->base + HISI_TRNG_VERSION);
318	if (!trng_devices.is_init) {
319		INIT_LIST_HEAD(&trng_devices.list);
320		mutex_init(&trng_devices.lock);
321		trng_devices.is_init = true;
322	}
323
324	hisi_trng_add_to_list(trng);
325	if (trng->ver != HISI_TRNG_VER_V1 &&
326	    atomic_inc_return(&trng_active_devs) == 1) {
327		ret = crypto_register_rng(&hisi_trng_alg);
328		if (ret) {
329			dev_err(&pdev->dev,
330				"failed to register crypto(%d)\n", ret);
331			atomic_dec_return(&trng_active_devs);
332			goto err_remove_from_list;
333		}
334	}
335
336	trng->rng.name = pdev->name;
337	trng->rng.read = hisi_trng_read;
338	trng->rng.quality = HISI_TRNG_QUALITY;
339	ret = devm_hwrng_register(&pdev->dev, &trng->rng);
340	if (ret) {
341		dev_err(&pdev->dev, "failed to register hwrng: %d!\n", ret);
342		goto err_crypto_unregister;
343	}
344
345	return ret;
346
347err_crypto_unregister:
348	if (trng->ver != HISI_TRNG_VER_V1 &&
349	    atomic_dec_return(&trng_active_devs) == 0)
350		crypto_unregister_rng(&hisi_trng_alg);
351
352err_remove_from_list:
353	hisi_trng_del_from_list(trng);
354	return ret;
355}
356
357static void hisi_trng_remove(struct platform_device *pdev)
358{
359	struct hisi_trng *trng = platform_get_drvdata(pdev);
360
361	/* Wait until the task is finished */
362	while (hisi_trng_del_from_list(trng))
363		;
364
365	if (trng->ver != HISI_TRNG_VER_V1 &&
366	    atomic_dec_return(&trng_active_devs) == 0)
367		crypto_unregister_rng(&hisi_trng_alg);
368}
369
370static const struct acpi_device_id hisi_trng_acpi_match[] = {
371	{ "HISI02B3", 0 },
372	{ }
373};
374MODULE_DEVICE_TABLE(acpi, hisi_trng_acpi_match);
375
376static struct platform_driver hisi_trng_driver = {
377	.probe		= hisi_trng_probe,
378	.remove         = hisi_trng_remove,
379	.driver		= {
380		.name	= "hisi-trng-v2",
381		.acpi_match_table = ACPI_PTR(hisi_trng_acpi_match),
382	},
383};
384
385module_platform_driver(hisi_trng_driver);
386
387MODULE_LICENSE("GPL v2");
388MODULE_AUTHOR("Weili Qian <qianweili@huawei.com>");
389MODULE_AUTHOR("Zaibo Xu <xuzaibo@huawei.com>");
390MODULE_DESCRIPTION("HiSilicon true random number generator V2 driver");