sun50i-cpufreq-nvmem.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Allwinner CPUFreq nvmem based driver
  4 *
  5 * The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
  6 * provide the OPP framework with required information.
  7 *
  8 * Copyright (C) 2019 Yangtao Li <tiny.windzz@gmail.com>
  9 */
 10
 11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 12
 13#include <linux/arm-smccc.h>
 14#include <linux/cpu.h>
 15#include <linux/module.h>
 16#include <linux/nvmem-consumer.h>
 17#include <linux/of.h>
 18#include <linux/platform_device.h>
 19#include <linux/pm_opp.h>
 20#include <linux/slab.h>
 21
 22#define NVMEM_MASK	0x7
 23#define NVMEM_SHIFT	5
 24
 25#define SUN50I_A100_NVMEM_MASK	0xf
 26#define SUN50I_A100_NVMEM_SHIFT	12
 27
 28static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
 29
 30struct sunxi_cpufreq_data {
 31	u32 (*efuse_xlate)(u32 speedbin);
 32};
 33
 34static u32 sun50i_h6_efuse_xlate(u32 speedbin)
 35{
 36	u32 efuse_value;
 37
 38	efuse_value = (speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
 39
 40	/*
 41	 * We treat unexpected efuse values as if the SoC was from
 42	 * the slowest bin. Expected efuse values are 1-3, slowest
 43	 * to fastest.
 44	 */
 45	if (efuse_value >= 1 && efuse_value <= 3)
 46		return efuse_value - 1;
 47	else
 48		return 0;
 49}
 50
 51static u32 sun50i_a100_efuse_xlate(u32 speedbin)
 52{
 53	u32 efuse_value;
 54
 55	efuse_value = (speedbin >> SUN50I_A100_NVMEM_SHIFT) &
 56		      SUN50I_A100_NVMEM_MASK;
 57
 58	switch (efuse_value) {
 59	case 0b100:
 60		return 2;
 61	case 0b010:
 62		return 1;
 63	default:
 64		return 0;
 65	}
 66}
 67
 68static int get_soc_id_revision(void)
 69{
 70#ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY
 71	return arm_smccc_get_soc_id_revision();
 72#else
 73	return SMCCC_RET_NOT_SUPPORTED;
 74#endif
 75}
 76
 77/*
 78 * Judging by the OPP tables in the vendor BSP, the quality order of the
 79 * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
 80 * 0 and 2 seem identical from the OPP tables' point of view.
 81 */
 82static u32 sun50i_h616_efuse_xlate(u32 speedbin)
 83{
 84	int ver_bits = get_soc_id_revision();
 85	u32 value = 0;
 86
 87	switch (speedbin & 0xffff) {
 88	case 0x2000:
 89		value = 0;
 90		break;
 91	case 0x2400:
 92	case 0x7400:
 93	case 0x2c00:
 94	case 0x7c00:
 95		if (ver_bits != SMCCC_RET_NOT_SUPPORTED && ver_bits <= 1) {
 96			/* ic version A/B */
 97			value = 1;
 98		} else {
 99			/* ic version C and later version */
100			value = 2;
101		}
102		break;
103	case 0x5000:
104	case 0x5400:
105	case 0x6000:
106		value = 3;
107		break;
108	case 0x5c00:
109		value = 4;
110		break;
111	case 0x5d00:
112		value = 0;
113		break;
114	case 0x6c00:
115		value = 5;
116		break;
117	default:
118		pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n",
119			speedbin & 0xffff);
120		value = 0;
121		break;
122	}
123
124	return value;
125}
126
127static struct sunxi_cpufreq_data sun50i_h6_cpufreq_data = {
128	.efuse_xlate = sun50i_h6_efuse_xlate,
129};
130
131static struct sunxi_cpufreq_data sun50i_a100_cpufreq_data = {
132	.efuse_xlate = sun50i_a100_efuse_xlate,
133};
134
135static struct sunxi_cpufreq_data sun50i_h616_cpufreq_data = {
136	.efuse_xlate = sun50i_h616_efuse_xlate,
137};
138
139static const struct of_device_id cpu_opp_match_list[] = {
140	{ .compatible = "allwinner,sun50i-h6-operating-points",
141	  .data = &sun50i_h6_cpufreq_data,
142	},
143	{ .compatible = "allwinner,sun50i-a100-operating-points",
144	  .data = &sun50i_a100_cpufreq_data,
145	},
146	{ .compatible = "allwinner,sun50i-h616-operating-points",
147	  .data = &sun50i_h616_cpufreq_data,
148	},
149	{}
150};
151
152/**
153 * dt_has_supported_hw() - Check if any OPPs use opp-supported-hw
154 *
155 * If we ask the cpufreq framework to use the opp-supported-hw feature, it
156 * will ignore every OPP node without that DT property. If none of the OPPs
157 * have it, the driver will fail probing, due to the lack of OPPs.
158 *
159 * Returns true if we have at least one OPP with the opp-supported-hw property.
160 */
161static bool dt_has_supported_hw(void)
162{
163	bool has_opp_supported_hw = false;
164	struct device *cpu_dev;
165
166	cpu_dev = get_cpu_device(0);
167	if (!cpu_dev)
168		return false;
169
170	struct device_node *np __free(device_node) =
171		dev_pm_opp_of_get_opp_desc_node(cpu_dev);
172	if (!np)
173		return false;
174
175	for_each_child_of_node_scoped(np, opp) {
176		if (of_property_present(opp, "opp-supported-hw")) {
177			has_opp_supported_hw = true;
178			break;
179		}
180	}
181
182	return has_opp_supported_hw;
183}
184
185/**
186 * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
187 *
188 * Returns non-negative speed bin index on success, a negative error
189 * value otherwise.
190 */
191static int sun50i_cpufreq_get_efuse(void)
192{
193	const struct sunxi_cpufreq_data *opp_data;
194	struct nvmem_cell *speedbin_nvmem;
195	const struct of_device_id *match;
196	struct device *cpu_dev;
197	void *speedbin_ptr;
198	u32 speedbin = 0;
199	size_t len;
200	int ret;
201
202	cpu_dev = get_cpu_device(0);
203	if (!cpu_dev)
204		return -ENODEV;
205
206	struct device_node *np __free(device_node) =
207		dev_pm_opp_of_get_opp_desc_node(cpu_dev);
208	if (!np)
209		return -ENOENT;
210
211	match = of_match_node(cpu_opp_match_list, np);
212	if (!match)
213		return -ENOENT;
214
215	opp_data = match->data;
216
217	speedbin_nvmem = of_nvmem_cell_get(np, NULL);
218	if (IS_ERR(speedbin_nvmem))
219		return dev_err_probe(cpu_dev, PTR_ERR(speedbin_nvmem),
220				     "Could not get nvmem cell\n");
221
222	speedbin_ptr = nvmem_cell_read(speedbin_nvmem, &len);
223	nvmem_cell_put(speedbin_nvmem);
224	if (IS_ERR(speedbin_ptr))
225		return PTR_ERR(speedbin_ptr);
226
227	if (len <= 4)
228		memcpy(&speedbin, speedbin_ptr, len);
229	speedbin = le32_to_cpu(speedbin);
230
231	ret = opp_data->efuse_xlate(speedbin);
232
233	kfree(speedbin_ptr);
234
235	return ret;
236};
237
238static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
239{
240	int *opp_tokens;
241	char name[] = "speedXXXXXXXXXXX"; /* Integers can take 11 chars max */
242	unsigned int cpu, supported_hw;
243	struct dev_pm_opp_config config = {};
244	int speed;
245	int ret;
246
247	opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens),
248			     GFP_KERNEL);
249	if (!opp_tokens)
250		return -ENOMEM;
251
252	speed = sun50i_cpufreq_get_efuse();
253	if (speed < 0) {
254		kfree(opp_tokens);
255		return speed;
256	}
257
258	/*
259	 * We need at least one OPP with the "opp-supported-hw" property,
260	 * or else the upper layers will ignore every OPP and will bail out.
261	 */
262	if (dt_has_supported_hw()) {
263		supported_hw = 1U << speed;
264		config.supported_hw = &supported_hw;
265		config.supported_hw_count = 1;
266	}
267
268	snprintf(name, sizeof(name), "speed%d", speed);
269	config.prop_name = name;
270
271	for_each_present_cpu(cpu) {
272		struct device *cpu_dev = get_cpu_device(cpu);
273
274		if (!cpu_dev) {
275			ret = -ENODEV;
276			goto free_opp;
277		}
278
279		ret = dev_pm_opp_set_config(cpu_dev, &config);
280		if (ret < 0)
281			goto free_opp;
282
283		opp_tokens[cpu] = ret;
284	}
285
286	cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
287							  NULL, 0);
288	if (!IS_ERR(cpufreq_dt_pdev)) {
289		platform_set_drvdata(pdev, opp_tokens);
290		return 0;
291	}
292
293	ret = PTR_ERR(cpufreq_dt_pdev);
294	pr_err("Failed to register platform device\n");
295
296free_opp:
297	for_each_present_cpu(cpu)
298		dev_pm_opp_clear_config(opp_tokens[cpu]);
299	kfree(opp_tokens);
300
301	return ret;
302}
303
304static void sun50i_cpufreq_nvmem_remove(struct platform_device *pdev)
305{
306	int *opp_tokens = platform_get_drvdata(pdev);
307	unsigned int cpu;
308
309	platform_device_unregister(cpufreq_dt_pdev);
310
311	for_each_present_cpu(cpu)
312		dev_pm_opp_clear_config(opp_tokens[cpu]);
313
314	kfree(opp_tokens);
315}
316
317static struct platform_driver sun50i_cpufreq_driver = {
318	.probe = sun50i_cpufreq_nvmem_probe,
319	.remove = sun50i_cpufreq_nvmem_remove,
320	.driver = {
321		.name = "sun50i-cpufreq-nvmem",
322	},
323};
324
325static const struct of_device_id sun50i_cpufreq_match_list[] = {
326	{ .compatible = "allwinner,sun50i-h6" },
327	{ .compatible = "allwinner,sun50i-a100" },
328	{ .compatible = "allwinner,sun50i-h616" },
329	{ .compatible = "allwinner,sun50i-h618" },
330	{ .compatible = "allwinner,sun50i-h700" },
331	{}
332};
333MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);
334
335/*
336 * Since the driver depends on nvmem drivers, which may return EPROBE_DEFER,
337 * all the real activity is done in the probe, which may be defered as well.
338 * The init here is only registering the driver and the platform device.
339 */
340static int __init sun50i_cpufreq_init(void)
341{
342	int ret;
343
344	if (!of_machine_device_match(sun50i_cpufreq_match_list))
345		return -ENODEV;
346
347	ret = platform_driver_register(&sun50i_cpufreq_driver);
348	if (unlikely(ret < 0))
349		return ret;
350
351	sun50i_cpufreq_pdev =
352		platform_device_register_simple("sun50i-cpufreq-nvmem",
353						-1, NULL, 0);
354	ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev);
355	if (ret == 0)
356		return 0;
357
358	platform_driver_unregister(&sun50i_cpufreq_driver);
359	return ret;
360}
361module_init(sun50i_cpufreq_init);
362
363static void __exit sun50i_cpufreq_exit(void)
364{
365	platform_device_unregister(sun50i_cpufreq_pdev);
366	platform_driver_unregister(&sun50i_cpufreq_driver);
367}
368module_exit(sun50i_cpufreq_exit);
369
370MODULE_DESCRIPTION("Sun50i-h6 cpufreq driver");
371MODULE_LICENSE("GPL v2");