amd-pstate.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (C) 2022 Advanced Micro Devices, Inc.
  4 *
  5 * Author: Meng Li <li.meng@amd.com>
  6 */
  7
  8#ifndef _LINUX_AMD_PSTATE_H
  9#define _LINUX_AMD_PSTATE_H
 10
 11#include <linux/pm_qos.h>
 12
 13/*********************************************************************
 14 *                        AMD P-state INTERFACE                       *
 15 *********************************************************************/
 16
 17/**
 18 * union perf_cached - A union to cache performance-related data.
 19 * @highest_perf: the maximum performance an individual processor may reach,
 20 *		  assuming ideal conditions
 21 *		  For platforms that support the preferred core feature, the highest_perf value maybe
 22 * 		  configured to any value in the range 166-255 by the firmware (because the preferred
 23 * 		  core ranking is encoded in the highest_perf value). To maintain consistency across
 24 * 		  all platforms, we split the highest_perf and preferred core ranking values into
 25 * 		  cpudata->perf.highest_perf and cpudata->prefcore_ranking.
 26 * @nominal_perf: the maximum sustained performance level of the processor,
 27 *		  assuming ideal operating conditions
 28 * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power
 29 *			   savings are achieved
 30 * @lowest_perf: the absolute lowest performance level of the processor
 31 * @min_limit_perf: Cached value of the performance corresponding to policy->min
 32 * @max_limit_perf: Cached value of the performance corresponding to policy->max
 33 * @bios_min_perf: Cached perf value corresponding to the "Requested CPU Min Frequency" BIOS option
 34 */
 35union perf_cached {
 36	struct {
 37		u8	highest_perf;
 38		u8	nominal_perf;
 39		u8	lowest_nonlinear_perf;
 40		u8	lowest_perf;
 41		u8	min_limit_perf;
 42		u8	max_limit_perf;
 43		u8	bios_min_perf;
 44	};
 45	u64	val;
 46};
 47
 48/**
 49 * struct  amd_aperf_mperf
 50 * @aperf: actual performance frequency clock count
 51 * @mperf: maximum performance frequency clock count
 52 * @tsc:   time stamp counter
 53 */
 54struct amd_aperf_mperf {
 55	u64 aperf;
 56	u64 mperf;
 57	u64 tsc;
 58};
 59
 60/**
 61 * struct amd_cpudata - private CPU data for AMD P-State
 62 * @cpu: CPU number
 63 * @req: constraint request to apply
 64 * @cppc_req_cached: cached performance request hints
 65 * @perf: cached performance-related data
 66 * @prefcore_ranking: the preferred core ranking, the higher value indicates a higher
 67 * 		  priority.
 68 * @min_limit_freq: Cached value of policy->min (in khz)
 69 * @max_limit_freq: Cached value of policy->max (in khz)
 70 * @nominal_freq: the frequency (in khz) that mapped to nominal_perf
 71 * @lowest_nonlinear_freq: the frequency (in khz) that mapped to lowest_nonlinear_perf
 72 * @cur: Difference of Aperf/Mperf/tsc count between last and current sample
 73 * @prev: Last Aperf/Mperf/tsc count value read from register
 74 * @freq: current cpu frequency value (in khz)
 75 * @boost_supported: check whether the Processor or SBIOS supports boost mode
 76 * @hw_prefcore: check whether HW supports preferred core featue.
 77 * 		  Only when hw_prefcore and early prefcore param are true,
 78 * 		  AMD P-State driver supports preferred core featue.
 79 * @epp_cached: Cached CPPC energy-performance preference value
 80 * @policy: Cpufreq policy value
 81 *
 82 * The amd_cpudata is key private data for each CPU thread in AMD P-State, and
 83 * represents all the attributes and goals that AMD P-State requests at runtime.
 84 */
 85struct amd_cpudata {
 86	int	cpu;
 87
 88	struct	freq_qos_request req[2];
 89	u64	cppc_req_cached;
 90
 91	union perf_cached perf;
 92
 93	u8	prefcore_ranking;
 94	u32	min_limit_freq;
 95	u32	max_limit_freq;
 96	u32	nominal_freq;
 97	u32	lowest_nonlinear_freq;
 98
 99	struct amd_aperf_mperf cur;
100	struct amd_aperf_mperf prev;
101
102	u64	freq;
103	bool	boost_supported;
104	bool	hw_prefcore;
105
106	/* EPP feature related attributes*/
107	u32	policy;
108	bool	suspended;
109	u8	epp_default;
110};
111
112/*
113 * enum amd_pstate_mode - driver working mode of amd pstate
114 */
115enum amd_pstate_mode {
116	AMD_PSTATE_UNDEFINED = 0,
117	AMD_PSTATE_DISABLE,
118	AMD_PSTATE_PASSIVE,
119	AMD_PSTATE_ACTIVE,
120	AMD_PSTATE_GUIDED,
121	AMD_PSTATE_MAX,
122};
123const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode);
124int amd_pstate_get_status(void);
125int amd_pstate_update_status(const char *buf, size_t size);
126
127#endif /* _LINUX_AMD_PSTATE_H */