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pxie-6738.c
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linux-6.19.14/drivers/comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c
1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c 4 * List of valid routes for specific NI boards. 5 * 6 * COMEDI - Linux Control and Measurement Device Interface 7 * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 20/* 21 * The contents of this file are generated using the tools in 22 * comedi/drivers/ni_routing/tools 23 * 24 * Please use those tools to help maintain the contents of this file. 25 */ 26 27#include "../ni_device_routes.h" 28#include "all.h" 29 30struct ni_device_routes ni_pxie_6738_device_routes = { 31 .device = "pxie-6738", 32 .routes = (struct ni_route_set[]){ 33 { 34 .dest = NI_PFI(0), 35 .src = (int[]){ 36 TRIGGER_LINE(0), 37 TRIGGER_LINE(1), 38 TRIGGER_LINE(2), 39 TRIGGER_LINE(3), 40 TRIGGER_LINE(4), 41 TRIGGER_LINE(5), 42 TRIGGER_LINE(6), 43 TRIGGER_LINE(7), 44 NI_CtrSource(0), 45 NI_CtrSource(1), 46 NI_CtrSource(2), 47 NI_CtrSource(3), 48 NI_CtrGate(0), 49 NI_CtrGate(1), 50 NI_CtrGate(2), 51 NI_CtrGate(3), 52 NI_CtrArmStartTrigger(0), 53 NI_CtrArmStartTrigger(1), 54 NI_CtrArmStartTrigger(2), 55 NI_CtrArmStartTrigger(3), 56 NI_CtrInternalOutput(0), 57 NI_CtrInternalOutput(1), 58 NI_CtrInternalOutput(2), 59 NI_CtrInternalOutput(3), 60 NI_CtrSampleClock(0), 61 NI_CtrSampleClock(1), 62 NI_CtrSampleClock(2), 63 NI_CtrSampleClock(3), 64 NI_AO_SampleClock, 65 NI_AO_StartTrigger, 66 NI_AO_PauseTrigger, 67 NI_DI_SampleClock, 68 NI_DI_StartTrigger, 69 NI_DI_ReferenceTrigger, 70 NI_DI_PauseTrigger, 71 NI_DO_SampleClock, 72 NI_DO_StartTrigger, 73 NI_DO_PauseTrigger, 74 NI_10MHzRefClock, 75 NI_ChangeDetectionEvent, 76 NI_WatchdogExpiredEvent, 77 0, /* Termination */ 78 } 79 }, 80 { 81 .dest = NI_PFI(1), 82 .src = (int[]){ 83 TRIGGER_LINE(0), 84 TRIGGER_LINE(1), 85 TRIGGER_LINE(2), 86 TRIGGER_LINE(3), 87 TRIGGER_LINE(4), 88 TRIGGER_LINE(5), 89 TRIGGER_LINE(6), 90 TRIGGER_LINE(7), 91 NI_CtrSource(0), 92 NI_CtrSource(1), 93 NI_CtrSource(2), 94 NI_CtrSource(3), 95 NI_CtrGate(0), 96 NI_CtrGate(1), 97 NI_CtrGate(2), 98 NI_CtrGate(3), 99 NI_CtrArmStartTrigger(0), 100 NI_CtrArmStartTrigger(1), 101 NI_CtrArmStartTrigger(2), 102 NI_CtrArmStartTrigger(3), 103 NI_CtrInternalOutput(0), 104 NI_CtrInternalOutput(1), 105 NI_CtrInternalOutput(2), 106 NI_CtrInternalOutput(3), 107 NI_CtrSampleClock(0), 108 NI_CtrSampleClock(1), 109 NI_CtrSampleClock(2), 110 NI_CtrSampleClock(3), 111 NI_AO_SampleClock, 112 NI_AO_StartTrigger, 113 NI_AO_PauseTrigger, 114 NI_DI_SampleClock, 115 NI_DI_StartTrigger, 116 NI_DI_ReferenceTrigger, 117 NI_DI_PauseTrigger, 118 NI_DO_SampleClock, 119 NI_DO_StartTrigger, 120 NI_DO_PauseTrigger, 121 NI_10MHzRefClock, 122 NI_ChangeDetectionEvent, 123 NI_WatchdogExpiredEvent, 124 0, /* Termination */ 125 } 126 }, 127 { 128 .dest = NI_PFI(2), 129 .src = (int[]){ 130 TRIGGER_LINE(0), 131 TRIGGER_LINE(1), 132 TRIGGER_LINE(2), 133 TRIGGER_LINE(3), 134 TRIGGER_LINE(4), 135 TRIGGER_LINE(5), 136 TRIGGER_LINE(6), 137 TRIGGER_LINE(7), 138 NI_CtrSource(0), 139 NI_CtrSource(1), 140 NI_CtrSource(2), 141 NI_CtrSource(3), 142 NI_CtrGate(0), 143 NI_CtrGate(1), 144 NI_CtrGate(2), 145 NI_CtrGate(3), 146 NI_CtrArmStartTrigger(0), 147 NI_CtrArmStartTrigger(1), 148 NI_CtrArmStartTrigger(2), 149 NI_CtrArmStartTrigger(3), 150 NI_CtrInternalOutput(0), 151 NI_CtrInternalOutput(1), 152 NI_CtrInternalOutput(2), 153 NI_CtrInternalOutput(3), 154 NI_CtrSampleClock(0), 155 NI_CtrSampleClock(1), 156 NI_CtrSampleClock(2), 157 NI_CtrSampleClock(3), 158 NI_AO_SampleClock, 159 NI_AO_StartTrigger, 160 NI_AO_PauseTrigger, 161 NI_DI_SampleClock, 162 NI_DI_StartTrigger, 163 NI_DI_ReferenceTrigger, 164 NI_DI_PauseTrigger, 165 NI_DO_SampleClock, 166 NI_DO_StartTrigger, 167 NI_DO_PauseTrigger, 168 NI_10MHzRefClock, 169 NI_ChangeDetectionEvent, 170 NI_WatchdogExpiredEvent, 171 0, /* Termination */ 172 } 173 }, 174 { 175 .dest = NI_PFI(3), 176 .src = (int[]){ 177 TRIGGER_LINE(0), 178 TRIGGER_LINE(1), 179 TRIGGER_LINE(2), 180 TRIGGER_LINE(3), 181 TRIGGER_LINE(4), 182 TRIGGER_LINE(5), 183 TRIGGER_LINE(6), 184 TRIGGER_LINE(7), 185 NI_CtrSource(0), 186 NI_CtrSource(1), 187 NI_CtrSource(2), 188 NI_CtrSource(3), 189 NI_CtrGate(0), 190 NI_CtrGate(1), 191 NI_CtrGate(2), 192 NI_CtrGate(3), 193 NI_CtrArmStartTrigger(0), 194 NI_CtrArmStartTrigger(1), 195 NI_CtrArmStartTrigger(2), 196 NI_CtrArmStartTrigger(3), 197 NI_CtrInternalOutput(0), 198 NI_CtrInternalOutput(1), 199 NI_CtrInternalOutput(2), 200 NI_CtrInternalOutput(3), 201 NI_CtrSampleClock(0), 202 NI_CtrSampleClock(1), 203 NI_CtrSampleClock(2), 204 NI_CtrSampleClock(3), 205 NI_AO_SampleClock, 206 NI_AO_StartTrigger, 207 NI_AO_PauseTrigger, 208 NI_DI_SampleClock, 209 NI_DI_StartTrigger, 210 NI_DI_ReferenceTrigger, 211 NI_DI_PauseTrigger, 212 NI_DO_SampleClock, 213 NI_DO_StartTrigger, 214 NI_DO_PauseTrigger, 215 NI_10MHzRefClock, 216 NI_ChangeDetectionEvent, 217 NI_WatchdogExpiredEvent, 218 0, /* Termination */ 219 } 220 }, 221 { 222 .dest = NI_PFI(4), 223 .src = (int[]){ 224 TRIGGER_LINE(0), 225 TRIGGER_LINE(1), 226 TRIGGER_LINE(2), 227 TRIGGER_LINE(3), 228 TRIGGER_LINE(4), 229 TRIGGER_LINE(5), 230 TRIGGER_LINE(6), 231 TRIGGER_LINE(7), 232 NI_CtrSource(0), 233 NI_CtrSource(1), 234 NI_CtrSource(2), 235 NI_CtrSource(3), 236 NI_CtrGate(0), 237 NI_CtrGate(1), 238 NI_CtrGate(2), 239 NI_CtrGate(3), 240 NI_CtrArmStartTrigger(0), 241 NI_CtrArmStartTrigger(1), 242 NI_CtrArmStartTrigger(2), 243 NI_CtrArmStartTrigger(3), 244 NI_CtrInternalOutput(0), 245 NI_CtrInternalOutput(1), 246 NI_CtrInternalOutput(2), 247 NI_CtrInternalOutput(3), 248 NI_CtrSampleClock(0), 249 NI_CtrSampleClock(1), 250 NI_CtrSampleClock(2), 251 NI_CtrSampleClock(3), 252 NI_AO_SampleClock, 253 NI_AO_StartTrigger, 254 NI_AO_PauseTrigger, 255 NI_DI_SampleClock, 256 NI_DI_StartTrigger, 257 NI_DI_ReferenceTrigger, 258 NI_DI_PauseTrigger, 259 NI_DO_SampleClock, 260 NI_DO_StartTrigger, 261 NI_DO_PauseTrigger, 262 NI_10MHzRefClock, 263 NI_ChangeDetectionEvent, 264 NI_WatchdogExpiredEvent, 265 0, /* Termination */ 266 } 267 }, 268 { 269 .dest = NI_PFI(5), 270 .src = (int[]){ 271 TRIGGER_LINE(0), 272 TRIGGER_LINE(1), 273 TRIGGER_LINE(2), 274 TRIGGER_LINE(3), 275 TRIGGER_LINE(4), 276 TRIGGER_LINE(5), 277 TRIGGER_LINE(6), 278 TRIGGER_LINE(7), 279 NI_CtrSource(0), 280 NI_CtrSource(1), 281 NI_CtrSource(2), 282 NI_CtrSource(3), 283 NI_CtrGate(0), 284 NI_CtrGate(1), 285 NI_CtrGate(2), 286 NI_CtrGate(3), 287 NI_CtrArmStartTrigger(0), 288 NI_CtrArmStartTrigger(1), 289 NI_CtrArmStartTrigger(2), 290 NI_CtrArmStartTrigger(3), 291 NI_CtrInternalOutput(0), 292 NI_CtrInternalOutput(1), 293 NI_CtrInternalOutput(2), 294 NI_CtrInternalOutput(3), 295 NI_CtrSampleClock(0), 296 NI_CtrSampleClock(1), 297 NI_CtrSampleClock(2), 298 NI_CtrSampleClock(3), 299 NI_AO_SampleClock, 300 NI_AO_StartTrigger, 301 NI_AO_PauseTrigger, 302 NI_DI_SampleClock, 303 NI_DI_StartTrigger, 304 NI_DI_ReferenceTrigger, 305 NI_DI_PauseTrigger, 306 NI_DO_SampleClock, 307 NI_DO_StartTrigger, 308 NI_DO_PauseTrigger, 309 NI_10MHzRefClock, 310 NI_ChangeDetectionEvent, 311 NI_WatchdogExpiredEvent, 312 0, /* Termination */ 313 } 314 }, 315 { 316 .dest = NI_PFI(6), 317 .src = (int[]){ 318 TRIGGER_LINE(0), 319 TRIGGER_LINE(1), 320 TRIGGER_LINE(2), 321 TRIGGER_LINE(3), 322 TRIGGER_LINE(4), 323 TRIGGER_LINE(5), 324 TRIGGER_LINE(6), 325 TRIGGER_LINE(7), 326 NI_CtrSource(0), 327 NI_CtrSource(1), 328 NI_CtrSource(2), 329 NI_CtrSource(3), 330 NI_CtrGate(0), 331 NI_CtrGate(1), 332 NI_CtrGate(2), 333 NI_CtrGate(3), 334 NI_CtrArmStartTrigger(0), 335 NI_CtrArmStartTrigger(1), 336 NI_CtrArmStartTrigger(2), 337 NI_CtrArmStartTrigger(3), 338 NI_CtrInternalOutput(0), 339 NI_CtrInternalOutput(1), 340 NI_CtrInternalOutput(2), 341 NI_CtrInternalOutput(3), 342 NI_CtrSampleClock(0), 343 NI_CtrSampleClock(1), 344 NI_CtrSampleClock(2), 345 NI_CtrSampleClock(3), 346 NI_AO_SampleClock, 347 NI_AO_StartTrigger, 348 NI_AO_PauseTrigger, 349 NI_DI_SampleClock, 350 NI_DI_StartTrigger, 351 NI_DI_ReferenceTrigger, 352 NI_DI_PauseTrigger, 353 NI_DO_SampleClock, 354 NI_DO_StartTrigger, 355 NI_DO_PauseTrigger, 356 NI_10MHzRefClock, 357 NI_ChangeDetectionEvent, 358 NI_WatchdogExpiredEvent, 359 0, /* Termination */ 360 } 361 }, 362 { 363 .dest = NI_PFI(7), 364 .src = (int[]){ 365 TRIGGER_LINE(0), 366 TRIGGER_LINE(1), 367 TRIGGER_LINE(2), 368 TRIGGER_LINE(3), 369 TRIGGER_LINE(4), 370 TRIGGER_LINE(5), 371 TRIGGER_LINE(6), 372 TRIGGER_LINE(7), 373 NI_CtrSource(0), 374 NI_CtrSource(1), 375 NI_CtrSource(2), 376 NI_CtrSource(3), 377 NI_CtrGate(0), 378 NI_CtrGate(1), 379 NI_CtrGate(2), 380 NI_CtrGate(3), 381 NI_CtrArmStartTrigger(0), 382 NI_CtrArmStartTrigger(1), 383 NI_CtrArmStartTrigger(2), 384 NI_CtrArmStartTrigger(3), 385 NI_CtrInternalOutput(0), 386 NI_CtrInternalOutput(1), 387 NI_CtrInternalOutput(2), 388 NI_CtrInternalOutput(3), 389 NI_CtrSampleClock(0), 390 NI_CtrSampleClock(1), 391 NI_CtrSampleClock(2), 392 NI_CtrSampleClock(3), 393 NI_AO_SampleClock, 394 NI_AO_StartTrigger, 395 NI_AO_PauseTrigger, 396 NI_DI_SampleClock, 397 NI_DI_StartTrigger, 398 NI_DI_ReferenceTrigger, 399 NI_DI_PauseTrigger, 400 NI_DO_SampleClock, 401 NI_DO_StartTrigger, 402 NI_DO_PauseTrigger, 403 NI_10MHzRefClock, 404 NI_ChangeDetectionEvent, 405 NI_WatchdogExpiredEvent, 406 0, /* Termination */ 407 } 408 }, 409 { 410 .dest = TRIGGER_LINE(0), 411 .src = (int[]){ 412 NI_PFI(0), 413 NI_PFI(1), 414 NI_PFI(2), 415 NI_PFI(3), 416 NI_PFI(4), 417 NI_PFI(5), 418 NI_PFI(6), 419 NI_PFI(7), 420 NI_CtrSource(0), 421 NI_CtrSource(1), 422 NI_CtrSource(2), 423 NI_CtrSource(3), 424 NI_CtrGate(0), 425 NI_CtrGate(1), 426 NI_CtrGate(2), 427 NI_CtrGate(3), 428 NI_CtrZ(0), 429 NI_CtrZ(1), 430 NI_CtrZ(2), 431 NI_CtrZ(3), 432 NI_CtrArmStartTrigger(0), 433 NI_CtrArmStartTrigger(1), 434 NI_CtrArmStartTrigger(2), 435 NI_CtrArmStartTrigger(3), 436 NI_CtrInternalOutput(0), 437 NI_CtrInternalOutput(1), 438 NI_CtrInternalOutput(2), 439 NI_CtrInternalOutput(3), 440 NI_CtrSampleClock(0), 441 NI_CtrSampleClock(1), 442 NI_CtrSampleClock(2), 443 NI_CtrSampleClock(3), 444 NI_AO_SampleClock, 445 NI_AO_StartTrigger, 446 NI_AO_PauseTrigger, 447 NI_DI_SampleClock, 448 NI_DI_StartTrigger, 449 NI_DI_ReferenceTrigger, 450 NI_DI_PauseTrigger, 451 NI_DO_SampleClock, 452 NI_DO_StartTrigger, 453 NI_DO_PauseTrigger, 454 NI_10MHzRefClock, 455 NI_ChangeDetectionEvent, 456 NI_WatchdogExpiredEvent, 457 0, /* Termination */ 458 } 459 }, 460 { 461 .dest = TRIGGER_LINE(1), 462 .src = (int[]){ 463 NI_PFI(0), 464 NI_PFI(1), 465 NI_PFI(2), 466 NI_PFI(3), 467 NI_PFI(4), 468 NI_PFI(5), 469 NI_PFI(6), 470 NI_PFI(7), 471 NI_CtrSource(0), 472 NI_CtrSource(1), 473 NI_CtrSource(2), 474 NI_CtrSource(3), 475 NI_CtrGate(0), 476 NI_CtrGate(1), 477 NI_CtrGate(2), 478 NI_CtrGate(3), 479 NI_CtrZ(0), 480 NI_CtrZ(1), 481 NI_CtrZ(2), 482 NI_CtrZ(3), 483 NI_CtrArmStartTrigger(0), 484 NI_CtrArmStartTrigger(1), 485 NI_CtrArmStartTrigger(2), 486 NI_CtrArmStartTrigger(3), 487 NI_CtrInternalOutput(0), 488 NI_CtrInternalOutput(1), 489 NI_CtrInternalOutput(2), 490 NI_CtrInternalOutput(3), 491 NI_CtrSampleClock(0), 492 NI_CtrSampleClock(1), 493 NI_CtrSampleClock(2), 494 NI_CtrSampleClock(3), 495 NI_AO_SampleClock, 496 NI_AO_StartTrigger, 497 NI_AO_PauseTrigger, 498 NI_DI_SampleClock, 499 NI_DI_StartTrigger, 500 NI_DI_ReferenceTrigger, 501 NI_DI_PauseTrigger, 502 NI_DO_SampleClock, 503 NI_DO_StartTrigger, 504 NI_DO_PauseTrigger, 505 NI_10MHzRefClock, 506 NI_ChangeDetectionEvent, 507 NI_WatchdogExpiredEvent, 508 0, /* Termination */ 509 } 510 }, 511 { 512 .dest = TRIGGER_LINE(2), 513 .src = (int[]){ 514 NI_PFI(0), 515 NI_PFI(1), 516 NI_PFI(2), 517 NI_PFI(3), 518 NI_PFI(4), 519 NI_PFI(5), 520 NI_PFI(6), 521 NI_PFI(7), 522 NI_CtrSource(0), 523 NI_CtrSource(1), 524 NI_CtrSource(2), 525 NI_CtrSource(3), 526 NI_CtrGate(0), 527 NI_CtrGate(1), 528 NI_CtrGate(2), 529 NI_CtrGate(3), 530 NI_CtrZ(0), 531 NI_CtrZ(1), 532 NI_CtrZ(2), 533 NI_CtrZ(3), 534 NI_CtrArmStartTrigger(0), 535 NI_CtrArmStartTrigger(1), 536 NI_CtrArmStartTrigger(2), 537 NI_CtrArmStartTrigger(3), 538 NI_CtrInternalOutput(0), 539 NI_CtrInternalOutput(1), 540 NI_CtrInternalOutput(2), 541 NI_CtrInternalOutput(3), 542 NI_CtrSampleClock(0), 543 NI_CtrSampleClock(1), 544 NI_CtrSampleClock(2), 545 NI_CtrSampleClock(3), 546 NI_AO_SampleClock, 547 NI_AO_StartTrigger, 548 NI_AO_PauseTrigger, 549 NI_DI_SampleClock, 550 NI_DI_StartTrigger, 551 NI_DI_ReferenceTrigger, 552 NI_DI_PauseTrigger, 553 NI_DO_SampleClock, 554 NI_DO_StartTrigger, 555 NI_DO_PauseTrigger, 556 NI_10MHzRefClock, 557 NI_ChangeDetectionEvent, 558 NI_WatchdogExpiredEvent, 559 0, /* Termination */ 560 } 561 }, 562 { 563 .dest = TRIGGER_LINE(3), 564 .src = (int[]){ 565 NI_PFI(0), 566 NI_PFI(1), 567 NI_PFI(2), 568 NI_PFI(3), 569 NI_PFI(4), 570 NI_PFI(5), 571 NI_PFI(6), 572 NI_PFI(7), 573 NI_CtrSource(0), 574 NI_CtrSource(1), 575 NI_CtrSource(2), 576 NI_CtrSource(3), 577 NI_CtrGate(0), 578 NI_CtrGate(1), 579 NI_CtrGate(2), 580 NI_CtrGate(3), 581 NI_CtrZ(0), 582 NI_CtrZ(1), 583 NI_CtrZ(2), 584 NI_CtrZ(3), 585 NI_CtrArmStartTrigger(0), 586 NI_CtrArmStartTrigger(1), 587 NI_CtrArmStartTrigger(2), 588 NI_CtrArmStartTrigger(3), 589 NI_CtrInternalOutput(0), 590 NI_CtrInternalOutput(1), 591 NI_CtrInternalOutput(2), 592 NI_CtrInternalOutput(3), 593 NI_CtrSampleClock(0), 594 NI_CtrSampleClock(1), 595 NI_CtrSampleClock(2), 596 NI_CtrSampleClock(3), 597 NI_AO_SampleClock, 598 NI_AO_StartTrigger, 599 NI_AO_PauseTrigger, 600 NI_DI_SampleClock, 601 NI_DI_StartTrigger, 602 NI_DI_ReferenceTrigger, 603 NI_DI_PauseTrigger, 604 NI_DO_SampleClock, 605 NI_DO_StartTrigger, 606 NI_DO_PauseTrigger, 607 NI_10MHzRefClock, 608 NI_ChangeDetectionEvent, 609 NI_WatchdogExpiredEvent, 610 0, /* Termination */ 611 } 612 }, 613 { 614 .dest = TRIGGER_LINE(4), 615 .src = (int[]){ 616 NI_PFI(0), 617 NI_PFI(1), 618 NI_PFI(2), 619 NI_PFI(3), 620 NI_PFI(4), 621 NI_PFI(5), 622 NI_PFI(6), 623 NI_PFI(7), 624 NI_CtrSource(0), 625 NI_CtrSource(1), 626 NI_CtrSource(2), 627 NI_CtrSource(3), 628 NI_CtrGate(0), 629 NI_CtrGate(1), 630 NI_CtrGate(2), 631 NI_CtrGate(3), 632 NI_CtrZ(0), 633 NI_CtrZ(1), 634 NI_CtrZ(2), 635 NI_CtrZ(3), 636 NI_CtrArmStartTrigger(0), 637 NI_CtrArmStartTrigger(1), 638 NI_CtrArmStartTrigger(2), 639 NI_CtrArmStartTrigger(3), 640 NI_CtrInternalOutput(0), 641 NI_CtrInternalOutput(1), 642 NI_CtrInternalOutput(2), 643 NI_CtrInternalOutput(3), 644 NI_CtrSampleClock(0), 645 NI_CtrSampleClock(1), 646 NI_CtrSampleClock(2), 647 NI_CtrSampleClock(3), 648 NI_AO_SampleClock, 649 NI_AO_StartTrigger, 650 NI_AO_PauseTrigger, 651 NI_DI_SampleClock, 652 NI_DI_StartTrigger, 653 NI_DI_ReferenceTrigger, 654 NI_DI_PauseTrigger, 655 NI_DO_SampleClock, 656 NI_DO_StartTrigger, 657 NI_DO_PauseTrigger, 658 NI_10MHzRefClock, 659 NI_ChangeDetectionEvent, 660 NI_WatchdogExpiredEvent, 661 0, /* Termination */ 662 } 663 }, 664 { 665 .dest = TRIGGER_LINE(5), 666 .src = (int[]){ 667 NI_PFI(0), 668 NI_PFI(1), 669 NI_PFI(2), 670 NI_PFI(3), 671 NI_PFI(4), 672 NI_PFI(5), 673 NI_PFI(6), 674 NI_PFI(7), 675 NI_CtrSource(0), 676 NI_CtrSource(1), 677 NI_CtrSource(2), 678 NI_CtrSource(3), 679 NI_CtrGate(0), 680 NI_CtrGate(1), 681 NI_CtrGate(2), 682 NI_CtrGate(3), 683 NI_CtrZ(0), 684 NI_CtrZ(1), 685 NI_CtrZ(2), 686 NI_CtrZ(3), 687 NI_CtrArmStartTrigger(0), 688 NI_CtrArmStartTrigger(1), 689 NI_CtrArmStartTrigger(2), 690 NI_CtrArmStartTrigger(3), 691 NI_CtrInternalOutput(0), 692 NI_CtrInternalOutput(1), 693 NI_CtrInternalOutput(2), 694 NI_CtrInternalOutput(3), 695 NI_CtrSampleClock(0), 696 NI_CtrSampleClock(1), 697 NI_CtrSampleClock(2), 698 NI_CtrSampleClock(3), 699 NI_AO_SampleClock, 700 NI_AO_StartTrigger, 701 NI_AO_PauseTrigger, 702 NI_DI_SampleClock, 703 NI_DI_StartTrigger, 704 NI_DI_ReferenceTrigger, 705 NI_DI_PauseTrigger, 706 NI_DO_SampleClock, 707 NI_DO_StartTrigger, 708 NI_DO_PauseTrigger, 709 NI_10MHzRefClock, 710 NI_ChangeDetectionEvent, 711 NI_WatchdogExpiredEvent, 712 0, /* Termination */ 713 } 714 }, 715 { 716 .dest = TRIGGER_LINE(6), 717 .src = (int[]){ 718 NI_PFI(0), 719 NI_PFI(1), 720 NI_PFI(2), 721 NI_PFI(3), 722 NI_PFI(4), 723 NI_PFI(5), 724 NI_PFI(6), 725 NI_PFI(7), 726 NI_CtrSource(0), 727 NI_CtrSource(1), 728 NI_CtrSource(2), 729 NI_CtrSource(3), 730 NI_CtrGate(0), 731 NI_CtrGate(1), 732 NI_CtrGate(2), 733 NI_CtrGate(3), 734 NI_CtrZ(0), 735 NI_CtrZ(1), 736 NI_CtrZ(2), 737 NI_CtrZ(3), 738 NI_CtrArmStartTrigger(0), 739 NI_CtrArmStartTrigger(1), 740 NI_CtrArmStartTrigger(2), 741 NI_CtrArmStartTrigger(3), 742 NI_CtrInternalOutput(0), 743 NI_CtrInternalOutput(1), 744 NI_CtrInternalOutput(2), 745 NI_CtrInternalOutput(3), 746 NI_CtrSampleClock(0), 747 NI_CtrSampleClock(1), 748 NI_CtrSampleClock(2), 749 NI_CtrSampleClock(3), 750 NI_AO_SampleClock, 751 NI_AO_StartTrigger, 752 NI_AO_PauseTrigger, 753 NI_DI_SampleClock, 754 NI_DI_StartTrigger, 755 NI_DI_ReferenceTrigger, 756 NI_DI_PauseTrigger, 757 NI_DO_SampleClock, 758 NI_DO_StartTrigger, 759 NI_DO_PauseTrigger, 760 NI_10MHzRefClock, 761 NI_ChangeDetectionEvent, 762 NI_WatchdogExpiredEvent, 763 0, /* Termination */ 764 } 765 }, 766 { 767 .dest = TRIGGER_LINE(7), 768 .src = (int[]){ 769 NI_PFI(0), 770 NI_PFI(1), 771 NI_PFI(2), 772 NI_PFI(3), 773 NI_PFI(4), 774 NI_PFI(5), 775 NI_PFI(6), 776 NI_PFI(7), 777 NI_CtrSource(0), 778 NI_CtrSource(1), 779 NI_CtrSource(2), 780 NI_CtrSource(3), 781 NI_CtrGate(0), 782 NI_CtrGate(1), 783 NI_CtrGate(2), 784 NI_CtrGate(3), 785 NI_CtrZ(0), 786 NI_CtrZ(1), 787 NI_CtrZ(2), 788 NI_CtrZ(3), 789 NI_CtrArmStartTrigger(0), 790 NI_CtrArmStartTrigger(1), 791 NI_CtrArmStartTrigger(2), 792 NI_CtrArmStartTrigger(3), 793 NI_CtrInternalOutput(0), 794 NI_CtrInternalOutput(1), 795 NI_CtrInternalOutput(2), 796 NI_CtrInternalOutput(3), 797 NI_CtrSampleClock(0), 798 NI_CtrSampleClock(1), 799 NI_CtrSampleClock(2), 800 NI_CtrSampleClock(3), 801 NI_AO_SampleClock, 802 NI_AO_StartTrigger, 803 NI_AO_PauseTrigger, 804 NI_DI_SampleClock, 805 NI_DI_StartTrigger, 806 NI_DI_ReferenceTrigger, 807 NI_DI_PauseTrigger, 808 NI_DO_SampleClock, 809 NI_DO_StartTrigger, 810 NI_DO_PauseTrigger, 811 NI_10MHzRefClock, 812 NI_ChangeDetectionEvent, 813 NI_WatchdogExpiredEvent, 814 0, /* Termination */ 815 } 816 }, 817 { 818 .dest = NI_CtrSource(0), 819 .src = (int[]){ 820 NI_PFI(0), 821 NI_PFI(1), 822 NI_PFI(2), 823 NI_PFI(3), 824 NI_PFI(4), 825 NI_PFI(5), 826 NI_PFI(6), 827 NI_PFI(7), 828 TRIGGER_LINE(0), 829 TRIGGER_LINE(1), 830 TRIGGER_LINE(2), 831 TRIGGER_LINE(3), 832 TRIGGER_LINE(4), 833 TRIGGER_LINE(5), 834 TRIGGER_LINE(6), 835 TRIGGER_LINE(7), 836 NI_CtrSource(1), 837 NI_CtrSource(2), 838 NI_CtrSource(3), 839 NI_CtrGate(1), 840 NI_CtrGate(2), 841 NI_CtrGate(3), 842 NI_CtrArmStartTrigger(1), 843 NI_CtrArmStartTrigger(2), 844 NI_CtrArmStartTrigger(3), 845 NI_CtrInternalOutput(0), 846 NI_CtrInternalOutput(1), 847 NI_CtrInternalOutput(2), 848 NI_CtrInternalOutput(3), 849 NI_CtrSampleClock(1), 850 NI_CtrSampleClock(2), 851 NI_CtrSampleClock(3), 852 PXI_Clk10, 853 NI_AO_SampleClock, 854 NI_AO_StartTrigger, 855 NI_AO_PauseTrigger, 856 NI_DI_SampleClock, 857 NI_DI_StartTrigger, 858 NI_DI_ReferenceTrigger, 859 NI_DI_PauseTrigger, 860 NI_DO_SampleClock, 861 NI_DO_StartTrigger, 862 NI_DO_PauseTrigger, 863 NI_20MHzTimebase, 864 NI_100MHzTimebase, 865 NI_100kHzTimebase, 866 NI_10MHzRefClock, 867 NI_ChangeDetectionEvent, 868 NI_WatchdogExpiredEvent, 869 0, /* Termination */ 870 } 871 }, 872 { 873 .dest = NI_CtrSource(1), 874 .src = (int[]){ 875 NI_PFI(0), 876 NI_PFI(1), 877 NI_PFI(2), 878 NI_PFI(3), 879 NI_PFI(4), 880 NI_PFI(5), 881 NI_PFI(6), 882 NI_PFI(7), 883 TRIGGER_LINE(0), 884 TRIGGER_LINE(1), 885 TRIGGER_LINE(2), 886 TRIGGER_LINE(3), 887 TRIGGER_LINE(4), 888 TRIGGER_LINE(5), 889 TRIGGER_LINE(6), 890 TRIGGER_LINE(7), 891 NI_CtrSource(0), 892 NI_CtrSource(2), 893 NI_CtrSource(3), 894 NI_CtrGate(0), 895 NI_CtrGate(2), 896 NI_CtrGate(3), 897 NI_CtrArmStartTrigger(0), 898 NI_CtrArmStartTrigger(2), 899 NI_CtrArmStartTrigger(3), 900 NI_CtrInternalOutput(0), 901 NI_CtrInternalOutput(1), 902 NI_CtrInternalOutput(2), 903 NI_CtrInternalOutput(3), 904 NI_CtrSampleClock(0), 905 NI_CtrSampleClock(2), 906 NI_CtrSampleClock(3), 907 PXI_Clk10, 908 NI_AO_SampleClock, 909 NI_AO_StartTrigger, 910 NI_AO_PauseTrigger, 911 NI_DI_SampleClock, 912 NI_DI_StartTrigger, 913 NI_DI_ReferenceTrigger, 914 NI_DI_PauseTrigger, 915 NI_DO_SampleClock, 916 NI_DO_StartTrigger, 917 NI_DO_PauseTrigger, 918 NI_20MHzTimebase, 919 NI_100MHzTimebase, 920 NI_100kHzTimebase, 921 NI_10MHzRefClock, 922 NI_ChangeDetectionEvent, 923 NI_WatchdogExpiredEvent, 924 0, /* Termination */ 925 } 926 }, 927 { 928 .dest = NI_CtrSource(2), 929 .src = (int[]){ 930 NI_PFI(0), 931 NI_PFI(1), 932 NI_PFI(2), 933 NI_PFI(3), 934 NI_PFI(4), 935 NI_PFI(5), 936 NI_PFI(6), 937 NI_PFI(7), 938 TRIGGER_LINE(0), 939 TRIGGER_LINE(1), 940 TRIGGER_LINE(2), 941 TRIGGER_LINE(3), 942 TRIGGER_LINE(4), 943 TRIGGER_LINE(5), 944 TRIGGER_LINE(6), 945 TRIGGER_LINE(7), 946 NI_CtrSource(0), 947 NI_CtrSource(1), 948 NI_CtrSource(3), 949 NI_CtrGate(0), 950 NI_CtrGate(1), 951 NI_CtrGate(3), 952 NI_CtrArmStartTrigger(0), 953 NI_CtrArmStartTrigger(1), 954 NI_CtrArmStartTrigger(3), 955 NI_CtrInternalOutput(0), 956 NI_CtrInternalOutput(1), 957 NI_CtrInternalOutput(2), 958 NI_CtrInternalOutput(3), 959 NI_CtrSampleClock(0), 960 NI_CtrSampleClock(1), 961 NI_CtrSampleClock(3), 962 PXI_Clk10, 963 NI_AO_SampleClock, 964 NI_AO_StartTrigger, 965 NI_AO_PauseTrigger, 966 NI_DI_SampleClock, 967 NI_DI_StartTrigger, 968 NI_DI_ReferenceTrigger, 969 NI_DI_PauseTrigger, 970 NI_DO_SampleClock, 971 NI_DO_StartTrigger, 972 NI_DO_PauseTrigger, 973 NI_20MHzTimebase, 974 NI_100MHzTimebase, 975 NI_100kHzTimebase, 976 NI_10MHzRefClock, 977 NI_ChangeDetectionEvent, 978 NI_WatchdogExpiredEvent, 979 0, /* Termination */ 980 } 981 }, 982 { 983 .dest = NI_CtrSource(3), 984 .src = (int[]){ 985 NI_PFI(0), 986 NI_PFI(1), 987 NI_PFI(2), 988 NI_PFI(3), 989 NI_PFI(4), 990 NI_PFI(5), 991 NI_PFI(6), 992 NI_PFI(7), 993 TRIGGER_LINE(0), 994 TRIGGER_LINE(1), 995 TRIGGER_LINE(2), 996 TRIGGER_LINE(3), 997 TRIGGER_LINE(4), 998 TRIGGER_LINE(5), 999 TRIGGER_LINE(6), 1000 TRIGGER_LINE(7), 1001 NI_CtrSource(0), 1002 NI_CtrSource(1), 1003 NI_CtrSource(2), 1004 NI_CtrGate(0), 1005 NI_CtrGate(1), 1006 NI_CtrGate(2), 1007 NI_CtrArmStartTrigger(0), 1008 NI_CtrArmStartTrigger(1), 1009 NI_CtrArmStartTrigger(2), 1010 NI_CtrInternalOutput(0), 1011 NI_CtrInternalOutput(1), 1012 NI_CtrInternalOutput(2), 1013 NI_CtrInternalOutput(3), 1014 NI_CtrSampleClock(0), 1015 NI_CtrSampleClock(1), 1016 NI_CtrSampleClock(2), 1017 PXI_Clk10, 1018 NI_AO_SampleClock, 1019 NI_AO_StartTrigger, 1020 NI_AO_PauseTrigger, 1021 NI_DI_SampleClock, 1022 NI_DI_StartTrigger, 1023 NI_DI_ReferenceTrigger, 1024 NI_DI_PauseTrigger, 1025 NI_DO_SampleClock, 1026 NI_DO_StartTrigger, 1027 NI_DO_PauseTrigger, 1028 NI_20MHzTimebase, 1029 NI_100MHzTimebase, 1030 NI_100kHzTimebase, 1031 NI_10MHzRefClock, 1032 NI_ChangeDetectionEvent, 1033 NI_WatchdogExpiredEvent, 1034 0, /* Termination */ 1035 } 1036 }, 1037 { 1038 .dest = NI_CtrGate(0), 1039 .src = (int[]){ 1040 NI_PFI(0), 1041 NI_PFI(1), 1042 NI_PFI(2), 1043 NI_PFI(3), 1044 NI_PFI(4), 1045 NI_PFI(5), 1046 NI_PFI(6), 1047 NI_PFI(7), 1048 TRIGGER_LINE(0), 1049 TRIGGER_LINE(1), 1050 TRIGGER_LINE(2), 1051 TRIGGER_LINE(3), 1052 TRIGGER_LINE(4), 1053 TRIGGER_LINE(5), 1054 TRIGGER_LINE(6), 1055 TRIGGER_LINE(7), 1056 NI_CtrSource(1), 1057 NI_CtrSource(2), 1058 NI_CtrSource(3), 1059 NI_CtrGate(1), 1060 NI_CtrGate(2), 1061 NI_CtrGate(3), 1062 NI_CtrArmStartTrigger(1), 1063 NI_CtrArmStartTrigger(2), 1064 NI_CtrArmStartTrigger(3), 1065 NI_CtrInternalOutput(0), 1066 NI_CtrInternalOutput(1), 1067 NI_CtrInternalOutput(2), 1068 NI_CtrInternalOutput(3), 1069 NI_CtrSampleClock(1), 1070 NI_CtrSampleClock(2), 1071 NI_CtrSampleClock(3), 1072 NI_AO_SampleClock, 1073 NI_AO_StartTrigger, 1074 NI_AO_PauseTrigger, 1075 NI_DI_SampleClock, 1076 NI_DI_StartTrigger, 1077 NI_DI_ReferenceTrigger, 1078 NI_DI_PauseTrigger, 1079 NI_DO_SampleClock, 1080 NI_DO_StartTrigger, 1081 NI_DO_PauseTrigger, 1082 NI_10MHzRefClock, 1083 NI_ChangeDetectionEvent, 1084 NI_WatchdogExpiredEvent, 1085 0, /* Termination */ 1086 } 1087 }, 1088 { 1089 .dest = NI_CtrGate(1), 1090 .src = (int[]){ 1091 NI_PFI(0), 1092 NI_PFI(1), 1093 NI_PFI(2), 1094 NI_PFI(3), 1095 NI_PFI(4), 1096 NI_PFI(5), 1097 NI_PFI(6), 1098 NI_PFI(7), 1099 TRIGGER_LINE(0), 1100 TRIGGER_LINE(1), 1101 TRIGGER_LINE(2), 1102 TRIGGER_LINE(3), 1103 TRIGGER_LINE(4), 1104 TRIGGER_LINE(5), 1105 TRIGGER_LINE(6), 1106 TRIGGER_LINE(7), 1107 NI_CtrSource(0), 1108 NI_CtrSource(2), 1109 NI_CtrSource(3), 1110 NI_CtrGate(0), 1111 NI_CtrGate(2), 1112 NI_CtrGate(3), 1113 NI_CtrArmStartTrigger(0), 1114 NI_CtrArmStartTrigger(2), 1115 NI_CtrArmStartTrigger(3), 1116 NI_CtrInternalOutput(0), 1117 NI_CtrInternalOutput(1), 1118 NI_CtrInternalOutput(2), 1119 NI_CtrInternalOutput(3), 1120 NI_CtrSampleClock(0), 1121 NI_CtrSampleClock(2), 1122 NI_CtrSampleClock(3), 1123 NI_AO_SampleClock, 1124 NI_AO_StartTrigger, 1125 NI_AO_PauseTrigger, 1126 NI_DI_SampleClock, 1127 NI_DI_StartTrigger, 1128 NI_DI_ReferenceTrigger, 1129 NI_DI_PauseTrigger, 1130 NI_DO_SampleClock, 1131 NI_DO_StartTrigger, 1132 NI_DO_PauseTrigger, 1133 NI_10MHzRefClock, 1134 NI_ChangeDetectionEvent, 1135 NI_WatchdogExpiredEvent, 1136 0, /* Termination */ 1137 } 1138 }, 1139 { 1140 .dest = NI_CtrGate(2), 1141 .src = (int[]){ 1142 NI_PFI(0), 1143 NI_PFI(1), 1144 NI_PFI(2), 1145 NI_PFI(3), 1146 NI_PFI(4), 1147 NI_PFI(5), 1148 NI_PFI(6), 1149 NI_PFI(7), 1150 TRIGGER_LINE(0), 1151 TRIGGER_LINE(1), 1152 TRIGGER_LINE(2), 1153 TRIGGER_LINE(3), 1154 TRIGGER_LINE(4), 1155 TRIGGER_LINE(5), 1156 TRIGGER_LINE(6), 1157 TRIGGER_LINE(7), 1158 NI_CtrSource(0), 1159 NI_CtrSource(1), 1160 NI_CtrSource(3), 1161 NI_CtrGate(0), 1162 NI_CtrGate(1), 1163 NI_CtrGate(3), 1164 NI_CtrArmStartTrigger(0), 1165 NI_CtrArmStartTrigger(1), 1166 NI_CtrArmStartTrigger(3), 1167 NI_CtrInternalOutput(0), 1168 NI_CtrInternalOutput(1), 1169 NI_CtrInternalOutput(2), 1170 NI_CtrInternalOutput(3), 1171 NI_CtrSampleClock(0), 1172 NI_CtrSampleClock(1), 1173 NI_CtrSampleClock(3), 1174 NI_AO_SampleClock, 1175 NI_AO_StartTrigger, 1176 NI_AO_PauseTrigger, 1177 NI_DI_SampleClock, 1178 NI_DI_StartTrigger, 1179 NI_DI_ReferenceTrigger, 1180 NI_DI_PauseTrigger, 1181 NI_DO_SampleClock, 1182 NI_DO_StartTrigger, 1183 NI_DO_PauseTrigger, 1184 NI_10MHzRefClock, 1185 NI_ChangeDetectionEvent, 1186 NI_WatchdogExpiredEvent, 1187 0, /* Termination */ 1188 } 1189 }, 1190 { 1191 .dest = NI_CtrGate(3), 1192 .src = (int[]){ 1193 NI_PFI(0), 1194 NI_PFI(1), 1195 NI_PFI(2), 1196 NI_PFI(3), 1197 NI_PFI(4), 1198 NI_PFI(5), 1199 NI_PFI(6), 1200 NI_PFI(7), 1201 TRIGGER_LINE(0), 1202 TRIGGER_LINE(1), 1203 TRIGGER_LINE(2), 1204 TRIGGER_LINE(3), 1205 TRIGGER_LINE(4), 1206 TRIGGER_LINE(5), 1207 TRIGGER_LINE(6), 1208 TRIGGER_LINE(7), 1209 NI_CtrSource(0), 1210 NI_CtrSource(1), 1211 NI_CtrSource(2), 1212 NI_CtrGate(0), 1213 NI_CtrGate(1), 1214 NI_CtrGate(2), 1215 NI_CtrArmStartTrigger(0), 1216 NI_CtrArmStartTrigger(1), 1217 NI_CtrArmStartTrigger(2), 1218 NI_CtrInternalOutput(0), 1219 NI_CtrInternalOutput(1), 1220 NI_CtrInternalOutput(2), 1221 NI_CtrInternalOutput(3), 1222 NI_CtrSampleClock(0), 1223 NI_CtrSampleClock(1), 1224 NI_CtrSampleClock(2), 1225 NI_AO_SampleClock, 1226 NI_AO_StartTrigger, 1227 NI_AO_PauseTrigger, 1228 NI_DI_SampleClock, 1229 NI_DI_StartTrigger, 1230 NI_DI_ReferenceTrigger, 1231 NI_DI_PauseTrigger, 1232 NI_DO_SampleClock, 1233 NI_DO_StartTrigger, 1234 NI_DO_PauseTrigger, 1235 NI_10MHzRefClock, 1236 NI_ChangeDetectionEvent, 1237 NI_WatchdogExpiredEvent, 1238 0, /* Termination */ 1239 } 1240 }, 1241 { 1242 .dest = NI_CtrAux(0), 1243 .src = (int[]){ 1244 NI_PFI(0), 1245 NI_PFI(1), 1246 NI_PFI(2), 1247 NI_PFI(3), 1248 NI_PFI(4), 1249 NI_PFI(5), 1250 NI_PFI(6), 1251 NI_PFI(7), 1252 TRIGGER_LINE(0), 1253 TRIGGER_LINE(1), 1254 TRIGGER_LINE(2), 1255 TRIGGER_LINE(3), 1256 TRIGGER_LINE(4), 1257 TRIGGER_LINE(5), 1258 TRIGGER_LINE(6), 1259 TRIGGER_LINE(7), 1260 NI_CtrSource(1), 1261 NI_CtrSource(2), 1262 NI_CtrSource(3), 1263 NI_CtrGate(0), 1264 NI_CtrGate(1), 1265 NI_CtrGate(2), 1266 NI_CtrGate(3), 1267 NI_CtrArmStartTrigger(1), 1268 NI_CtrArmStartTrigger(2), 1269 NI_CtrArmStartTrigger(3), 1270 NI_CtrInternalOutput(0), 1271 NI_CtrInternalOutput(1), 1272 NI_CtrInternalOutput(2), 1273 NI_CtrInternalOutput(3), 1274 NI_CtrSampleClock(1), 1275 NI_CtrSampleClock(2), 1276 NI_CtrSampleClock(3), 1277 NI_AO_SampleClock, 1278 NI_AO_StartTrigger, 1279 NI_AO_PauseTrigger, 1280 NI_DI_SampleClock, 1281 NI_DI_StartTrigger, 1282 NI_DI_ReferenceTrigger, 1283 NI_DI_PauseTrigger, 1284 NI_DO_SampleClock, 1285 NI_DO_StartTrigger, 1286 NI_DO_PauseTrigger, 1287 NI_10MHzRefClock, 1288 NI_ChangeDetectionEvent, 1289 NI_WatchdogExpiredEvent, 1290 0, /* Termination */ 1291 } 1292 }, 1293 { 1294 .dest = NI_CtrAux(1), 1295 .src = (int[]){ 1296 NI_PFI(0), 1297 NI_PFI(1), 1298 NI_PFI(2), 1299 NI_PFI(3), 1300 NI_PFI(4), 1301 NI_PFI(5), 1302 NI_PFI(6), 1303 NI_PFI(7), 1304 TRIGGER_LINE(0), 1305 TRIGGER_LINE(1), 1306 TRIGGER_LINE(2), 1307 TRIGGER_LINE(3), 1308 TRIGGER_LINE(4), 1309 TRIGGER_LINE(5), 1310 TRIGGER_LINE(6), 1311 TRIGGER_LINE(7), 1312 NI_CtrSource(0), 1313 NI_CtrSource(2), 1314 NI_CtrSource(3), 1315 NI_CtrGate(0), 1316 NI_CtrGate(1), 1317 NI_CtrGate(2), 1318 NI_CtrGate(3), 1319 NI_CtrArmStartTrigger(0), 1320 NI_CtrArmStartTrigger(2), 1321 NI_CtrArmStartTrigger(3), 1322 NI_CtrInternalOutput(0), 1323 NI_CtrInternalOutput(1), 1324 NI_CtrInternalOutput(2), 1325 NI_CtrInternalOutput(3), 1326 NI_CtrSampleClock(0), 1327 NI_CtrSampleClock(2), 1328 NI_CtrSampleClock(3), 1329 NI_AO_SampleClock, 1330 NI_AO_StartTrigger, 1331 NI_AO_PauseTrigger, 1332 NI_DI_SampleClock, 1333 NI_DI_StartTrigger, 1334 NI_DI_ReferenceTrigger, 1335 NI_DI_PauseTrigger, 1336 NI_DO_SampleClock, 1337 NI_DO_StartTrigger, 1338 NI_DO_PauseTrigger, 1339 NI_10MHzRefClock, 1340 NI_ChangeDetectionEvent, 1341 NI_WatchdogExpiredEvent, 1342 0, /* Termination */ 1343 } 1344 }, 1345 { 1346 .dest = NI_CtrAux(2), 1347 .src = (int[]){ 1348 NI_PFI(0), 1349 NI_PFI(1), 1350 NI_PFI(2), 1351 NI_PFI(3), 1352 NI_PFI(4), 1353 NI_PFI(5), 1354 NI_PFI(6), 1355 NI_PFI(7), 1356 TRIGGER_LINE(0), 1357 TRIGGER_LINE(1), 1358 TRIGGER_LINE(2), 1359 TRIGGER_LINE(3), 1360 TRIGGER_LINE(4), 1361 TRIGGER_LINE(5), 1362 TRIGGER_LINE(6), 1363 TRIGGER_LINE(7), 1364 NI_CtrSource(0), 1365 NI_CtrSource(1), 1366 NI_CtrSource(3), 1367 NI_CtrGate(0), 1368 NI_CtrGate(1), 1369 NI_CtrGate(2), 1370 NI_CtrGate(3), 1371 NI_CtrArmStartTrigger(0), 1372 NI_CtrArmStartTrigger(1), 1373 NI_CtrArmStartTrigger(3), 1374 NI_CtrInternalOutput(0), 1375 NI_CtrInternalOutput(1), 1376 NI_CtrInternalOutput(2), 1377 NI_CtrInternalOutput(3), 1378 NI_CtrSampleClock(0), 1379 NI_CtrSampleClock(1), 1380 NI_CtrSampleClock(3), 1381 NI_AO_SampleClock, 1382 NI_AO_StartTrigger, 1383 NI_AO_PauseTrigger, 1384 NI_DI_SampleClock, 1385 NI_DI_StartTrigger, 1386 NI_DI_ReferenceTrigger, 1387 NI_DI_PauseTrigger, 1388 NI_DO_SampleClock, 1389 NI_DO_StartTrigger, 1390 NI_DO_PauseTrigger, 1391 NI_10MHzRefClock, 1392 NI_ChangeDetectionEvent, 1393 NI_WatchdogExpiredEvent, 1394 0, /* Termination */ 1395 } 1396 }, 1397 { 1398 .dest = NI_CtrAux(3), 1399 .src = (int[]){ 1400 NI_PFI(0), 1401 NI_PFI(1), 1402 NI_PFI(2), 1403 NI_PFI(3), 1404 NI_PFI(4), 1405 NI_PFI(5), 1406 NI_PFI(6), 1407 NI_PFI(7), 1408 TRIGGER_LINE(0), 1409 TRIGGER_LINE(1), 1410 TRIGGER_LINE(2), 1411 TRIGGER_LINE(3), 1412 TRIGGER_LINE(4), 1413 TRIGGER_LINE(5), 1414 TRIGGER_LINE(6), 1415 TRIGGER_LINE(7), 1416 NI_CtrSource(0), 1417 NI_CtrSource(1), 1418 NI_CtrSource(2), 1419 NI_CtrGate(0), 1420 NI_CtrGate(1), 1421 NI_CtrGate(2), 1422 NI_CtrGate(3), 1423 NI_CtrArmStartTrigger(0), 1424 NI_CtrArmStartTrigger(1), 1425 NI_CtrArmStartTrigger(2), 1426 NI_CtrInternalOutput(0), 1427 NI_CtrInternalOutput(1), 1428 NI_CtrInternalOutput(2), 1429 NI_CtrInternalOutput(3), 1430 NI_CtrSampleClock(0), 1431 NI_CtrSampleClock(1), 1432 NI_CtrSampleClock(2), 1433 NI_AO_SampleClock, 1434 NI_AO_StartTrigger, 1435 NI_AO_PauseTrigger, 1436 NI_DI_SampleClock, 1437 NI_DI_StartTrigger, 1438 NI_DI_ReferenceTrigger, 1439 NI_DI_PauseTrigger, 1440 NI_DO_SampleClock, 1441 NI_DO_StartTrigger, 1442 NI_DO_PauseTrigger, 1443 NI_10MHzRefClock, 1444 NI_ChangeDetectionEvent, 1445 NI_WatchdogExpiredEvent, 1446 0, /* Termination */ 1447 } 1448 }, 1449 { 1450 .dest = NI_CtrA(0), 1451 .src = (int[]){ 1452 NI_PFI(0), 1453 NI_PFI(1), 1454 NI_PFI(2), 1455 NI_PFI(3), 1456 NI_PFI(4), 1457 NI_PFI(5), 1458 NI_PFI(6), 1459 NI_PFI(7), 1460 TRIGGER_LINE(0), 1461 TRIGGER_LINE(1), 1462 TRIGGER_LINE(2), 1463 TRIGGER_LINE(3), 1464 TRIGGER_LINE(4), 1465 TRIGGER_LINE(5), 1466 TRIGGER_LINE(6), 1467 TRIGGER_LINE(7), 1468 NI_CtrSource(1), 1469 NI_CtrSource(2), 1470 NI_CtrSource(3), 1471 NI_CtrGate(1), 1472 NI_CtrGate(2), 1473 NI_CtrGate(3), 1474 NI_CtrArmStartTrigger(1), 1475 NI_CtrArmStartTrigger(2), 1476 NI_CtrArmStartTrigger(3), 1477 NI_CtrInternalOutput(0), 1478 NI_CtrInternalOutput(1), 1479 NI_CtrInternalOutput(2), 1480 NI_CtrInternalOutput(3), 1481 NI_CtrSampleClock(1), 1482 NI_CtrSampleClock(2), 1483 NI_CtrSampleClock(3), 1484 NI_AO_SampleClock, 1485 NI_AO_StartTrigger, 1486 NI_AO_PauseTrigger, 1487 NI_DI_SampleClock, 1488 NI_DI_StartTrigger, 1489 NI_DI_ReferenceTrigger, 1490 NI_DI_PauseTrigger, 1491 NI_DO_SampleClock, 1492 NI_DO_StartTrigger, 1493 NI_DO_PauseTrigger, 1494 NI_10MHzRefClock, 1495 NI_ChangeDetectionEvent, 1496 NI_WatchdogExpiredEvent, 1497 0, /* Termination */ 1498 } 1499 }, 1500 { 1501 .dest = NI_CtrA(1), 1502 .src = (int[]){ 1503 NI_PFI(0), 1504 NI_PFI(1), 1505 NI_PFI(2), 1506 NI_PFI(3), 1507 NI_PFI(4), 1508 NI_PFI(5), 1509 NI_PFI(6), 1510 NI_PFI(7), 1511 TRIGGER_LINE(0), 1512 TRIGGER_LINE(1), 1513 TRIGGER_LINE(2), 1514 TRIGGER_LINE(3), 1515 TRIGGER_LINE(4), 1516 TRIGGER_LINE(5), 1517 TRIGGER_LINE(6), 1518 TRIGGER_LINE(7), 1519 NI_CtrSource(0), 1520 NI_CtrSource(2), 1521 NI_CtrSource(3), 1522 NI_CtrGate(0), 1523 NI_CtrGate(2), 1524 NI_CtrGate(3), 1525 NI_CtrArmStartTrigger(0), 1526 NI_CtrArmStartTrigger(2), 1527 NI_CtrArmStartTrigger(3), 1528 NI_CtrInternalOutput(0), 1529 NI_CtrInternalOutput(1), 1530 NI_CtrInternalOutput(2), 1531 NI_CtrInternalOutput(3), 1532 NI_CtrSampleClock(0), 1533 NI_CtrSampleClock(2), 1534 NI_CtrSampleClock(3), 1535 NI_AO_SampleClock, 1536 NI_AO_StartTrigger, 1537 NI_AO_PauseTrigger, 1538 NI_DI_SampleClock, 1539 NI_DI_StartTrigger, 1540 NI_DI_ReferenceTrigger, 1541 NI_DI_PauseTrigger, 1542 NI_DO_SampleClock, 1543 NI_DO_StartTrigger, 1544 NI_DO_PauseTrigger, 1545 NI_10MHzRefClock, 1546 NI_ChangeDetectionEvent, 1547 NI_WatchdogExpiredEvent, 1548 0, /* Termination */ 1549 } 1550 }, 1551 { 1552 .dest = NI_CtrA(2), 1553 .src = (int[]){ 1554 NI_PFI(0), 1555 NI_PFI(1), 1556 NI_PFI(2), 1557 NI_PFI(3), 1558 NI_PFI(4), 1559 NI_PFI(5), 1560 NI_PFI(6), 1561 NI_PFI(7), 1562 TRIGGER_LINE(0), 1563 TRIGGER_LINE(1), 1564 TRIGGER_LINE(2), 1565 TRIGGER_LINE(3), 1566 TRIGGER_LINE(4), 1567 TRIGGER_LINE(5), 1568 TRIGGER_LINE(6), 1569 TRIGGER_LINE(7), 1570 NI_CtrSource(0), 1571 NI_CtrSource(1), 1572 NI_CtrSource(3), 1573 NI_CtrGate(0), 1574 NI_CtrGate(1), 1575 NI_CtrGate(3), 1576 NI_CtrArmStartTrigger(0), 1577 NI_CtrArmStartTrigger(1), 1578 NI_CtrArmStartTrigger(3), 1579 NI_CtrInternalOutput(0), 1580 NI_CtrInternalOutput(1), 1581 NI_CtrInternalOutput(2), 1582 NI_CtrInternalOutput(3), 1583 NI_CtrSampleClock(0), 1584 NI_CtrSampleClock(1), 1585 NI_CtrSampleClock(3), 1586 NI_AO_SampleClock, 1587 NI_AO_StartTrigger, 1588 NI_AO_PauseTrigger, 1589 NI_DI_SampleClock, 1590 NI_DI_StartTrigger, 1591 NI_DI_ReferenceTrigger, 1592 NI_DI_PauseTrigger, 1593 NI_DO_SampleClock, 1594 NI_DO_StartTrigger, 1595 NI_DO_PauseTrigger, 1596 NI_10MHzRefClock, 1597 NI_ChangeDetectionEvent, 1598 NI_WatchdogExpiredEvent, 1599 0, /* Termination */ 1600 } 1601 }, 1602 { 1603 .dest = NI_CtrA(3), 1604 .src = (int[]){ 1605 NI_PFI(0), 1606 NI_PFI(1), 1607 NI_PFI(2), 1608 NI_PFI(3), 1609 NI_PFI(4), 1610 NI_PFI(5), 1611 NI_PFI(6), 1612 NI_PFI(7), 1613 TRIGGER_LINE(0), 1614 TRIGGER_LINE(1), 1615 TRIGGER_LINE(2), 1616 TRIGGER_LINE(3), 1617 TRIGGER_LINE(4), 1618 TRIGGER_LINE(5), 1619 TRIGGER_LINE(6), 1620 TRIGGER_LINE(7), 1621 NI_CtrSource(0), 1622 NI_CtrSource(1), 1623 NI_CtrSource(2), 1624 NI_CtrGate(0), 1625 NI_CtrGate(1), 1626 NI_CtrGate(2), 1627 NI_CtrArmStartTrigger(0), 1628 NI_CtrArmStartTrigger(1), 1629 NI_CtrArmStartTrigger(2), 1630 NI_CtrInternalOutput(0), 1631 NI_CtrInternalOutput(1), 1632 NI_CtrInternalOutput(2), 1633 NI_CtrInternalOutput(3), 1634 NI_CtrSampleClock(0), 1635 NI_CtrSampleClock(1), 1636 NI_CtrSampleClock(2), 1637 NI_AO_SampleClock, 1638 NI_AO_StartTrigger, 1639 NI_AO_PauseTrigger, 1640 NI_DI_SampleClock, 1641 NI_DI_StartTrigger, 1642 NI_DI_ReferenceTrigger, 1643 NI_DI_PauseTrigger, 1644 NI_DO_SampleClock, 1645 NI_DO_StartTrigger, 1646 NI_DO_PauseTrigger, 1647 NI_10MHzRefClock, 1648 NI_ChangeDetectionEvent, 1649 NI_WatchdogExpiredEvent, 1650 0, /* Termination */ 1651 } 1652 }, 1653 { 1654 .dest = NI_CtrB(0), 1655 .src = (int[]){ 1656 NI_PFI(0), 1657 NI_PFI(1), 1658 NI_PFI(2), 1659 NI_PFI(3), 1660 NI_PFI(4), 1661 NI_PFI(5), 1662 NI_PFI(6), 1663 NI_PFI(7), 1664 TRIGGER_LINE(0), 1665 TRIGGER_LINE(1), 1666 TRIGGER_LINE(2), 1667 TRIGGER_LINE(3), 1668 TRIGGER_LINE(4), 1669 TRIGGER_LINE(5), 1670 TRIGGER_LINE(6), 1671 TRIGGER_LINE(7), 1672 NI_CtrSource(1), 1673 NI_CtrSource(2), 1674 NI_CtrSource(3), 1675 NI_CtrGate(1), 1676 NI_CtrGate(2), 1677 NI_CtrGate(3), 1678 NI_CtrArmStartTrigger(1), 1679 NI_CtrArmStartTrigger(2), 1680 NI_CtrArmStartTrigger(3), 1681 NI_CtrInternalOutput(0), 1682 NI_CtrInternalOutput(1), 1683 NI_CtrInternalOutput(2), 1684 NI_CtrInternalOutput(3), 1685 NI_CtrSampleClock(1), 1686 NI_CtrSampleClock(2), 1687 NI_CtrSampleClock(3), 1688 NI_AO_SampleClock, 1689 NI_AO_StartTrigger, 1690 NI_AO_PauseTrigger, 1691 NI_DI_SampleClock, 1692 NI_DI_StartTrigger, 1693 NI_DI_ReferenceTrigger, 1694 NI_DI_PauseTrigger, 1695 NI_DO_SampleClock, 1696 NI_DO_StartTrigger, 1697 NI_DO_PauseTrigger, 1698 NI_10MHzRefClock, 1699 NI_ChangeDetectionEvent, 1700 NI_WatchdogExpiredEvent, 1701 0, /* Termination */ 1702 } 1703 }, 1704 { 1705 .dest = NI_CtrB(1), 1706 .src = (int[]){ 1707 NI_PFI(0), 1708 NI_PFI(1), 1709 NI_PFI(2), 1710 NI_PFI(3), 1711 NI_PFI(4), 1712 NI_PFI(5), 1713 NI_PFI(6), 1714 NI_PFI(7), 1715 TRIGGER_LINE(0), 1716 TRIGGER_LINE(1), 1717 TRIGGER_LINE(2), 1718 TRIGGER_LINE(3), 1719 TRIGGER_LINE(4), 1720 TRIGGER_LINE(5), 1721 TRIGGER_LINE(6), 1722 TRIGGER_LINE(7), 1723 NI_CtrSource(0), 1724 NI_CtrSource(2), 1725 NI_CtrSource(3), 1726 NI_CtrGate(0), 1727 NI_CtrGate(2), 1728 NI_CtrGate(3), 1729 NI_CtrArmStartTrigger(0), 1730 NI_CtrArmStartTrigger(2), 1731 NI_CtrArmStartTrigger(3), 1732 NI_CtrInternalOutput(0), 1733 NI_CtrInternalOutput(1), 1734 NI_CtrInternalOutput(2), 1735 NI_CtrInternalOutput(3), 1736 NI_CtrSampleClock(0), 1737 NI_CtrSampleClock(2), 1738 NI_CtrSampleClock(3), 1739 NI_AO_SampleClock, 1740 NI_AO_StartTrigger, 1741 NI_AO_PauseTrigger, 1742 NI_DI_SampleClock, 1743 NI_DI_StartTrigger, 1744 NI_DI_ReferenceTrigger, 1745 NI_DI_PauseTrigger, 1746 NI_DO_SampleClock, 1747 NI_DO_StartTrigger, 1748 NI_DO_PauseTrigger, 1749 NI_10MHzRefClock, 1750 NI_ChangeDetectionEvent, 1751 NI_WatchdogExpiredEvent, 1752 0, /* Termination */ 1753 } 1754 }, 1755 { 1756 .dest = NI_CtrB(2), 1757 .src = (int[]){ 1758 NI_PFI(0), 1759 NI_PFI(1), 1760 NI_PFI(2), 1761 NI_PFI(3), 1762 NI_PFI(4), 1763 NI_PFI(5), 1764 NI_PFI(6), 1765 NI_PFI(7), 1766 TRIGGER_LINE(0), 1767 TRIGGER_LINE(1), 1768 TRIGGER_LINE(2), 1769 TRIGGER_LINE(3), 1770 TRIGGER_LINE(4), 1771 TRIGGER_LINE(5), 1772 TRIGGER_LINE(6), 1773 TRIGGER_LINE(7), 1774 NI_CtrSource(0), 1775 NI_CtrSource(1), 1776 NI_CtrSource(3), 1777 NI_CtrGate(0), 1778 NI_CtrGate(1), 1779 NI_CtrGate(3), 1780 NI_CtrArmStartTrigger(0), 1781 NI_CtrArmStartTrigger(1), 1782 NI_CtrArmStartTrigger(3), 1783 NI_CtrInternalOutput(0), 1784 NI_CtrInternalOutput(1), 1785 NI_CtrInternalOutput(2), 1786 NI_CtrInternalOutput(3), 1787 NI_CtrSampleClock(0), 1788 NI_CtrSampleClock(1), 1789 NI_CtrSampleClock(3), 1790 NI_AO_SampleClock, 1791 NI_AO_StartTrigger, 1792 NI_AO_PauseTrigger, 1793 NI_DI_SampleClock, 1794 NI_DI_StartTrigger, 1795 NI_DI_ReferenceTrigger, 1796 NI_DI_PauseTrigger, 1797 NI_DO_SampleClock, 1798 NI_DO_StartTrigger, 1799 NI_DO_PauseTrigger, 1800 NI_10MHzRefClock, 1801 NI_ChangeDetectionEvent, 1802 NI_WatchdogExpiredEvent, 1803 0, /* Termination */ 1804 } 1805 }, 1806 { 1807 .dest = NI_CtrB(3), 1808 .src = (int[]){ 1809 NI_PFI(0), 1810 NI_PFI(1), 1811 NI_PFI(2), 1812 NI_PFI(3), 1813 NI_PFI(4), 1814 NI_PFI(5), 1815 NI_PFI(6), 1816 NI_PFI(7), 1817 TRIGGER_LINE(0), 1818 TRIGGER_LINE(1), 1819 TRIGGER_LINE(2), 1820 TRIGGER_LINE(3), 1821 TRIGGER_LINE(4), 1822 TRIGGER_LINE(5), 1823 TRIGGER_LINE(6), 1824 TRIGGER_LINE(7), 1825 NI_CtrSource(0), 1826 NI_CtrSource(1), 1827 NI_CtrSource(2), 1828 NI_CtrGate(0), 1829 NI_CtrGate(1), 1830 NI_CtrGate(2), 1831 NI_CtrArmStartTrigger(0), 1832 NI_CtrArmStartTrigger(1), 1833 NI_CtrArmStartTrigger(2), 1834 NI_CtrInternalOutput(0), 1835 NI_CtrInternalOutput(1), 1836 NI_CtrInternalOutput(2), 1837 NI_CtrInternalOutput(3), 1838 NI_CtrSampleClock(0), 1839 NI_CtrSampleClock(1), 1840 NI_CtrSampleClock(2), 1841 NI_AO_SampleClock, 1842 NI_AO_StartTrigger, 1843 NI_AO_PauseTrigger, 1844 NI_DI_SampleClock, 1845 NI_DI_StartTrigger, 1846 NI_DI_ReferenceTrigger, 1847 NI_DI_PauseTrigger, 1848 NI_DO_SampleClock, 1849 NI_DO_StartTrigger, 1850 NI_DO_PauseTrigger, 1851 NI_10MHzRefClock, 1852 NI_ChangeDetectionEvent, 1853 NI_WatchdogExpiredEvent, 1854 0, /* Termination */ 1855 } 1856 }, 1857 { 1858 .dest = NI_CtrZ(0), 1859 .src = (int[]){ 1860 NI_PFI(0), 1861 NI_PFI(1), 1862 NI_PFI(2), 1863 NI_PFI(3), 1864 NI_PFI(4), 1865 NI_PFI(5), 1866 NI_PFI(6), 1867 NI_PFI(7), 1868 TRIGGER_LINE(0), 1869 TRIGGER_LINE(1), 1870 TRIGGER_LINE(2), 1871 TRIGGER_LINE(3), 1872 TRIGGER_LINE(4), 1873 TRIGGER_LINE(5), 1874 TRIGGER_LINE(6), 1875 TRIGGER_LINE(7), 1876 NI_CtrSource(1), 1877 NI_CtrSource(2), 1878 NI_CtrSource(3), 1879 NI_CtrGate(1), 1880 NI_CtrGate(2), 1881 NI_CtrGate(3), 1882 NI_CtrArmStartTrigger(1), 1883 NI_CtrArmStartTrigger(2), 1884 NI_CtrArmStartTrigger(3), 1885 NI_CtrInternalOutput(0), 1886 NI_CtrInternalOutput(1), 1887 NI_CtrInternalOutput(2), 1888 NI_CtrInternalOutput(3), 1889 NI_CtrSampleClock(1), 1890 NI_CtrSampleClock(2), 1891 NI_CtrSampleClock(3), 1892 NI_AO_SampleClock, 1893 NI_AO_StartTrigger, 1894 NI_AO_PauseTrigger, 1895 NI_DI_SampleClock, 1896 NI_DI_StartTrigger, 1897 NI_DI_ReferenceTrigger, 1898 NI_DI_PauseTrigger, 1899 NI_DO_SampleClock, 1900 NI_DO_StartTrigger, 1901 NI_DO_PauseTrigger, 1902 NI_10MHzRefClock, 1903 NI_ChangeDetectionEvent, 1904 NI_WatchdogExpiredEvent, 1905 0, /* Termination */ 1906 } 1907 }, 1908 { 1909 .dest = NI_CtrZ(1), 1910 .src = (int[]){ 1911 NI_PFI(0), 1912 NI_PFI(1), 1913 NI_PFI(2), 1914 NI_PFI(3), 1915 NI_PFI(4), 1916 NI_PFI(5), 1917 NI_PFI(6), 1918 NI_PFI(7), 1919 TRIGGER_LINE(0), 1920 TRIGGER_LINE(1), 1921 TRIGGER_LINE(2), 1922 TRIGGER_LINE(3), 1923 TRIGGER_LINE(4), 1924 TRIGGER_LINE(5), 1925 TRIGGER_LINE(6), 1926 TRIGGER_LINE(7), 1927 NI_CtrSource(0), 1928 NI_CtrSource(2), 1929 NI_CtrSource(3), 1930 NI_CtrGate(0), 1931 NI_CtrGate(2), 1932 NI_CtrGate(3), 1933 NI_CtrArmStartTrigger(0), 1934 NI_CtrArmStartTrigger(2), 1935 NI_CtrArmStartTrigger(3), 1936 NI_CtrInternalOutput(0), 1937 NI_CtrInternalOutput(1), 1938 NI_CtrInternalOutput(2), 1939 NI_CtrInternalOutput(3), 1940 NI_CtrSampleClock(0), 1941 NI_CtrSampleClock(2), 1942 NI_CtrSampleClock(3), 1943 NI_AO_SampleClock, 1944 NI_AO_StartTrigger, 1945 NI_AO_PauseTrigger, 1946 NI_DI_SampleClock, 1947 NI_DI_StartTrigger, 1948 NI_DI_ReferenceTrigger, 1949 NI_DI_PauseTrigger, 1950 NI_DO_SampleClock, 1951 NI_DO_StartTrigger, 1952 NI_DO_PauseTrigger, 1953 NI_10MHzRefClock, 1954 NI_ChangeDetectionEvent, 1955 NI_WatchdogExpiredEvent, 1956 0, /* Termination */ 1957 } 1958 }, 1959 { 1960 .dest = NI_CtrZ(2), 1961 .src = (int[]){ 1962 NI_PFI(0), 1963 NI_PFI(1), 1964 NI_PFI(2), 1965 NI_PFI(3), 1966 NI_PFI(4), 1967 NI_PFI(5), 1968 NI_PFI(6), 1969 NI_PFI(7), 1970 TRIGGER_LINE(0), 1971 TRIGGER_LINE(1), 1972 TRIGGER_LINE(2), 1973 TRIGGER_LINE(3), 1974 TRIGGER_LINE(4), 1975 TRIGGER_LINE(5), 1976 TRIGGER_LINE(6), 1977 TRIGGER_LINE(7), 1978 NI_CtrSource(0), 1979 NI_CtrSource(1), 1980 NI_CtrSource(3), 1981 NI_CtrGate(0), 1982 NI_CtrGate(1), 1983 NI_CtrGate(3), 1984 NI_CtrArmStartTrigger(0), 1985 NI_CtrArmStartTrigger(1), 1986 NI_CtrArmStartTrigger(3), 1987 NI_CtrInternalOutput(0), 1988 NI_CtrInternalOutput(1), 1989 NI_CtrInternalOutput(2), 1990 NI_CtrInternalOutput(3), 1991 NI_CtrSampleClock(0), 1992 NI_CtrSampleClock(1), 1993 NI_CtrSampleClock(3), 1994 NI_AO_SampleClock, 1995 NI_AO_StartTrigger, 1996 NI_AO_PauseTrigger, 1997 NI_DI_SampleClock, 1998 NI_DI_StartTrigger, 1999 NI_DI_ReferenceTrigger, 2000 NI_DI_PauseTrigger, 2001 NI_DO_SampleClock, 2002 NI_DO_StartTrigger, 2003 NI_DO_PauseTrigger, 2004 NI_10MHzRefClock, 2005 NI_ChangeDetectionEvent, 2006 NI_WatchdogExpiredEvent, 2007 0, /* Termination */ 2008 } 2009 }, 2010 { 2011 .dest = NI_CtrZ(3), 2012 .src = (int[]){ 2013 NI_PFI(0), 2014 NI_PFI(1), 2015 NI_PFI(2), 2016 NI_PFI(3), 2017 NI_PFI(4), 2018 NI_PFI(5), 2019 NI_PFI(6), 2020 NI_PFI(7), 2021 TRIGGER_LINE(0), 2022 TRIGGER_LINE(1), 2023 TRIGGER_LINE(2), 2024 TRIGGER_LINE(3), 2025 TRIGGER_LINE(4), 2026 TRIGGER_LINE(5), 2027 TRIGGER_LINE(6), 2028 TRIGGER_LINE(7), 2029 NI_CtrSource(0), 2030 NI_CtrSource(1), 2031 NI_CtrSource(2), 2032 NI_CtrGate(0), 2033 NI_CtrGate(1), 2034 NI_CtrGate(2), 2035 NI_CtrArmStartTrigger(0), 2036 NI_CtrArmStartTrigger(1), 2037 NI_CtrArmStartTrigger(2), 2038 NI_CtrInternalOutput(0), 2039 NI_CtrInternalOutput(1), 2040 NI_CtrInternalOutput(2), 2041 NI_CtrInternalOutput(3), 2042 NI_CtrSampleClock(0), 2043 NI_CtrSampleClock(1), 2044 NI_CtrSampleClock(2), 2045 NI_AO_SampleClock, 2046 NI_AO_StartTrigger, 2047 NI_AO_PauseTrigger, 2048 NI_DI_SampleClock, 2049 NI_DI_StartTrigger, 2050 NI_DI_ReferenceTrigger, 2051 NI_DI_PauseTrigger, 2052 NI_DO_SampleClock, 2053 NI_DO_StartTrigger, 2054 NI_DO_PauseTrigger, 2055 NI_10MHzRefClock, 2056 NI_ChangeDetectionEvent, 2057 NI_WatchdogExpiredEvent, 2058 0, /* Termination */ 2059 } 2060 }, 2061 { 2062 .dest = NI_CtrArmStartTrigger(0), 2063 .src = (int[]){ 2064 NI_PFI(0), 2065 NI_PFI(1), 2066 NI_PFI(2), 2067 NI_PFI(3), 2068 NI_PFI(4), 2069 NI_PFI(5), 2070 NI_PFI(6), 2071 NI_PFI(7), 2072 TRIGGER_LINE(0), 2073 TRIGGER_LINE(1), 2074 TRIGGER_LINE(2), 2075 TRIGGER_LINE(3), 2076 TRIGGER_LINE(4), 2077 TRIGGER_LINE(5), 2078 TRIGGER_LINE(6), 2079 TRIGGER_LINE(7), 2080 NI_CtrSource(1), 2081 NI_CtrSource(2), 2082 NI_CtrSource(3), 2083 NI_CtrGate(1), 2084 NI_CtrGate(2), 2085 NI_CtrGate(3), 2086 NI_CtrArmStartTrigger(1), 2087 NI_CtrArmStartTrigger(2), 2088 NI_CtrArmStartTrigger(3), 2089 NI_CtrInternalOutput(0), 2090 NI_CtrInternalOutput(1), 2091 NI_CtrInternalOutput(2), 2092 NI_CtrInternalOutput(3), 2093 NI_CtrSampleClock(1), 2094 NI_CtrSampleClock(2), 2095 NI_CtrSampleClock(3), 2096 NI_AO_SampleClock, 2097 NI_AO_StartTrigger, 2098 NI_AO_PauseTrigger, 2099 NI_DI_SampleClock, 2100 NI_DI_StartTrigger, 2101 NI_DI_ReferenceTrigger, 2102 NI_DI_PauseTrigger, 2103 NI_DO_SampleClock, 2104 NI_DO_StartTrigger, 2105 NI_DO_PauseTrigger, 2106 NI_10MHzRefClock, 2107 NI_ChangeDetectionEvent, 2108 NI_WatchdogExpiredEvent, 2109 0, /* Termination */ 2110 } 2111 }, 2112 { 2113 .dest = NI_CtrArmStartTrigger(1), 2114 .src = (int[]){ 2115 NI_PFI(0), 2116 NI_PFI(1), 2117 NI_PFI(2), 2118 NI_PFI(3), 2119 NI_PFI(4), 2120 NI_PFI(5), 2121 NI_PFI(6), 2122 NI_PFI(7), 2123 TRIGGER_LINE(0), 2124 TRIGGER_LINE(1), 2125 TRIGGER_LINE(2), 2126 TRIGGER_LINE(3), 2127 TRIGGER_LINE(4), 2128 TRIGGER_LINE(5), 2129 TRIGGER_LINE(6), 2130 TRIGGER_LINE(7), 2131 NI_CtrSource(0), 2132 NI_CtrSource(2), 2133 NI_CtrSource(3), 2134 NI_CtrGate(0), 2135 NI_CtrGate(2), 2136 NI_CtrGate(3), 2137 NI_CtrArmStartTrigger(0), 2138 NI_CtrArmStartTrigger(2), 2139 NI_CtrArmStartTrigger(3), 2140 NI_CtrInternalOutput(0), 2141 NI_CtrInternalOutput(1), 2142 NI_CtrInternalOutput(2), 2143 NI_CtrInternalOutput(3), 2144 NI_CtrSampleClock(0), 2145 NI_CtrSampleClock(2), 2146 NI_CtrSampleClock(3), 2147 NI_AO_SampleClock, 2148 NI_AO_StartTrigger, 2149 NI_AO_PauseTrigger, 2150 NI_DI_SampleClock, 2151 NI_DI_StartTrigger, 2152 NI_DI_ReferenceTrigger, 2153 NI_DI_PauseTrigger, 2154 NI_DO_SampleClock, 2155 NI_DO_StartTrigger, 2156 NI_DO_PauseTrigger, 2157 NI_10MHzRefClock, 2158 NI_ChangeDetectionEvent, 2159 NI_WatchdogExpiredEvent, 2160 0, /* Termination */ 2161 } 2162 }, 2163 { 2164 .dest = NI_CtrArmStartTrigger(2), 2165 .src = (int[]){ 2166 NI_PFI(0), 2167 NI_PFI(1), 2168 NI_PFI(2), 2169 NI_PFI(3), 2170 NI_PFI(4), 2171 NI_PFI(5), 2172 NI_PFI(6), 2173 NI_PFI(7), 2174 TRIGGER_LINE(0), 2175 TRIGGER_LINE(1), 2176 TRIGGER_LINE(2), 2177 TRIGGER_LINE(3), 2178 TRIGGER_LINE(4), 2179 TRIGGER_LINE(5), 2180 TRIGGER_LINE(6), 2181 TRIGGER_LINE(7), 2182 NI_CtrSource(0), 2183 NI_CtrSource(1), 2184 NI_CtrSource(3), 2185 NI_CtrGate(0), 2186 NI_CtrGate(1), 2187 NI_CtrGate(3), 2188 NI_CtrArmStartTrigger(0), 2189 NI_CtrArmStartTrigger(1), 2190 NI_CtrArmStartTrigger(3), 2191 NI_CtrInternalOutput(0), 2192 NI_CtrInternalOutput(1), 2193 NI_CtrInternalOutput(2), 2194 NI_CtrInternalOutput(3), 2195 NI_CtrSampleClock(0), 2196 NI_CtrSampleClock(1), 2197 NI_CtrSampleClock(3), 2198 NI_AO_SampleClock, 2199 NI_AO_StartTrigger, 2200 NI_AO_PauseTrigger, 2201 NI_DI_SampleClock, 2202 NI_DI_StartTrigger, 2203 NI_DI_ReferenceTrigger, 2204 NI_DI_PauseTrigger, 2205 NI_DO_SampleClock, 2206 NI_DO_StartTrigger, 2207 NI_DO_PauseTrigger, 2208 NI_10MHzRefClock, 2209 NI_ChangeDetectionEvent, 2210 NI_WatchdogExpiredEvent, 2211 0, /* Termination */ 2212 } 2213 }, 2214 { 2215 .dest = NI_CtrArmStartTrigger(3), 2216 .src = (int[]){ 2217 NI_PFI(0), 2218 NI_PFI(1), 2219 NI_PFI(2), 2220 NI_PFI(3), 2221 NI_PFI(4), 2222 NI_PFI(5), 2223 NI_PFI(6), 2224 NI_PFI(7), 2225 TRIGGER_LINE(0), 2226 TRIGGER_LINE(1), 2227 TRIGGER_LINE(2), 2228 TRIGGER_LINE(3), 2229 TRIGGER_LINE(4), 2230 TRIGGER_LINE(5), 2231 TRIGGER_LINE(6), 2232 TRIGGER_LINE(7), 2233 NI_CtrSource(0), 2234 NI_CtrSource(1), 2235 NI_CtrSource(2), 2236 NI_CtrGate(0), 2237 NI_CtrGate(1), 2238 NI_CtrGate(2), 2239 NI_CtrArmStartTrigger(0), 2240 NI_CtrArmStartTrigger(1), 2241 NI_CtrArmStartTrigger(2), 2242 NI_CtrInternalOutput(0), 2243 NI_CtrInternalOutput(1), 2244 NI_CtrInternalOutput(2), 2245 NI_CtrInternalOutput(3), 2246 NI_CtrSampleClock(0), 2247 NI_CtrSampleClock(1), 2248 NI_CtrSampleClock(2), 2249 NI_AO_SampleClock, 2250 NI_AO_StartTrigger, 2251 NI_AO_PauseTrigger, 2252 NI_DI_SampleClock, 2253 NI_DI_StartTrigger, 2254 NI_DI_ReferenceTrigger, 2255 NI_DI_PauseTrigger, 2256 NI_DO_SampleClock, 2257 NI_DO_StartTrigger, 2258 NI_DO_PauseTrigger, 2259 NI_10MHzRefClock, 2260 NI_ChangeDetectionEvent, 2261 NI_WatchdogExpiredEvent, 2262 0, /* Termination */ 2263 } 2264 }, 2265 { 2266 .dest = NI_CtrSampleClock(0), 2267 .src = (int[]){ 2268 NI_PFI(0), 2269 NI_PFI(1), 2270 NI_PFI(2), 2271 NI_PFI(3), 2272 NI_PFI(4), 2273 NI_PFI(5), 2274 NI_PFI(6), 2275 NI_PFI(7), 2276 TRIGGER_LINE(0), 2277 TRIGGER_LINE(1), 2278 TRIGGER_LINE(2), 2279 TRIGGER_LINE(3), 2280 TRIGGER_LINE(4), 2281 TRIGGER_LINE(5), 2282 TRIGGER_LINE(6), 2283 TRIGGER_LINE(7), 2284 NI_CtrSource(1), 2285 NI_CtrSource(2), 2286 NI_CtrSource(3), 2287 NI_CtrGate(1), 2288 NI_CtrGate(2), 2289 NI_CtrGate(3), 2290 NI_CtrArmStartTrigger(1), 2291 NI_CtrArmStartTrigger(2), 2292 NI_CtrArmStartTrigger(3), 2293 NI_CtrInternalOutput(0), 2294 NI_CtrInternalOutput(1), 2295 NI_CtrInternalOutput(2), 2296 NI_CtrInternalOutput(3), 2297 NI_CtrSampleClock(1), 2298 NI_CtrSampleClock(2), 2299 NI_CtrSampleClock(3), 2300 NI_AO_SampleClock, 2301 NI_AO_StartTrigger, 2302 NI_AO_PauseTrigger, 2303 NI_DI_SampleClock, 2304 NI_DI_StartTrigger, 2305 NI_DI_ReferenceTrigger, 2306 NI_DI_PauseTrigger, 2307 NI_DO_SampleClock, 2308 NI_DO_StartTrigger, 2309 NI_DO_PauseTrigger, 2310 NI_10MHzRefClock, 2311 NI_ChangeDetectionEvent, 2312 NI_WatchdogExpiredEvent, 2313 0, /* Termination */ 2314 } 2315 }, 2316 { 2317 .dest = NI_CtrSampleClock(1), 2318 .src = (int[]){ 2319 NI_PFI(0), 2320 NI_PFI(1), 2321 NI_PFI(2), 2322 NI_PFI(3), 2323 NI_PFI(4), 2324 NI_PFI(5), 2325 NI_PFI(6), 2326 NI_PFI(7), 2327 TRIGGER_LINE(0), 2328 TRIGGER_LINE(1), 2329 TRIGGER_LINE(2), 2330 TRIGGER_LINE(3), 2331 TRIGGER_LINE(4), 2332 TRIGGER_LINE(5), 2333 TRIGGER_LINE(6), 2334 TRIGGER_LINE(7), 2335 NI_CtrSource(0), 2336 NI_CtrSource(2), 2337 NI_CtrSource(3), 2338 NI_CtrGate(0), 2339 NI_CtrGate(2), 2340 NI_CtrGate(3), 2341 NI_CtrArmStartTrigger(0), 2342 NI_CtrArmStartTrigger(2), 2343 NI_CtrArmStartTrigger(3), 2344 NI_CtrInternalOutput(0), 2345 NI_CtrInternalOutput(1), 2346 NI_CtrInternalOutput(2), 2347 NI_CtrInternalOutput(3), 2348 NI_CtrSampleClock(0), 2349 NI_CtrSampleClock(2), 2350 NI_CtrSampleClock(3), 2351 NI_AO_SampleClock, 2352 NI_AO_StartTrigger, 2353 NI_AO_PauseTrigger, 2354 NI_DI_SampleClock, 2355 NI_DI_StartTrigger, 2356 NI_DI_ReferenceTrigger, 2357 NI_DI_PauseTrigger, 2358 NI_DO_SampleClock, 2359 NI_DO_StartTrigger, 2360 NI_DO_PauseTrigger, 2361 NI_10MHzRefClock, 2362 NI_ChangeDetectionEvent, 2363 NI_WatchdogExpiredEvent, 2364 0, /* Termination */ 2365 } 2366 }, 2367 { 2368 .dest = NI_CtrSampleClock(2), 2369 .src = (int[]){ 2370 NI_PFI(0), 2371 NI_PFI(1), 2372 NI_PFI(2), 2373 NI_PFI(3), 2374 NI_PFI(4), 2375 NI_PFI(5), 2376 NI_PFI(6), 2377 NI_PFI(7), 2378 TRIGGER_LINE(0), 2379 TRIGGER_LINE(1), 2380 TRIGGER_LINE(2), 2381 TRIGGER_LINE(3), 2382 TRIGGER_LINE(4), 2383 TRIGGER_LINE(5), 2384 TRIGGER_LINE(6), 2385 TRIGGER_LINE(7), 2386 NI_CtrSource(0), 2387 NI_CtrSource(1), 2388 NI_CtrSource(3), 2389 NI_CtrGate(0), 2390 NI_CtrGate(1), 2391 NI_CtrGate(3), 2392 NI_CtrArmStartTrigger(0), 2393 NI_CtrArmStartTrigger(1), 2394 NI_CtrArmStartTrigger(3), 2395 NI_CtrInternalOutput(0), 2396 NI_CtrInternalOutput(1), 2397 NI_CtrInternalOutput(2), 2398 NI_CtrInternalOutput(3), 2399 NI_CtrSampleClock(0), 2400 NI_CtrSampleClock(1), 2401 NI_CtrSampleClock(3), 2402 NI_AO_SampleClock, 2403 NI_AO_StartTrigger, 2404 NI_AO_PauseTrigger, 2405 NI_DI_SampleClock, 2406 NI_DI_StartTrigger, 2407 NI_DI_ReferenceTrigger, 2408 NI_DI_PauseTrigger, 2409 NI_DO_SampleClock, 2410 NI_DO_StartTrigger, 2411 NI_DO_PauseTrigger, 2412 NI_10MHzRefClock, 2413 NI_ChangeDetectionEvent, 2414 NI_WatchdogExpiredEvent, 2415 0, /* Termination */ 2416 } 2417 }, 2418 { 2419 .dest = NI_CtrSampleClock(3), 2420 .src = (int[]){ 2421 NI_PFI(0), 2422 NI_PFI(1), 2423 NI_PFI(2), 2424 NI_PFI(3), 2425 NI_PFI(4), 2426 NI_PFI(5), 2427 NI_PFI(6), 2428 NI_PFI(7), 2429 TRIGGER_LINE(0), 2430 TRIGGER_LINE(1), 2431 TRIGGER_LINE(2), 2432 TRIGGER_LINE(3), 2433 TRIGGER_LINE(4), 2434 TRIGGER_LINE(5), 2435 TRIGGER_LINE(6), 2436 TRIGGER_LINE(7), 2437 NI_CtrSource(0), 2438 NI_CtrSource(1), 2439 NI_CtrSource(2), 2440 NI_CtrGate(0), 2441 NI_CtrGate(1), 2442 NI_CtrGate(2), 2443 NI_CtrArmStartTrigger(0), 2444 NI_CtrArmStartTrigger(1), 2445 NI_CtrArmStartTrigger(2), 2446 NI_CtrInternalOutput(0), 2447 NI_CtrInternalOutput(1), 2448 NI_CtrInternalOutput(2), 2449 NI_CtrInternalOutput(3), 2450 NI_CtrSampleClock(0), 2451 NI_CtrSampleClock(1), 2452 NI_CtrSampleClock(2), 2453 NI_AO_SampleClock, 2454 NI_AO_StartTrigger, 2455 NI_AO_PauseTrigger, 2456 NI_DI_SampleClock, 2457 NI_DI_StartTrigger, 2458 NI_DI_ReferenceTrigger, 2459 NI_DI_PauseTrigger, 2460 NI_DO_SampleClock, 2461 NI_DO_StartTrigger, 2462 NI_DO_PauseTrigger, 2463 NI_10MHzRefClock, 2464 NI_ChangeDetectionEvent, 2465 NI_WatchdogExpiredEvent, 2466 0, /* Termination */ 2467 } 2468 }, 2469 { 2470 .dest = NI_AO_SampleClock, 2471 .src = (int[]){ 2472 NI_PFI(0), 2473 NI_PFI(1), 2474 NI_PFI(2), 2475 NI_PFI(3), 2476 NI_PFI(4), 2477 NI_PFI(5), 2478 NI_PFI(6), 2479 NI_PFI(7), 2480 TRIGGER_LINE(0), 2481 TRIGGER_LINE(1), 2482 TRIGGER_LINE(2), 2483 TRIGGER_LINE(3), 2484 TRIGGER_LINE(4), 2485 TRIGGER_LINE(5), 2486 TRIGGER_LINE(6), 2487 TRIGGER_LINE(7), 2488 NI_CtrSource(0), 2489 NI_CtrSource(1), 2490 NI_CtrSource(2), 2491 NI_CtrSource(3), 2492 NI_CtrGate(0), 2493 NI_CtrGate(1), 2494 NI_CtrGate(2), 2495 NI_CtrGate(3), 2496 NI_CtrArmStartTrigger(0), 2497 NI_CtrArmStartTrigger(1), 2498 NI_CtrArmStartTrigger(2), 2499 NI_CtrArmStartTrigger(3), 2500 NI_CtrInternalOutput(0), 2501 NI_CtrInternalOutput(1), 2502 NI_CtrInternalOutput(2), 2503 NI_CtrInternalOutput(3), 2504 NI_CtrSampleClock(0), 2505 NI_CtrSampleClock(1), 2506 NI_CtrSampleClock(2), 2507 NI_CtrSampleClock(3), 2508 NI_AO_SampleClockTimebase, 2509 NI_DI_SampleClock, 2510 NI_DI_ReferenceTrigger, 2511 NI_DI_PauseTrigger, 2512 NI_DO_SampleClock, 2513 NI_DO_StartTrigger, 2514 NI_DO_PauseTrigger, 2515 NI_10MHzRefClock, 2516 NI_ChangeDetectionEvent, 2517 NI_WatchdogExpiredEvent, 2518 0, /* Termination */ 2519 } 2520 }, 2521 { 2522 .dest = NI_AO_SampleClockTimebase, 2523 .src = (int[]){ 2524 NI_PFI(0), 2525 NI_PFI(1), 2526 NI_PFI(2), 2527 NI_PFI(3), 2528 NI_PFI(4), 2529 NI_PFI(5), 2530 NI_PFI(6), 2531 NI_PFI(7), 2532 TRIGGER_LINE(0), 2533 TRIGGER_LINE(1), 2534 TRIGGER_LINE(2), 2535 TRIGGER_LINE(3), 2536 TRIGGER_LINE(4), 2537 TRIGGER_LINE(5), 2538 TRIGGER_LINE(6), 2539 TRIGGER_LINE(7), 2540 PXI_Clk10, 2541 NI_20MHzTimebase, 2542 NI_100MHzTimebase, 2543 NI_100kHzTimebase, 2544 0, /* Termination */ 2545 } 2546 }, 2547 { 2548 .dest = NI_AO_StartTrigger, 2549 .src = (int[]){ 2550 NI_PFI(0), 2551 NI_PFI(1), 2552 NI_PFI(2), 2553 NI_PFI(3), 2554 NI_PFI(4), 2555 NI_PFI(5), 2556 NI_PFI(6), 2557 NI_PFI(7), 2558 TRIGGER_LINE(0), 2559 TRIGGER_LINE(1), 2560 TRIGGER_LINE(2), 2561 TRIGGER_LINE(3), 2562 TRIGGER_LINE(4), 2563 TRIGGER_LINE(5), 2564 TRIGGER_LINE(6), 2565 TRIGGER_LINE(7), 2566 NI_CtrSource(0), 2567 NI_CtrSource(1), 2568 NI_CtrSource(2), 2569 NI_CtrSource(3), 2570 NI_CtrGate(0), 2571 NI_CtrGate(1), 2572 NI_CtrGate(2), 2573 NI_CtrGate(3), 2574 NI_CtrArmStartTrigger(0), 2575 NI_CtrArmStartTrigger(1), 2576 NI_CtrArmStartTrigger(2), 2577 NI_CtrArmStartTrigger(3), 2578 NI_CtrInternalOutput(0), 2579 NI_CtrInternalOutput(1), 2580 NI_CtrInternalOutput(2), 2581 NI_CtrInternalOutput(3), 2582 NI_CtrSampleClock(0), 2583 NI_CtrSampleClock(1), 2584 NI_CtrSampleClock(2), 2585 NI_CtrSampleClock(3), 2586 NI_DI_SampleClock, 2587 NI_DI_StartTrigger, 2588 NI_DI_ReferenceTrigger, 2589 NI_DI_PauseTrigger, 2590 NI_DO_SampleClock, 2591 NI_DO_StartTrigger, 2592 NI_DO_PauseTrigger, 2593 NI_10MHzRefClock, 2594 NI_ChangeDetectionEvent, 2595 NI_WatchdogExpiredEvent, 2596 0, /* Termination */ 2597 } 2598 }, 2599 { 2600 .dest = NI_AO_PauseTrigger, 2601 .src = (int[]){ 2602 NI_PFI(0), 2603 NI_PFI(1), 2604 NI_PFI(2), 2605 NI_PFI(3), 2606 NI_PFI(4), 2607 NI_PFI(5), 2608 NI_PFI(6), 2609 NI_PFI(7), 2610 TRIGGER_LINE(0), 2611 TRIGGER_LINE(1), 2612 TRIGGER_LINE(2), 2613 TRIGGER_LINE(3), 2614 TRIGGER_LINE(4), 2615 TRIGGER_LINE(5), 2616 TRIGGER_LINE(6), 2617 TRIGGER_LINE(7), 2618 NI_CtrSource(0), 2619 NI_CtrSource(1), 2620 NI_CtrSource(2), 2621 NI_CtrSource(3), 2622 NI_CtrGate(0), 2623 NI_CtrGate(1), 2624 NI_CtrGate(2), 2625 NI_CtrGate(3), 2626 NI_CtrArmStartTrigger(0), 2627 NI_CtrArmStartTrigger(1), 2628 NI_CtrArmStartTrigger(2), 2629 NI_CtrArmStartTrigger(3), 2630 NI_CtrInternalOutput(0), 2631 NI_CtrInternalOutput(1), 2632 NI_CtrInternalOutput(2), 2633 NI_CtrInternalOutput(3), 2634 NI_CtrSampleClock(0), 2635 NI_CtrSampleClock(1), 2636 NI_CtrSampleClock(2), 2637 NI_CtrSampleClock(3), 2638 NI_DI_SampleClock, 2639 NI_DI_StartTrigger, 2640 NI_DI_ReferenceTrigger, 2641 NI_DI_PauseTrigger, 2642 NI_DO_SampleClock, 2643 NI_DO_StartTrigger, 2644 NI_DO_PauseTrigger, 2645 NI_10MHzRefClock, 2646 NI_ChangeDetectionEvent, 2647 NI_WatchdogExpiredEvent, 2648 0, /* Termination */ 2649 } 2650 }, 2651 { 2652 .dest = NI_DI_SampleClock, 2653 .src = (int[]){ 2654 NI_PFI(0), 2655 NI_PFI(1), 2656 NI_PFI(2), 2657 NI_PFI(3), 2658 NI_PFI(4), 2659 NI_PFI(5), 2660 NI_PFI(6), 2661 NI_PFI(7), 2662 TRIGGER_LINE(0), 2663 TRIGGER_LINE(1), 2664 TRIGGER_LINE(2), 2665 TRIGGER_LINE(3), 2666 TRIGGER_LINE(4), 2667 TRIGGER_LINE(5), 2668 TRIGGER_LINE(6), 2669 TRIGGER_LINE(7), 2670 NI_CtrSource(0), 2671 NI_CtrSource(1), 2672 NI_CtrSource(2), 2673 NI_CtrSource(3), 2674 NI_CtrGate(0), 2675 NI_CtrGate(1), 2676 NI_CtrGate(2), 2677 NI_CtrGate(3), 2678 NI_CtrArmStartTrigger(0), 2679 NI_CtrArmStartTrigger(1), 2680 NI_CtrArmStartTrigger(2), 2681 NI_CtrArmStartTrigger(3), 2682 NI_CtrInternalOutput(0), 2683 NI_CtrInternalOutput(1), 2684 NI_CtrInternalOutput(2), 2685 NI_CtrInternalOutput(3), 2686 NI_CtrSampleClock(0), 2687 NI_CtrSampleClock(1), 2688 NI_CtrSampleClock(2), 2689 NI_CtrSampleClock(3), 2690 NI_AO_SampleClock, 2691 NI_AO_StartTrigger, 2692 NI_AO_PauseTrigger, 2693 NI_DO_SampleClock, 2694 NI_DO_StartTrigger, 2695 NI_DO_PauseTrigger, 2696 NI_10MHzRefClock, 2697 NI_ChangeDetectionEvent, 2698 NI_WatchdogExpiredEvent, 2699 0, /* Termination */ 2700 } 2701 }, 2702 { 2703 .dest = NI_DI_SampleClockTimebase, 2704 .src = (int[]){ 2705 NI_PFI(0), 2706 NI_PFI(1), 2707 NI_PFI(2), 2708 NI_PFI(3), 2709 NI_PFI(4), 2710 NI_PFI(5), 2711 NI_PFI(6), 2712 NI_PFI(7), 2713 TRIGGER_LINE(0), 2714 TRIGGER_LINE(1), 2715 TRIGGER_LINE(2), 2716 TRIGGER_LINE(3), 2717 TRIGGER_LINE(4), 2718 TRIGGER_LINE(5), 2719 TRIGGER_LINE(6), 2720 TRIGGER_LINE(7), 2721 PXI_Clk10, 2722 NI_DI_SampleClockTimebase, 2723 NI_20MHzTimebase, 2724 NI_100MHzTimebase, 2725 NI_100kHzTimebase, 2726 0, /* Termination */ 2727 } 2728 }, 2729 { 2730 .dest = NI_DI_StartTrigger, 2731 .src = (int[]){ 2732 NI_PFI(0), 2733 NI_PFI(1), 2734 NI_PFI(2), 2735 NI_PFI(3), 2736 NI_PFI(4), 2737 NI_PFI(5), 2738 NI_PFI(6), 2739 NI_PFI(7), 2740 TRIGGER_LINE(0), 2741 TRIGGER_LINE(1), 2742 TRIGGER_LINE(2), 2743 TRIGGER_LINE(3), 2744 TRIGGER_LINE(4), 2745 TRIGGER_LINE(5), 2746 TRIGGER_LINE(6), 2747 TRIGGER_LINE(7), 2748 NI_CtrSource(0), 2749 NI_CtrSource(1), 2750 NI_CtrSource(2), 2751 NI_CtrSource(3), 2752 NI_CtrGate(0), 2753 NI_CtrGate(1), 2754 NI_CtrGate(2), 2755 NI_CtrGate(3), 2756 NI_CtrArmStartTrigger(0), 2757 NI_CtrArmStartTrigger(1), 2758 NI_CtrArmStartTrigger(2), 2759 NI_CtrArmStartTrigger(3), 2760 NI_CtrInternalOutput(0), 2761 NI_CtrInternalOutput(1), 2762 NI_CtrInternalOutput(2), 2763 NI_CtrInternalOutput(3), 2764 NI_CtrSampleClock(0), 2765 NI_CtrSampleClock(1), 2766 NI_CtrSampleClock(2), 2767 NI_CtrSampleClock(3), 2768 NI_AO_SampleClock, 2769 NI_AO_StartTrigger, 2770 NI_AO_PauseTrigger, 2771 NI_DO_SampleClock, 2772 NI_DO_StartTrigger, 2773 NI_DO_PauseTrigger, 2774 NI_10MHzRefClock, 2775 NI_ChangeDetectionEvent, 2776 NI_WatchdogExpiredEvent, 2777 0, /* Termination */ 2778 } 2779 }, 2780 { 2781 .dest = NI_DI_ReferenceTrigger, 2782 .src = (int[]){ 2783 NI_PFI(0), 2784 NI_PFI(1), 2785 NI_PFI(2), 2786 NI_PFI(3), 2787 NI_PFI(4), 2788 NI_PFI(5), 2789 NI_PFI(6), 2790 NI_PFI(7), 2791 TRIGGER_LINE(0), 2792 TRIGGER_LINE(1), 2793 TRIGGER_LINE(2), 2794 TRIGGER_LINE(3), 2795 TRIGGER_LINE(4), 2796 TRIGGER_LINE(5), 2797 TRIGGER_LINE(6), 2798 TRIGGER_LINE(7), 2799 NI_CtrSource(0), 2800 NI_CtrSource(1), 2801 NI_CtrSource(2), 2802 NI_CtrSource(3), 2803 NI_CtrGate(0), 2804 NI_CtrGate(1), 2805 NI_CtrGate(2), 2806 NI_CtrGate(3), 2807 NI_CtrArmStartTrigger(0), 2808 NI_CtrArmStartTrigger(1), 2809 NI_CtrArmStartTrigger(2), 2810 NI_CtrArmStartTrigger(3), 2811 NI_CtrInternalOutput(0), 2812 NI_CtrInternalOutput(1), 2813 NI_CtrInternalOutput(2), 2814 NI_CtrInternalOutput(3), 2815 NI_CtrSampleClock(0), 2816 NI_CtrSampleClock(1), 2817 NI_CtrSampleClock(2), 2818 NI_CtrSampleClock(3), 2819 NI_AO_SampleClock, 2820 NI_AO_StartTrigger, 2821 NI_AO_PauseTrigger, 2822 NI_DO_SampleClock, 2823 NI_DO_StartTrigger, 2824 NI_DO_PauseTrigger, 2825 NI_10MHzRefClock, 2826 NI_ChangeDetectionEvent, 2827 NI_WatchdogExpiredEvent, 2828 0, /* Termination */ 2829 } 2830 }, 2831 { 2832 .dest = NI_DI_PauseTrigger, 2833 .src = (int[]){ 2834 NI_PFI(0), 2835 NI_PFI(1), 2836 NI_PFI(2), 2837 NI_PFI(3), 2838 NI_PFI(4), 2839 NI_PFI(5), 2840 NI_PFI(6), 2841 NI_PFI(7), 2842 TRIGGER_LINE(0), 2843 TRIGGER_LINE(1), 2844 TRIGGER_LINE(2), 2845 TRIGGER_LINE(3), 2846 TRIGGER_LINE(4), 2847 TRIGGER_LINE(5), 2848 TRIGGER_LINE(6), 2849 TRIGGER_LINE(7), 2850 NI_CtrSource(0), 2851 NI_CtrSource(1), 2852 NI_CtrSource(2), 2853 NI_CtrSource(3), 2854 NI_CtrGate(0), 2855 NI_CtrGate(1), 2856 NI_CtrGate(2), 2857 NI_CtrGate(3), 2858 NI_CtrArmStartTrigger(0), 2859 NI_CtrArmStartTrigger(1), 2860 NI_CtrArmStartTrigger(2), 2861 NI_CtrArmStartTrigger(3), 2862 NI_CtrInternalOutput(0), 2863 NI_CtrInternalOutput(1), 2864 NI_CtrInternalOutput(2), 2865 NI_CtrInternalOutput(3), 2866 NI_CtrSampleClock(0), 2867 NI_CtrSampleClock(1), 2868 NI_CtrSampleClock(2), 2869 NI_CtrSampleClock(3), 2870 NI_AO_SampleClock, 2871 NI_AO_StartTrigger, 2872 NI_AO_PauseTrigger, 2873 NI_DO_SampleClock, 2874 NI_DO_StartTrigger, 2875 NI_DO_PauseTrigger, 2876 NI_10MHzRefClock, 2877 NI_ChangeDetectionEvent, 2878 NI_WatchdogExpiredEvent, 2879 0, /* Termination */ 2880 } 2881 }, 2882 { 2883 .dest = NI_DO_SampleClock, 2884 .src = (int[]){ 2885 NI_PFI(0), 2886 NI_PFI(1), 2887 NI_PFI(2), 2888 NI_PFI(3), 2889 NI_PFI(4), 2890 NI_PFI(5), 2891 NI_PFI(6), 2892 NI_PFI(7), 2893 TRIGGER_LINE(0), 2894 TRIGGER_LINE(1), 2895 TRIGGER_LINE(2), 2896 TRIGGER_LINE(3), 2897 TRIGGER_LINE(4), 2898 TRIGGER_LINE(5), 2899 TRIGGER_LINE(6), 2900 TRIGGER_LINE(7), 2901 NI_CtrSource(0), 2902 NI_CtrSource(1), 2903 NI_CtrSource(2), 2904 NI_CtrSource(3), 2905 NI_CtrGate(0), 2906 NI_CtrGate(1), 2907 NI_CtrGate(2), 2908 NI_CtrGate(3), 2909 NI_CtrArmStartTrigger(0), 2910 NI_CtrArmStartTrigger(1), 2911 NI_CtrArmStartTrigger(2), 2912 NI_CtrArmStartTrigger(3), 2913 NI_CtrInternalOutput(0), 2914 NI_CtrInternalOutput(1), 2915 NI_CtrInternalOutput(2), 2916 NI_CtrInternalOutput(3), 2917 NI_CtrSampleClock(0), 2918 NI_CtrSampleClock(1), 2919 NI_CtrSampleClock(2), 2920 NI_CtrSampleClock(3), 2921 NI_AO_SampleClock, 2922 NI_AO_StartTrigger, 2923 NI_AO_PauseTrigger, 2924 NI_DI_SampleClock, 2925 NI_DI_ReferenceTrigger, 2926 NI_DI_PauseTrigger, 2927 NI_DO_SampleClockTimebase, 2928 NI_10MHzRefClock, 2929 NI_ChangeDetectionEvent, 2930 NI_WatchdogExpiredEvent, 2931 0, /* Termination */ 2932 } 2933 }, 2934 { 2935 .dest = NI_DO_SampleClockTimebase, 2936 .src = (int[]){ 2937 NI_PFI(0), 2938 NI_PFI(1), 2939 NI_PFI(2), 2940 NI_PFI(3), 2941 NI_PFI(4), 2942 NI_PFI(5), 2943 NI_PFI(6), 2944 NI_PFI(7), 2945 TRIGGER_LINE(0), 2946 TRIGGER_LINE(1), 2947 TRIGGER_LINE(2), 2948 TRIGGER_LINE(3), 2949 TRIGGER_LINE(4), 2950 TRIGGER_LINE(5), 2951 TRIGGER_LINE(6), 2952 TRIGGER_LINE(7), 2953 PXI_Clk10, 2954 NI_20MHzTimebase, 2955 NI_100MHzTimebase, 2956 NI_100kHzTimebase, 2957 0, /* Termination */ 2958 } 2959 }, 2960 { 2961 .dest = NI_DO_StartTrigger, 2962 .src = (int[]){ 2963 NI_PFI(0), 2964 NI_PFI(1), 2965 NI_PFI(2), 2966 NI_PFI(3), 2967 NI_PFI(4), 2968 NI_PFI(5), 2969 NI_PFI(6), 2970 NI_PFI(7), 2971 TRIGGER_LINE(0), 2972 TRIGGER_LINE(1), 2973 TRIGGER_LINE(2), 2974 TRIGGER_LINE(3), 2975 TRIGGER_LINE(4), 2976 TRIGGER_LINE(5), 2977 TRIGGER_LINE(6), 2978 TRIGGER_LINE(7), 2979 NI_CtrSource(0), 2980 NI_CtrSource(1), 2981 NI_CtrSource(2), 2982 NI_CtrSource(3), 2983 NI_CtrGate(0), 2984 NI_CtrGate(1), 2985 NI_CtrGate(2), 2986 NI_CtrGate(3), 2987 NI_CtrArmStartTrigger(0), 2988 NI_CtrArmStartTrigger(1), 2989 NI_CtrArmStartTrigger(2), 2990 NI_CtrArmStartTrigger(3), 2991 NI_CtrInternalOutput(0), 2992 NI_CtrInternalOutput(1), 2993 NI_CtrInternalOutput(2), 2994 NI_CtrInternalOutput(3), 2995 NI_CtrSampleClock(0), 2996 NI_CtrSampleClock(1), 2997 NI_CtrSampleClock(2), 2998 NI_CtrSampleClock(3), 2999 NI_AO_SampleClock, 3000 NI_AO_StartTrigger, 3001 NI_AO_PauseTrigger, 3002 NI_DI_SampleClock, 3003 NI_DI_StartTrigger, 3004 NI_DI_ReferenceTrigger, 3005 NI_DI_PauseTrigger, 3006 NI_10MHzRefClock, 3007 NI_ChangeDetectionEvent, 3008 NI_WatchdogExpiredEvent, 3009 0, /* Termination */ 3010 } 3011 }, 3012 { 3013 .dest = NI_DO_PauseTrigger, 3014 .src = (int[]){ 3015 NI_PFI(0), 3016 NI_PFI(1), 3017 NI_PFI(2), 3018 NI_PFI(3), 3019 NI_PFI(4), 3020 NI_PFI(5), 3021 NI_PFI(6), 3022 NI_PFI(7), 3023 TRIGGER_LINE(0), 3024 TRIGGER_LINE(1), 3025 TRIGGER_LINE(2), 3026 TRIGGER_LINE(3), 3027 TRIGGER_LINE(4), 3028 TRIGGER_LINE(5), 3029 TRIGGER_LINE(6), 3030 TRIGGER_LINE(7), 3031 NI_CtrSource(0), 3032 NI_CtrSource(1), 3033 NI_CtrSource(2), 3034 NI_CtrSource(3), 3035 NI_CtrGate(0), 3036 NI_CtrGate(1), 3037 NI_CtrGate(2), 3038 NI_CtrGate(3), 3039 NI_CtrArmStartTrigger(0), 3040 NI_CtrArmStartTrigger(1), 3041 NI_CtrArmStartTrigger(2), 3042 NI_CtrArmStartTrigger(3), 3043 NI_CtrInternalOutput(0), 3044 NI_CtrInternalOutput(1), 3045 NI_CtrInternalOutput(2), 3046 NI_CtrInternalOutput(3), 3047 NI_CtrSampleClock(0), 3048 NI_CtrSampleClock(1), 3049 NI_CtrSampleClock(2), 3050 NI_CtrSampleClock(3), 3051 NI_AO_SampleClock, 3052 NI_AO_StartTrigger, 3053 NI_AO_PauseTrigger, 3054 NI_DI_SampleClock, 3055 NI_DI_StartTrigger, 3056 NI_DI_ReferenceTrigger, 3057 NI_DI_PauseTrigger, 3058 NI_10MHzRefClock, 3059 NI_ChangeDetectionEvent, 3060 NI_WatchdogExpiredEvent, 3061 0, /* Termination */ 3062 } 3063 }, 3064 { 3065 .dest = NI_WatchdogExpirationTrigger, 3066 .src = (int[]){ 3067 TRIGGER_LINE(0), 3068 TRIGGER_LINE(1), 3069 TRIGGER_LINE(2), 3070 TRIGGER_LINE(3), 3071 TRIGGER_LINE(4), 3072 TRIGGER_LINE(5), 3073 TRIGGER_LINE(6), 3074 TRIGGER_LINE(7), 3075 0, /* Termination */ 3076 } 3077 }, 3078 { /* Termination of list */ 3079 .dest = 0, 3080 }, 3081 }, 3082};
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