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clk-mt8196-vdisp_ao.c

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linux-6.19.14/drivers/clk/mediatek/clk-mt8196-vdisp_ao.c C
 1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright (c) 2025 MediaTek Inc.
 4 *                    Guangjie Song <guangjie.song@mediatek.com>
 5 * Copyright (c) 2025 Collabora Ltd.
 6 *                    Laura Nao <laura.nao@collabora.com>
 7 */
 8#include <dt-bindings/clock/mediatek,mt8196-clock.h>
 9
10#include <linux/clk-provider.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13#include <linux/platform_device.h>
14
15#include "clk-gate.h"
16#include "clk-mtk.h"
17
18static const struct mtk_gate_regs mm_v_cg_regs = {
19	.set_ofs = 0x104,
20	.clr_ofs = 0x108,
21	.sta_ofs = 0x100,
22};
23
24static const struct mtk_gate_regs mm_v_hwv_regs = {
25	.set_ofs = 0x0030,
26	.clr_ofs = 0x0034,
27	.sta_ofs = 0x2c18,
28};
29
30#define GATE_MM_AO_V(_id, _name, _parent, _shift) {	\
31		.id = _id,				\
32		.name = _name,				\
33		.parent_name = _parent,			\
34		.regs = &mm_v_cg_regs,			\
35		.shift = _shift,			\
36		.ops = &mtk_clk_gate_ops_setclr,	\
37		.flags = CLK_OPS_PARENT_ENABLE |	\
38			 CLK_IS_CRITICAL,		\
39	}
40
41#define GATE_HWV_MM_V(_id, _name, _parent, _shift) {	\
42		.id = _id,				\
43		.name = _name,				\
44		.parent_name = _parent,			\
45		.regs = &mm_v_cg_regs,			\
46		.hwv_regs = &mm_v_hwv_regs,		\
47		.shift = _shift,			\
48		.ops = &mtk_clk_gate_hwv_ops_setclr,	\
49		.flags = CLK_OPS_PARENT_ENABLE,		\
50	}
51
52static const struct mtk_gate mm_v_clks[] = {
53	GATE_HWV_MM_V(CLK_MM_V_DISP_VDISP_AO_CONFIG, "mm_v_disp_vdisp_ao_config", "disp", 0),
54	GATE_HWV_MM_V(CLK_MM_V_DISP_DPC, "mm_v_disp_dpc", "disp", 16),
55	GATE_MM_AO_V(CLK_MM_V_SMI_SUB_SOMM0, "mm_v_smi_sub_somm0", "disp", 2),
56};
57
58static const struct mtk_clk_desc mm_v_mcd = {
59	.clks = mm_v_clks,
60	.num_clks = ARRAY_SIZE(mm_v_clks),
61};
62
63static const struct of_device_id of_match_clk_mt8196_vdisp_ao[] = {
64	{ .compatible = "mediatek,mt8196-vdisp-ao", .data = &mm_v_mcd },
65	{ /* sentinel */ }
66};
67MODULE_DEVICE_TABLE(of, of_match_clk_mt8196_vdisp_ao);
68
69static struct platform_driver clk_mt8196_vdisp_ao_drv = {
70	.probe = mtk_clk_pdev_probe,
71	.remove = mtk_clk_pdev_remove,
72	.driver = {
73		.name = "clk-mt8196-vdisp-ao",
74		.of_match_table = of_match_clk_mt8196_vdisp_ao,
75	},
76};
77module_platform_driver(clk_mt8196_vdisp_ao_drv);
78
79MODULE_DESCRIPTION("MediaTek MT8196 vdisp_ao clocks driver");
80MODULE_LICENSE("GPL");
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