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hci_qca.c
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linux-6.19.14/drivers/bluetooth/hci_qca.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Bluetooth Software UART Qualcomm protocol 4 * 5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management 6 * protocol extension to H4. 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. 10 * 11 * Acknowledgements: 12 * This file is based on hci_ll.c, which was... 13 * Written by Ohad Ben-Cohen <ohad@bencohen.org> 14 * which was in turn based on hci_h4.c, which was written 15 * by Maxim Krasnyansky and Marcel Holtmann. 16 */ 17 18#include <linux/kernel.h> 19#include <linux/clk.h> 20#include <linux/completion.h> 21#include <linux/debugfs.h> 22#include <linux/delay.h> 23#include <linux/devcoredump.h> 24#include <linux/device.h> 25#include <linux/gpio/consumer.h> 26#include <linux/mod_devicetable.h> 27#include <linux/module.h> 28#include <linux/of.h> 29#include <linux/acpi.h> 30#include <linux/platform_device.h> 31#include <linux/pwrseq/consumer.h> 32#include <linux/regulator/consumer.h> 33#include <linux/serdev.h> 34#include <linux/string_choices.h> 35#include <linux/mutex.h> 36#include <linux/unaligned.h> 37 38#include <net/bluetooth/bluetooth.h> 39#include <net/bluetooth/hci_core.h> 40 41#include "hci_uart.h" 42#include "btqca.h" 43 44/* HCI_IBS protocol messages */ 45#define HCI_IBS_SLEEP_IND 0xFE 46#define HCI_IBS_WAKE_IND 0xFD 47#define HCI_IBS_WAKE_ACK 0xFC 48#define HCI_MAX_IBS_SIZE 10 49 50#define IBS_WAKE_RETRANS_TIMEOUT_MS 100 51#define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200 52#define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 53#define CMD_TRANS_TIMEOUT_MS 100 54#define MEMDUMP_TIMEOUT_MS 8000 55#define IBS_DISABLE_SSR_TIMEOUT_MS \ 56 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS) 57#define FW_DOWNLOAD_TIMEOUT_MS 3000 58 59/* susclk rate */ 60#define SUSCLK_RATE_32KHZ 32768 61 62/* Controller debug log header */ 63#define QCA_DEBUG_HANDLE 0x2EDC 64 65/* max retry count when init fails */ 66#define MAX_INIT_RETRIES 3 67 68/* Controller dump header */ 69#define QCA_SSR_DUMP_HANDLE 0x0108 70#define QCA_DUMP_PACKET_SIZE 255 71#define QCA_LAST_SEQUENCE_NUM 0xFFFF 72#define QCA_CRASHBYTE_PACKET_LEN 1096 73#define QCA_MEMDUMP_BYTE 0xFB 74 75enum qca_flags { 76 QCA_IBS_DISABLED, 77 QCA_DROP_VENDOR_EVENT, 78 QCA_SUSPENDING, 79 QCA_MEMDUMP_COLLECTION, 80 QCA_HW_ERROR_EVENT, 81 QCA_SSR_TRIGGERED, 82 QCA_BT_OFF, 83 QCA_ROM_FW, 84 QCA_DEBUGFS_CREATED, 85}; 86 87enum qca_capabilities { 88 QCA_CAP_WIDEBAND_SPEECH = BIT(0), 89 QCA_CAP_VALID_LE_STATES = BIT(1), 90}; 91 92/* HCI_IBS transmit side sleep protocol states */ 93enum tx_ibs_states { 94 HCI_IBS_TX_ASLEEP, 95 HCI_IBS_TX_WAKING, 96 HCI_IBS_TX_AWAKE, 97}; 98 99/* HCI_IBS receive side sleep protocol states */ 100enum rx_states { 101 HCI_IBS_RX_ASLEEP, 102 HCI_IBS_RX_AWAKE, 103}; 104 105/* HCI_IBS transmit and receive side clock state vote */ 106enum hci_ibs_clock_state_vote { 107 HCI_IBS_VOTE_STATS_UPDATE, 108 HCI_IBS_TX_VOTE_CLOCK_ON, 109 HCI_IBS_TX_VOTE_CLOCK_OFF, 110 HCI_IBS_RX_VOTE_CLOCK_ON, 111 HCI_IBS_RX_VOTE_CLOCK_OFF, 112}; 113 114/* Controller memory dump states */ 115enum qca_memdump_states { 116 QCA_MEMDUMP_IDLE, 117 QCA_MEMDUMP_COLLECTING, 118 QCA_MEMDUMP_COLLECTED, 119 QCA_MEMDUMP_TIMEOUT, 120}; 121 122struct qca_memdump_info { 123 u32 current_seq_no; 124 u32 received_dump; 125 u32 ram_dump_size; 126}; 127 128struct qca_memdump_event_hdr { 129 __u8 evt; 130 __u8 plen; 131 __u16 opcode; 132 __le16 seq_no; 133 __u8 reserved; 134} __packed; 135 136 137struct qca_dump_size { 138 __le32 dump_size; 139} __packed; 140 141struct qca_data { 142 struct hci_uart *hu; 143 struct sk_buff *rx_skb; 144 struct sk_buff_head txq; 145 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ 146 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ 147 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ 148 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ 149 u8 rx_ibs_state; /* HCI_IBS receive side power state */ 150 bool tx_vote; /* Clock must be on for TX */ 151 bool rx_vote; /* Clock must be on for RX */ 152 struct timer_list tx_idle_timer; 153 u32 tx_idle_delay; 154 struct timer_list wake_retrans_timer; 155 u32 wake_retrans; 156 struct workqueue_struct *workqueue; 157 struct work_struct ws_awake_rx; 158 struct work_struct ws_awake_device; 159 struct work_struct ws_rx_vote_off; 160 struct work_struct ws_tx_vote_off; 161 struct work_struct ctrl_memdump_evt; 162 struct delayed_work ctrl_memdump_timeout; 163 struct qca_memdump_info *qca_memdump; 164 unsigned long flags; 165 struct completion drop_ev_comp; 166 wait_queue_head_t suspend_wait_q; 167 enum qca_memdump_states memdump_state; 168 struct mutex hci_memdump_lock; 169 170 u16 fw_version; 171 u16 controller_id; 172 /* For debugging purpose */ 173 u64 ibs_sent_wacks; 174 u64 ibs_sent_slps; 175 u64 ibs_sent_wakes; 176 u64 ibs_recv_wacks; 177 u64 ibs_recv_slps; 178 u64 ibs_recv_wakes; 179 u64 vote_last_jif; 180 u32 vote_on_ms; 181 u32 vote_off_ms; 182 u64 tx_votes_on; 183 u64 rx_votes_on; 184 u64 tx_votes_off; 185 u64 rx_votes_off; 186 u64 votes_on; 187 u64 votes_off; 188}; 189 190enum qca_speed_type { 191 QCA_INIT_SPEED = 1, 192 QCA_OPER_SPEED 193}; 194 195/* 196 * Voltage regulator information required for configuring the 197 * QCA Bluetooth chipset 198 */ 199struct qca_vreg { 200 const char *name; 201 unsigned int load_uA; 202}; 203 204struct qca_device_data { 205 enum qca_btsoc_type soc_type; 206 struct qca_vreg *vregs; 207 size_t num_vregs; 208 uint32_t capabilities; 209}; 210 211/* 212 * Platform data for the QCA Bluetooth power driver. 213 */ 214struct qca_power { 215 struct device *dev; 216 struct regulator_bulk_data *vreg_bulk; 217 int num_vregs; 218 bool vregs_on; 219 struct pwrseq_desc *pwrseq; 220}; 221 222struct qca_serdev { 223 struct hci_uart serdev_hu; 224 struct gpio_desc *bt_en; 225 struct gpio_desc *sw_ctrl; 226 struct clk *susclk; 227 enum qca_btsoc_type btsoc_type; 228 struct qca_power *bt_power; 229 u32 init_speed; 230 u32 oper_speed; 231 bool bdaddr_property_broken; 232 const char *firmware_name[2]; 233}; 234 235static int qca_regulator_enable(struct qca_serdev *qcadev); 236static void qca_regulator_disable(struct qca_serdev *qcadev); 237static void qca_power_shutdown(struct hci_uart *hu); 238static int qca_power_off(struct hci_dev *hdev); 239static void qca_controller_memdump(struct work_struct *work); 240static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb); 241 242static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) 243{ 244 enum qca_btsoc_type soc_type; 245 246 if (hu->serdev) { 247 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 248 249 soc_type = qsd->btsoc_type; 250 } else { 251 soc_type = QCA_ROME; 252 } 253 254 return soc_type; 255} 256 257static const char *qca_get_firmware_name(struct hci_uart *hu) 258{ 259 if (hu->serdev) { 260 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 261 262 return qsd->firmware_name[0]; 263 } else { 264 return NULL; 265 } 266} 267 268static const char *qca_get_rampatch_name(struct hci_uart *hu) 269{ 270 if (hu->serdev) { 271 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 272 273 return qsd->firmware_name[1]; 274 } else { 275 return NULL; 276 } 277} 278 279static void __serial_clock_on(struct tty_struct *tty) 280{ 281 /* TODO: Some chipset requires to enable UART clock on client 282 * side to save power consumption or manual work is required. 283 * Please put your code to control UART clock here if needed 284 */ 285} 286 287static void __serial_clock_off(struct tty_struct *tty) 288{ 289 /* TODO: Some chipset requires to disable UART clock on client 290 * side to save power consumption or manual work is required. 291 * Please put your code to control UART clock off here if needed 292 */ 293} 294 295/* serial_clock_vote needs to be called with the ibs lock held */ 296static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) 297{ 298 struct qca_data *qca = hu->priv; 299 unsigned int diff; 300 301 bool old_vote = (qca->tx_vote | qca->rx_vote); 302 bool new_vote; 303 304 switch (vote) { 305 case HCI_IBS_VOTE_STATS_UPDATE: 306 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 307 308 if (old_vote) 309 qca->vote_off_ms += diff; 310 else 311 qca->vote_on_ms += diff; 312 return; 313 314 case HCI_IBS_TX_VOTE_CLOCK_ON: 315 qca->tx_vote = true; 316 qca->tx_votes_on++; 317 break; 318 319 case HCI_IBS_RX_VOTE_CLOCK_ON: 320 qca->rx_vote = true; 321 qca->rx_votes_on++; 322 break; 323 324 case HCI_IBS_TX_VOTE_CLOCK_OFF: 325 qca->tx_vote = false; 326 qca->tx_votes_off++; 327 break; 328 329 case HCI_IBS_RX_VOTE_CLOCK_OFF: 330 qca->rx_vote = false; 331 qca->rx_votes_off++; 332 break; 333 334 default: 335 BT_ERR("Voting irregularity"); 336 return; 337 } 338 339 new_vote = qca->rx_vote | qca->tx_vote; 340 341 if (new_vote != old_vote) { 342 if (new_vote) 343 __serial_clock_on(hu->tty); 344 else 345 __serial_clock_off(hu->tty); 346 347 BT_DBG("Vote serial clock %s(%s)", str_true_false(new_vote), 348 str_true_false(vote)); 349 350 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 351 352 if (new_vote) { 353 qca->votes_on++; 354 qca->vote_off_ms += diff; 355 } else { 356 qca->votes_off++; 357 qca->vote_on_ms += diff; 358 } 359 qca->vote_last_jif = jiffies; 360 } 361} 362 363/* Builds and sends an HCI_IBS command packet. 364 * These are very simple packets with only 1 cmd byte. 365 */ 366static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) 367{ 368 int err = 0; 369 struct sk_buff *skb = NULL; 370 struct qca_data *qca = hu->priv; 371 372 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); 373 374 skb = bt_skb_alloc(1, GFP_ATOMIC); 375 if (!skb) { 376 BT_ERR("Failed to allocate memory for HCI_IBS packet"); 377 return -ENOMEM; 378 } 379 380 /* Assign HCI_IBS type */ 381 skb_put_u8(skb, cmd); 382 383 skb_queue_tail(&qca->txq, skb); 384 385 return err; 386} 387 388static void qca_wq_awake_device(struct work_struct *work) 389{ 390 struct qca_data *qca = container_of(work, struct qca_data, 391 ws_awake_device); 392 struct hci_uart *hu = qca->hu; 393 unsigned long retrans_delay; 394 unsigned long flags; 395 396 BT_DBG("hu %p wq awake device", hu); 397 398 /* Vote for serial clock */ 399 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); 400 401 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 402 403 /* Send wake indication to device */ 404 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) 405 BT_ERR("Failed to send WAKE to device"); 406 407 qca->ibs_sent_wakes++; 408 409 /* Start retransmit timer */ 410 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 411 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 412 413 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 414 415 /* Actually send the packets */ 416 hci_uart_tx_wakeup(hu); 417} 418 419static void qca_wq_awake_rx(struct work_struct *work) 420{ 421 struct qca_data *qca = container_of(work, struct qca_data, 422 ws_awake_rx); 423 struct hci_uart *hu = qca->hu; 424 unsigned long flags; 425 426 BT_DBG("hu %p wq awake rx", hu); 427 428 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); 429 430 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 431 qca->rx_ibs_state = HCI_IBS_RX_AWAKE; 432 433 /* Always acknowledge device wake up, 434 * sending IBS message doesn't count as TX ON. 435 */ 436 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) 437 BT_ERR("Failed to acknowledge device wake up"); 438 439 qca->ibs_sent_wacks++; 440 441 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 442 443 /* Actually send the packets */ 444 hci_uart_tx_wakeup(hu); 445} 446 447static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) 448{ 449 struct qca_data *qca = container_of(work, struct qca_data, 450 ws_rx_vote_off); 451 struct hci_uart *hu = qca->hu; 452 453 BT_DBG("hu %p rx clock vote off", hu); 454 455 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); 456} 457 458static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) 459{ 460 struct qca_data *qca = container_of(work, struct qca_data, 461 ws_tx_vote_off); 462 struct hci_uart *hu = qca->hu; 463 464 BT_DBG("hu %p tx clock vote off", hu); 465 466 /* Run HCI tx handling unlocked */ 467 hci_uart_tx_wakeup(hu); 468 469 /* Now that message queued to tty driver, vote for tty clocks off. 470 * It is up to the tty driver to pend the clocks off until tx done. 471 */ 472 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 473} 474 475static void hci_ibs_tx_idle_timeout(struct timer_list *t) 476{ 477 struct qca_data *qca = timer_container_of(qca, t, tx_idle_timer); 478 struct hci_uart *hu = qca->hu; 479 unsigned long flags; 480 481 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); 482 483 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 484 flags, SINGLE_DEPTH_NESTING); 485 486 switch (qca->tx_ibs_state) { 487 case HCI_IBS_TX_AWAKE: 488 /* TX_IDLE, go to SLEEP */ 489 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { 490 BT_ERR("Failed to send SLEEP to device"); 491 break; 492 } 493 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 494 qca->ibs_sent_slps++; 495 queue_work(qca->workqueue, &qca->ws_tx_vote_off); 496 break; 497 498 case HCI_IBS_TX_ASLEEP: 499 case HCI_IBS_TX_WAKING: 500 default: 501 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 502 break; 503 } 504 505 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 506} 507 508static void hci_ibs_wake_retrans_timeout(struct timer_list *t) 509{ 510 struct qca_data *qca = timer_container_of(qca, t, wake_retrans_timer); 511 struct hci_uart *hu = qca->hu; 512 unsigned long flags, retrans_delay; 513 bool retransmit = false; 514 515 BT_DBG("hu %p wake retransmit timeout in %d state", 516 hu, qca->tx_ibs_state); 517 518 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 519 flags, SINGLE_DEPTH_NESTING); 520 521 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ 522 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 523 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 524 return; 525 } 526 527 switch (qca->tx_ibs_state) { 528 case HCI_IBS_TX_WAKING: 529 /* No WAKE_ACK, retransmit WAKE */ 530 retransmit = true; 531 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { 532 BT_ERR("Failed to acknowledge device wake up"); 533 break; 534 } 535 qca->ibs_sent_wakes++; 536 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 537 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 538 break; 539 540 case HCI_IBS_TX_ASLEEP: 541 case HCI_IBS_TX_AWAKE: 542 default: 543 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 544 break; 545 } 546 547 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 548 549 if (retransmit) 550 hci_uart_tx_wakeup(hu); 551} 552 553 554static void qca_controller_memdump_timeout(struct work_struct *work) 555{ 556 struct qca_data *qca = container_of(work, struct qca_data, 557 ctrl_memdump_timeout.work); 558 struct hci_uart *hu = qca->hu; 559 560 mutex_lock(&qca->hci_memdump_lock); 561 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 562 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 563 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 564 /* Inject hw error event to reset the device 565 * and driver. 566 */ 567 hci_reset_dev(hu->hdev); 568 } 569 } 570 571 mutex_unlock(&qca->hci_memdump_lock); 572} 573 574 575/* Initialize protocol */ 576static int qca_open(struct hci_uart *hu) 577{ 578 struct qca_serdev *qcadev; 579 struct qca_data *qca; 580 581 BT_DBG("hu %p qca_open", hu); 582 583 if (!hci_uart_has_flow_control(hu)) 584 return -EOPNOTSUPP; 585 586 qca = kzalloc(sizeof(*qca), GFP_KERNEL); 587 if (!qca) 588 return -ENOMEM; 589 590 skb_queue_head_init(&qca->txq); 591 skb_queue_head_init(&qca->tx_wait_q); 592 skb_queue_head_init(&qca->rx_memdump_q); 593 spin_lock_init(&qca->hci_ibs_lock); 594 mutex_init(&qca->hci_memdump_lock); 595 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); 596 if (!qca->workqueue) { 597 BT_ERR("QCA Workqueue not initialized properly"); 598 kfree(qca); 599 return -ENOMEM; 600 } 601 602 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); 603 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); 604 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); 605 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); 606 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); 607 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, 608 qca_controller_memdump_timeout); 609 init_waitqueue_head(&qca->suspend_wait_q); 610 611 qca->hu = hu; 612 init_completion(&qca->drop_ev_comp); 613 614 /* Assume we start with both sides asleep -- extra wakes OK */ 615 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 616 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 617 618 qca->vote_last_jif = jiffies; 619 620 hu->priv = qca; 621 622 if (hu->serdev) { 623 qcadev = serdev_device_get_drvdata(hu->serdev); 624 625 switch (qcadev->btsoc_type) { 626 case QCA_WCN3950: 627 case QCA_WCN3988: 628 case QCA_WCN3990: 629 case QCA_WCN3991: 630 case QCA_WCN3998: 631 case QCA_WCN6750: 632 hu->init_speed = qcadev->init_speed; 633 break; 634 635 default: 636 break; 637 } 638 639 if (qcadev->oper_speed) 640 hu->oper_speed = qcadev->oper_speed; 641 } 642 643 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); 644 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; 645 646 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); 647 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; 648 649 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", 650 qca->tx_idle_delay, qca->wake_retrans); 651 652 return 0; 653} 654 655static void qca_debugfs_init(struct hci_dev *hdev) 656{ 657 struct hci_uart *hu = hci_get_drvdata(hdev); 658 struct qca_data *qca = hu->priv; 659 struct dentry *ibs_dir; 660 umode_t mode; 661 662 if (!hdev->debugfs) 663 return; 664 665 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags)) 666 return; 667 668 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); 669 670 /* read only */ 671 mode = 0444; 672 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); 673 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); 674 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, 675 &qca->ibs_sent_slps); 676 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, 677 &qca->ibs_sent_wakes); 678 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, 679 &qca->ibs_sent_wacks); 680 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, 681 &qca->ibs_recv_slps); 682 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, 683 &qca->ibs_recv_wakes); 684 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, 685 &qca->ibs_recv_wacks); 686 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); 687 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); 688 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); 689 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); 690 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); 691 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); 692 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); 693 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); 694 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); 695 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); 696 697 /* read/write */ 698 mode = 0644; 699 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); 700 debugfs_create_u32("tx_idle_delay", mode, ibs_dir, 701 &qca->tx_idle_delay); 702} 703 704/* Flush protocol data */ 705static int qca_flush(struct hci_uart *hu) 706{ 707 struct qca_data *qca = hu->priv; 708 709 BT_DBG("hu %p qca flush", hu); 710 711 skb_queue_purge(&qca->tx_wait_q); 712 skb_queue_purge(&qca->txq); 713 714 return 0; 715} 716 717/* Close protocol */ 718static int qca_close(struct hci_uart *hu) 719{ 720 struct qca_data *qca = hu->priv; 721 722 BT_DBG("hu %p qca close", hu); 723 724 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); 725 726 skb_queue_purge(&qca->tx_wait_q); 727 skb_queue_purge(&qca->txq); 728 skb_queue_purge(&qca->rx_memdump_q); 729 /* 730 * Shut the timers down so they can't be rearmed when 731 * destroy_workqueue() drains pending work which in turn might try 732 * to arm a timer. After shutdown rearm attempts are silently 733 * ignored by the timer core code. 734 */ 735 timer_shutdown_sync(&qca->tx_idle_timer); 736 timer_shutdown_sync(&qca->wake_retrans_timer); 737 destroy_workqueue(qca->workqueue); 738 qca->hu = NULL; 739 740 kfree_skb(qca->rx_skb); 741 742 hu->priv = NULL; 743 744 kfree(qca); 745 746 return 0; 747} 748 749/* Called upon a wake-up-indication from the device. 750 */ 751static void device_want_to_wakeup(struct hci_uart *hu) 752{ 753 unsigned long flags; 754 struct qca_data *qca = hu->priv; 755 756 BT_DBG("hu %p want to wake up", hu); 757 758 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 759 760 qca->ibs_recv_wakes++; 761 762 /* Don't wake the rx up when suspending. */ 763 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 764 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 765 return; 766 } 767 768 switch (qca->rx_ibs_state) { 769 case HCI_IBS_RX_ASLEEP: 770 /* Make sure clock is on - we may have turned clock off since 771 * receiving the wake up indicator awake rx clock. 772 */ 773 queue_work(qca->workqueue, &qca->ws_awake_rx); 774 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 775 return; 776 777 case HCI_IBS_RX_AWAKE: 778 /* Always acknowledge device wake up, 779 * sending IBS message doesn't count as TX ON. 780 */ 781 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { 782 BT_ERR("Failed to acknowledge device wake up"); 783 break; 784 } 785 qca->ibs_sent_wacks++; 786 break; 787 788 default: 789 /* Any other state is illegal */ 790 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", 791 qca->rx_ibs_state); 792 break; 793 } 794 795 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 796 797 /* Actually send the packets */ 798 hci_uart_tx_wakeup(hu); 799} 800 801/* Called upon a sleep-indication from the device. 802 */ 803static void device_want_to_sleep(struct hci_uart *hu) 804{ 805 unsigned long flags; 806 struct qca_data *qca = hu->priv; 807 808 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); 809 810 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 811 812 qca->ibs_recv_slps++; 813 814 switch (qca->rx_ibs_state) { 815 case HCI_IBS_RX_AWAKE: 816 /* Update state */ 817 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 818 /* Vote off rx clock under workqueue */ 819 queue_work(qca->workqueue, &qca->ws_rx_vote_off); 820 break; 821 822 case HCI_IBS_RX_ASLEEP: 823 break; 824 825 default: 826 /* Any other state is illegal */ 827 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", 828 qca->rx_ibs_state); 829 break; 830 } 831 832 wake_up_interruptible(&qca->suspend_wait_q); 833 834 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 835} 836 837/* Called upon wake-up-acknowledgement from the device 838 */ 839static void device_woke_up(struct hci_uart *hu) 840{ 841 unsigned long flags, idle_delay; 842 struct qca_data *qca = hu->priv; 843 struct sk_buff *skb = NULL; 844 845 BT_DBG("hu %p woke up", hu); 846 847 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 848 849 qca->ibs_recv_wacks++; 850 851 /* Don't react to the wake-up-acknowledgment when suspending. */ 852 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 853 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 854 return; 855 } 856 857 switch (qca->tx_ibs_state) { 858 case HCI_IBS_TX_AWAKE: 859 /* Expect one if we send 2 WAKEs */ 860 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", 861 qca->tx_ibs_state); 862 break; 863 864 case HCI_IBS_TX_WAKING: 865 /* Send pending packets */ 866 while ((skb = skb_dequeue(&qca->tx_wait_q))) 867 skb_queue_tail(&qca->txq, skb); 868 869 /* Switch timers and change state to HCI_IBS_TX_AWAKE */ 870 timer_delete(&qca->wake_retrans_timer); 871 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 872 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 873 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 874 break; 875 876 case HCI_IBS_TX_ASLEEP: 877 default: 878 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", 879 qca->tx_ibs_state); 880 break; 881 } 882 883 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 884 885 /* Actually send the packets */ 886 hci_uart_tx_wakeup(hu); 887} 888 889/* Enqueue frame for transmission (padding, crc, etc) may be called from 890 * two simultaneous tasklets. 891 */ 892static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) 893{ 894 unsigned long flags = 0, idle_delay; 895 struct qca_data *qca = hu->priv; 896 897 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, 898 qca->tx_ibs_state); 899 900 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 901 /* As SSR is in progress, ignore the packets */ 902 bt_dev_dbg(hu->hdev, "SSR is in progress"); 903 kfree_skb(skb); 904 return 0; 905 } 906 907 /* Prepend skb with frame type */ 908 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); 909 910 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 911 912 /* Don't go to sleep in middle of patch download or 913 * Out-Of-Band(GPIOs control) sleep is selected. 914 * Don't wake the device up when suspending. 915 */ 916 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 917 test_bit(QCA_SUSPENDING, &qca->flags)) { 918 skb_queue_tail(&qca->txq, skb); 919 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 920 return 0; 921 } 922 923 /* Act according to current state */ 924 switch (qca->tx_ibs_state) { 925 case HCI_IBS_TX_AWAKE: 926 BT_DBG("Device awake, sending normally"); 927 skb_queue_tail(&qca->txq, skb); 928 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 929 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 930 break; 931 932 case HCI_IBS_TX_ASLEEP: 933 BT_DBG("Device asleep, waking up and queueing packet"); 934 /* Save packet for later */ 935 skb_queue_tail(&qca->tx_wait_q, skb); 936 937 qca->tx_ibs_state = HCI_IBS_TX_WAKING; 938 /* Schedule a work queue to wake up device */ 939 queue_work(qca->workqueue, &qca->ws_awake_device); 940 break; 941 942 case HCI_IBS_TX_WAKING: 943 BT_DBG("Device waking up, queueing packet"); 944 /* Transient state; just keep packet for later */ 945 skb_queue_tail(&qca->tx_wait_q, skb); 946 break; 947 948 default: 949 BT_ERR("Illegal tx state: %d (losing packet)", 950 qca->tx_ibs_state); 951 dev_kfree_skb_irq(skb); 952 break; 953 } 954 955 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 956 957 return 0; 958} 959 960static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) 961{ 962 struct hci_uart *hu = hci_get_drvdata(hdev); 963 964 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); 965 966 device_want_to_sleep(hu); 967 968 kfree_skb(skb); 969 return 0; 970} 971 972static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) 973{ 974 struct hci_uart *hu = hci_get_drvdata(hdev); 975 976 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); 977 978 device_want_to_wakeup(hu); 979 980 kfree_skb(skb); 981 return 0; 982} 983 984static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) 985{ 986 struct hci_uart *hu = hci_get_drvdata(hdev); 987 988 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); 989 990 device_woke_up(hu); 991 992 kfree_skb(skb); 993 return 0; 994} 995 996static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) 997{ 998 /* We receive debug logs from chip as an ACL packets. 999 * Instead of sending the data to ACL to decode the 1000 * received data, we are pushing them to the above layers 1001 * as a diagnostic packet. 1002 */ 1003 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) 1004 return hci_recv_diag(hdev, skb); 1005 1006 return hci_recv_frame(hdev, skb); 1007} 1008 1009static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb) 1010{ 1011 struct hci_uart *hu = hci_get_drvdata(hdev); 1012 struct qca_data *qca = hu->priv; 1013 char buf[80]; 1014 1015 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n", 1016 qca->controller_id); 1017 skb_put_data(skb, buf, strlen(buf)); 1018 1019 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n", 1020 qca->fw_version); 1021 skb_put_data(skb, buf, strlen(buf)); 1022 1023 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n"); 1024 skb_put_data(skb, buf, strlen(buf)); 1025 1026 snprintf(buf, sizeof(buf), "Driver: %s\n", 1027 hu->serdev->dev.driver->name); 1028 skb_put_data(skb, buf, strlen(buf)); 1029} 1030 1031static void qca_controller_memdump(struct work_struct *work) 1032{ 1033 struct qca_data *qca = container_of(work, struct qca_data, 1034 ctrl_memdump_evt); 1035 struct hci_uart *hu = qca->hu; 1036 struct sk_buff *skb; 1037 struct qca_memdump_event_hdr *cmd_hdr; 1038 struct qca_memdump_info *qca_memdump = qca->qca_memdump; 1039 struct qca_dump_size *dump; 1040 u16 seq_no; 1041 u32 rx_size; 1042 int ret = 0; 1043 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1044 1045 while ((skb = skb_dequeue(&qca->rx_memdump_q))) { 1046 1047 mutex_lock(&qca->hci_memdump_lock); 1048 /* Skip processing the received packets if timeout detected 1049 * or memdump collection completed. 1050 */ 1051 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1052 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1053 mutex_unlock(&qca->hci_memdump_lock); 1054 return; 1055 } 1056 1057 if (!qca_memdump) { 1058 qca_memdump = kzalloc(sizeof(*qca_memdump), GFP_ATOMIC); 1059 if (!qca_memdump) { 1060 mutex_unlock(&qca->hci_memdump_lock); 1061 return; 1062 } 1063 1064 qca->qca_memdump = qca_memdump; 1065 } 1066 1067 qca->memdump_state = QCA_MEMDUMP_COLLECTING; 1068 cmd_hdr = (void *) skb->data; 1069 seq_no = __le16_to_cpu(cmd_hdr->seq_no); 1070 skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); 1071 1072 if (!seq_no) { 1073 1074 /* This is the first frame of memdump packet from 1075 * the controller, Disable IBS to receive dump 1076 * with out any interruption, ideally time required for 1077 * the controller to send the dump is 8 seconds. let us 1078 * start timer to handle this asynchronous activity. 1079 */ 1080 set_bit(QCA_IBS_DISABLED, &qca->flags); 1081 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1082 dump = (void *) skb->data; 1083 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size); 1084 if (!(qca_memdump->ram_dump_size)) { 1085 bt_dev_err(hu->hdev, "Rx invalid memdump size"); 1086 kfree(qca_memdump); 1087 kfree_skb(skb); 1088 mutex_unlock(&qca->hci_memdump_lock); 1089 return; 1090 } 1091 1092 queue_delayed_work(qca->workqueue, 1093 &qca->ctrl_memdump_timeout, 1094 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)); 1095 skb_pull(skb, sizeof(qca_memdump->ram_dump_size)); 1096 qca_memdump->current_seq_no = 0; 1097 qca_memdump->received_dump = 0; 1098 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size); 1099 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d", 1100 ret); 1101 if (ret < 0) { 1102 kfree(qca->qca_memdump); 1103 qca->qca_memdump = NULL; 1104 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1105 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1106 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1107 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1108 mutex_unlock(&qca->hci_memdump_lock); 1109 return; 1110 } 1111 1112 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", 1113 qca_memdump->ram_dump_size); 1114 1115 } 1116 1117 /* If sequence no 0 is missed then there is no point in 1118 * accepting the other sequences. 1119 */ 1120 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 1121 bt_dev_err(hu->hdev, "QCA: Discarding other packets"); 1122 kfree(qca_memdump); 1123 kfree_skb(skb); 1124 mutex_unlock(&qca->hci_memdump_lock); 1125 return; 1126 } 1127 /* There could be chance of missing some packets from 1128 * the controller. In such cases let us store the dummy 1129 * packets in the buffer. 1130 */ 1131 /* For QCA6390, controller does not lost packets but 1132 * sequence number field of packet sometimes has error 1133 * bits, so skip this checking for missing packet. 1134 */ 1135 while ((seq_no > qca_memdump->current_seq_no + 1) && 1136 (soc_type != QCA_QCA6390) && 1137 seq_no != QCA_LAST_SEQUENCE_NUM) { 1138 bt_dev_err(hu->hdev, "QCA controller missed packet:%d", 1139 qca_memdump->current_seq_no); 1140 rx_size = qca_memdump->received_dump; 1141 rx_size += QCA_DUMP_PACKET_SIZE; 1142 if (rx_size > qca_memdump->ram_dump_size) { 1143 bt_dev_err(hu->hdev, 1144 "QCA memdump received %d, no space for missed packet", 1145 qca_memdump->received_dump); 1146 break; 1147 } 1148 hci_devcd_append_pattern(hu->hdev, 0x00, 1149 QCA_DUMP_PACKET_SIZE); 1150 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; 1151 qca_memdump->current_seq_no++; 1152 } 1153 1154 rx_size = qca_memdump->received_dump + skb->len; 1155 if (rx_size <= qca_memdump->ram_dump_size) { 1156 if ((seq_no != QCA_LAST_SEQUENCE_NUM) && 1157 (seq_no != qca_memdump->current_seq_no)) { 1158 bt_dev_err(hu->hdev, 1159 "QCA memdump unexpected packet %d", 1160 seq_no); 1161 } 1162 bt_dev_dbg(hu->hdev, 1163 "QCA memdump packet %d with length %d", 1164 seq_no, skb->len); 1165 hci_devcd_append(hu->hdev, skb); 1166 qca_memdump->current_seq_no += 1; 1167 qca_memdump->received_dump = rx_size; 1168 } else { 1169 bt_dev_err(hu->hdev, 1170 "QCA memdump received no space for packet %d", 1171 qca_memdump->current_seq_no); 1172 } 1173 1174 if (seq_no == QCA_LAST_SEQUENCE_NUM) { 1175 bt_dev_info(hu->hdev, 1176 "QCA memdump Done, received %d, total %d", 1177 qca_memdump->received_dump, 1178 qca_memdump->ram_dump_size); 1179 hci_devcd_complete(hu->hdev); 1180 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1181 kfree(qca->qca_memdump); 1182 qca->qca_memdump = NULL; 1183 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1184 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1185 } 1186 1187 mutex_unlock(&qca->hci_memdump_lock); 1188 } 1189 1190} 1191 1192static int qca_controller_memdump_event(struct hci_dev *hdev, 1193 struct sk_buff *skb) 1194{ 1195 struct hci_uart *hu = hci_get_drvdata(hdev); 1196 struct qca_data *qca = hu->priv; 1197 1198 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1199 skb_queue_tail(&qca->rx_memdump_q, skb); 1200 queue_work(qca->workqueue, &qca->ctrl_memdump_evt); 1201 1202 return 0; 1203} 1204 1205static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) 1206{ 1207 struct hci_uart *hu = hci_get_drvdata(hdev); 1208 struct qca_data *qca = hu->priv; 1209 1210 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { 1211 struct hci_event_hdr *hdr = (void *)skb->data; 1212 1213 /* For the WCN3990 the vendor command for a baudrate change 1214 * isn't sent as synchronous HCI command, because the 1215 * controller sends the corresponding vendor event with the 1216 * new baudrate. The event is received and properly decoded 1217 * after changing the baudrate of the host port. It needs to 1218 * be dropped, otherwise it can be misinterpreted as 1219 * response to a later firmware download command (also a 1220 * vendor command). 1221 */ 1222 1223 if (hdr->evt == HCI_EV_VENDOR) 1224 complete(&qca->drop_ev_comp); 1225 1226 kfree_skb(skb); 1227 1228 return 0; 1229 } 1230 /* We receive chip memory dump as an event packet, With a dedicated 1231 * handler followed by a hardware error event. When this event is 1232 * received we store dump into a file before closing hci. This 1233 * dump will help in triaging the issues. 1234 */ 1235 if ((skb->data[0] == HCI_VENDOR_PKT) && 1236 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) 1237 return qca_controller_memdump_event(hdev, skb); 1238 1239 return hci_recv_frame(hdev, skb); 1240} 1241 1242#define QCA_IBS_SLEEP_IND_EVENT \ 1243 .type = HCI_IBS_SLEEP_IND, \ 1244 .hlen = 0, \ 1245 .loff = 0, \ 1246 .lsize = 0, \ 1247 .maxlen = HCI_MAX_IBS_SIZE 1248 1249#define QCA_IBS_WAKE_IND_EVENT \ 1250 .type = HCI_IBS_WAKE_IND, \ 1251 .hlen = 0, \ 1252 .loff = 0, \ 1253 .lsize = 0, \ 1254 .maxlen = HCI_MAX_IBS_SIZE 1255 1256#define QCA_IBS_WAKE_ACK_EVENT \ 1257 .type = HCI_IBS_WAKE_ACK, \ 1258 .hlen = 0, \ 1259 .loff = 0, \ 1260 .lsize = 0, \ 1261 .maxlen = HCI_MAX_IBS_SIZE 1262 1263static const struct h4_recv_pkt qca_recv_pkts[] = { 1264 { H4_RECV_ACL, .recv = qca_recv_acl_data }, 1265 { H4_RECV_SCO, .recv = hci_recv_frame }, 1266 { H4_RECV_EVENT, .recv = qca_recv_event }, 1267 { H4_RECV_ISO, .recv = hci_recv_frame }, 1268 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, 1269 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, 1270 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, 1271}; 1272 1273static int qca_recv(struct hci_uart *hu, const void *data, int count) 1274{ 1275 struct qca_data *qca = hu->priv; 1276 1277 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1278 return -EUNATCH; 1279 1280 qca->rx_skb = h4_recv_buf(hu, qca->rx_skb, data, count, 1281 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1282 if (IS_ERR(qca->rx_skb)) { 1283 int err = PTR_ERR(qca->rx_skb); 1284 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); 1285 qca->rx_skb = NULL; 1286 return err; 1287 } 1288 1289 return count; 1290} 1291 1292static struct sk_buff *qca_dequeue(struct hci_uart *hu) 1293{ 1294 struct qca_data *qca = hu->priv; 1295 1296 return skb_dequeue(&qca->txq); 1297} 1298 1299static uint8_t qca_get_baudrate_value(int speed) 1300{ 1301 switch (speed) { 1302 case 9600: 1303 return QCA_BAUDRATE_9600; 1304 case 19200: 1305 return QCA_BAUDRATE_19200; 1306 case 38400: 1307 return QCA_BAUDRATE_38400; 1308 case 57600: 1309 return QCA_BAUDRATE_57600; 1310 case 115200: 1311 return QCA_BAUDRATE_115200; 1312 case 230400: 1313 return QCA_BAUDRATE_230400; 1314 case 460800: 1315 return QCA_BAUDRATE_460800; 1316 case 500000: 1317 return QCA_BAUDRATE_500000; 1318 case 921600: 1319 return QCA_BAUDRATE_921600; 1320 case 1000000: 1321 return QCA_BAUDRATE_1000000; 1322 case 2000000: 1323 return QCA_BAUDRATE_2000000; 1324 case 3000000: 1325 return QCA_BAUDRATE_3000000; 1326 case 3200000: 1327 return QCA_BAUDRATE_3200000; 1328 case 3500000: 1329 return QCA_BAUDRATE_3500000; 1330 default: 1331 return QCA_BAUDRATE_115200; 1332 } 1333} 1334 1335static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) 1336{ 1337 struct hci_uart *hu = hci_get_drvdata(hdev); 1338 struct qca_data *qca = hu->priv; 1339 struct sk_buff *skb; 1340 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; 1341 1342 if (baudrate > QCA_BAUDRATE_3200000) 1343 return -EINVAL; 1344 1345 cmd[4] = baudrate; 1346 1347 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); 1348 if (!skb) { 1349 bt_dev_err(hdev, "Failed to allocate baudrate packet"); 1350 return -ENOMEM; 1351 } 1352 1353 /* Assign commands to change baudrate and packet type. */ 1354 skb_put_data(skb, cmd, sizeof(cmd)); 1355 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1356 1357 skb_queue_tail(&qca->txq, skb); 1358 hci_uart_tx_wakeup(hu); 1359 1360 /* Wait for the baudrate change request to be sent */ 1361 1362 while (!skb_queue_empty(&qca->txq)) 1363 usleep_range(100, 200); 1364 1365 if (hu->serdev) 1366 serdev_device_wait_until_sent(hu->serdev, 1367 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 1368 1369 /* Give the controller time to process the request */ 1370 switch (qca_soc_type(hu)) { 1371 case QCA_WCN3950: 1372 case QCA_WCN3988: 1373 case QCA_WCN3990: 1374 case QCA_WCN3991: 1375 case QCA_WCN3998: 1376 case QCA_WCN6750: 1377 case QCA_WCN6855: 1378 case QCA_WCN7850: 1379 usleep_range(1000, 10000); 1380 break; 1381 1382 default: 1383 msleep(300); 1384 } 1385 1386 return 0; 1387} 1388 1389static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) 1390{ 1391 if (hu->serdev) 1392 serdev_device_set_baudrate(hu->serdev, speed); 1393 else 1394 hci_uart_set_baudrate(hu, speed); 1395} 1396 1397static int qca_send_power_pulse(struct hci_uart *hu, bool on) 1398{ 1399 int ret; 1400 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 1401 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; 1402 1403 /* These power pulses are single byte command which are sent 1404 * at required baudrate to wcn3990. On wcn3990, we have an external 1405 * circuit at Tx pin which decodes the pulse sent at specific baudrate. 1406 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT 1407 * and also we use the same power inputs to turn on and off for 1408 * Wi-Fi/BT. Powering up the power sources will not enable BT, until 1409 * we send a power on pulse at 115200 bps. This algorithm will help to 1410 * save power. Disabling hardware flow control is mandatory while 1411 * sending power pulses to SoC. 1412 */ 1413 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); 1414 1415 serdev_device_write_flush(hu->serdev); 1416 hci_uart_set_flow_control(hu, true); 1417 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1418 if (ret < 0) { 1419 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); 1420 return ret; 1421 } 1422 1423 serdev_device_wait_until_sent(hu->serdev, timeout); 1424 hci_uart_set_flow_control(hu, false); 1425 1426 /* Give to controller time to boot/shutdown */ 1427 if (on) 1428 msleep(100); 1429 else 1430 usleep_range(1000, 10000); 1431 1432 return 0; 1433} 1434 1435static unsigned int qca_get_speed(struct hci_uart *hu, 1436 enum qca_speed_type speed_type) 1437{ 1438 unsigned int speed = 0; 1439 1440 if (speed_type == QCA_INIT_SPEED) { 1441 if (hu->init_speed) 1442 speed = hu->init_speed; 1443 else if (hu->proto->init_speed) 1444 speed = hu->proto->init_speed; 1445 } else { 1446 if (hu->oper_speed) 1447 speed = hu->oper_speed; 1448 else if (hu->proto->oper_speed) 1449 speed = hu->proto->oper_speed; 1450 } 1451 1452 return speed; 1453} 1454 1455static int qca_check_speeds(struct hci_uart *hu) 1456{ 1457 switch (qca_soc_type(hu)) { 1458 case QCA_WCN3950: 1459 case QCA_WCN3988: 1460 case QCA_WCN3990: 1461 case QCA_WCN3991: 1462 case QCA_WCN3998: 1463 case QCA_WCN6750: 1464 case QCA_WCN6855: 1465 case QCA_WCN7850: 1466 if (!qca_get_speed(hu, QCA_INIT_SPEED) && 1467 !qca_get_speed(hu, QCA_OPER_SPEED)) 1468 return -EINVAL; 1469 break; 1470 1471 default: 1472 if (!qca_get_speed(hu, QCA_INIT_SPEED) || 1473 !qca_get_speed(hu, QCA_OPER_SPEED)) 1474 return -EINVAL; 1475 } 1476 1477 return 0; 1478} 1479 1480static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) 1481{ 1482 unsigned int speed, qca_baudrate; 1483 struct qca_data *qca = hu->priv; 1484 int ret = 0; 1485 1486 if (speed_type == QCA_INIT_SPEED) { 1487 speed = qca_get_speed(hu, QCA_INIT_SPEED); 1488 if (speed) 1489 host_set_baudrate(hu, speed); 1490 } else { 1491 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1492 1493 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1494 if (!speed) 1495 return 0; 1496 1497 /* Disable flow control for wcn3990 to deassert RTS while 1498 * changing the baudrate of chip and host. 1499 */ 1500 switch (soc_type) { 1501 case QCA_WCN3950: 1502 case QCA_WCN3988: 1503 case QCA_WCN3990: 1504 case QCA_WCN3991: 1505 case QCA_WCN3998: 1506 case QCA_WCN6750: 1507 case QCA_WCN6855: 1508 case QCA_WCN7850: 1509 hci_uart_set_flow_control(hu, true); 1510 break; 1511 1512 default: 1513 break; 1514 } 1515 1516 switch (soc_type) { 1517 case QCA_WCN3990: 1518 reinit_completion(&qca->drop_ev_comp); 1519 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1520 break; 1521 1522 default: 1523 break; 1524 } 1525 1526 qca_baudrate = qca_get_baudrate_value(speed); 1527 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); 1528 ret = qca_set_baudrate(hu->hdev, qca_baudrate); 1529 if (ret) 1530 goto error; 1531 1532 host_set_baudrate(hu, speed); 1533 1534error: 1535 switch (soc_type) { 1536 case QCA_WCN3950: 1537 case QCA_WCN3988: 1538 case QCA_WCN3990: 1539 case QCA_WCN3991: 1540 case QCA_WCN3998: 1541 case QCA_WCN6750: 1542 case QCA_WCN6855: 1543 case QCA_WCN7850: 1544 hci_uart_set_flow_control(hu, false); 1545 break; 1546 1547 default: 1548 break; 1549 } 1550 1551 switch (soc_type) { 1552 case QCA_WCN3990: 1553 /* Wait for the controller to send the vendor event 1554 * for the baudrate change command. 1555 */ 1556 if (!wait_for_completion_timeout(&qca->drop_ev_comp, 1557 msecs_to_jiffies(100))) { 1558 bt_dev_err(hu->hdev, 1559 "Failed to change controller baudrate\n"); 1560 ret = -ETIMEDOUT; 1561 } 1562 1563 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1564 break; 1565 1566 default: 1567 break; 1568 } 1569 } 1570 1571 return ret; 1572} 1573 1574static int qca_send_crashbuffer(struct hci_uart *hu) 1575{ 1576 struct qca_data *qca = hu->priv; 1577 struct sk_buff *skb; 1578 1579 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); 1580 if (!skb) { 1581 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); 1582 return -ENOMEM; 1583 } 1584 1585 /* We forcefully crash the controller, by sending 0xfb byte for 1586 * 1024 times. We also might have chance of losing data, To be 1587 * on safer side we send 1096 bytes to the SoC. 1588 */ 1589 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, 1590 QCA_CRASHBYTE_PACKET_LEN); 1591 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1592 bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); 1593 skb_queue_tail(&qca->txq, skb); 1594 hci_uart_tx_wakeup(hu); 1595 1596 return 0; 1597} 1598 1599static void qca_wait_for_dump_collection(struct hci_dev *hdev) 1600{ 1601 struct hci_uart *hu = hci_get_drvdata(hdev); 1602 struct qca_data *qca = hu->priv; 1603 1604 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, 1605 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS); 1606 1607 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1608} 1609 1610static void qca_hw_error(struct hci_dev *hdev, u8 code) 1611{ 1612 struct hci_uart *hu = hci_get_drvdata(hdev); 1613 struct qca_data *qca = hu->priv; 1614 1615 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1616 set_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1617 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); 1618 1619 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1620 /* If hardware error event received for other than QCA 1621 * soc memory dump event, then we need to crash the SOC 1622 * and wait here for 8 seconds to get the dump packets. 1623 * This will block main thread to be on hold until we 1624 * collect dump. 1625 */ 1626 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1627 qca_send_crashbuffer(hu); 1628 qca_wait_for_dump_collection(hdev); 1629 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1630 /* Let us wait here until memory dump collected or 1631 * memory dump timer expired. 1632 */ 1633 bt_dev_info(hdev, "waiting for dump to complete"); 1634 qca_wait_for_dump_collection(hdev); 1635 } 1636 1637 mutex_lock(&qca->hci_memdump_lock); 1638 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1639 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); 1640 hci_devcd_abort(hu->hdev); 1641 if (qca->qca_memdump) { 1642 kfree(qca->qca_memdump); 1643 qca->qca_memdump = NULL; 1644 } 1645 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1646 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1647 } 1648 mutex_unlock(&qca->hci_memdump_lock); 1649 1650 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1651 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1652 cancel_work_sync(&qca->ctrl_memdump_evt); 1653 skb_queue_purge(&qca->rx_memdump_q); 1654 } 1655 1656 /* 1657 * If the BT chip's bt_en pin is connected to a 3.3V power supply via 1658 * hardware and always stays high, driver cannot control the bt_en pin. 1659 * As a result, during SSR (SubSystem Restart), QCA_SSR_TRIGGERED and 1660 * QCA_IBS_DISABLED flags cannot be cleared, which leads to a reset 1661 * command timeout. 1662 * Add an msleep delay to ensure controller completes the SSR process. 1663 * 1664 * Host will not download the firmware after SSR, controller to remain 1665 * in the IBS_WAKE state, and the host needs to synchronize with it 1666 * 1667 * Since the bluetooth chip has been reset, clear the memdump state. 1668 */ 1669 if (!hci_test_quirk(hu->hdev, HCI_QUIRK_NON_PERSISTENT_SETUP)) { 1670 /* 1671 * When the SSR (SubSystem Restart) duration exceeds 2 seconds, 1672 * it triggers host tx_idle_delay, which sets host TX state 1673 * to sleep. Reset tx_idle_timer after SSR to prevent 1674 * host enter TX IBS_Sleep mode. 1675 */ 1676 mod_timer(&qca->tx_idle_timer, jiffies + 1677 msecs_to_jiffies(qca->tx_idle_delay)); 1678 1679 /* Controller reset completion time is 50ms */ 1680 msleep(50); 1681 1682 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1683 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1684 1685 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 1686 qca->memdump_state = QCA_MEMDUMP_IDLE; 1687 } 1688 1689 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1690} 1691 1692static void qca_reset(struct hci_dev *hdev) 1693{ 1694 struct hci_uart *hu = hci_get_drvdata(hdev); 1695 struct qca_data *qca = hu->priv; 1696 1697 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1698 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1699 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1700 qca_send_crashbuffer(hu); 1701 qca_wait_for_dump_collection(hdev); 1702 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1703 /* Let us wait here until memory dump collected or 1704 * memory dump timer expired. 1705 */ 1706 bt_dev_info(hdev, "waiting for dump to complete"); 1707 qca_wait_for_dump_collection(hdev); 1708 } 1709 1710 mutex_lock(&qca->hci_memdump_lock); 1711 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1712 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1713 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 1714 /* Inject hw error event to reset the device 1715 * and driver. 1716 */ 1717 hci_reset_dev(hu->hdev); 1718 } 1719 } 1720 mutex_unlock(&qca->hci_memdump_lock); 1721} 1722 1723static bool qca_wakeup(struct hci_dev *hdev) 1724{ 1725 struct hci_uart *hu = hci_get_drvdata(hdev); 1726 bool wakeup; 1727 1728 if (!hu->serdev) 1729 return true; 1730 1731 /* BT SoC attached through the serial bus is handled by the serdev driver. 1732 * So we need to use the device handle of the serdev driver to get the 1733 * status of device may wakeup. 1734 */ 1735 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev); 1736 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup); 1737 1738 return wakeup; 1739} 1740 1741static int qca_port_reopen(struct hci_uart *hu) 1742{ 1743 int ret; 1744 1745 /* Now the device is in ready state to communicate with host. 1746 * To sync host with device we need to reopen port. 1747 * Without this, we will have RTS and CTS synchronization 1748 * issues. 1749 */ 1750 serdev_device_close(hu->serdev); 1751 ret = serdev_device_open(hu->serdev); 1752 if (ret) { 1753 bt_dev_err(hu->hdev, "failed to open port"); 1754 return ret; 1755 } 1756 1757 hci_uart_set_flow_control(hu, false); 1758 1759 return 0; 1760} 1761 1762static int qca_regulator_init(struct hci_uart *hu) 1763{ 1764 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1765 struct qca_serdev *qcadev; 1766 int ret; 1767 bool sw_ctrl_state; 1768 1769 /* Check for vregs status, may be hci down has turned 1770 * off the voltage regulator. 1771 */ 1772 qcadev = serdev_device_get_drvdata(hu->serdev); 1773 1774 if (!qcadev->bt_power->vregs_on) { 1775 serdev_device_close(hu->serdev); 1776 ret = qca_regulator_enable(qcadev); 1777 if (ret) 1778 return ret; 1779 1780 ret = serdev_device_open(hu->serdev); 1781 if (ret) { 1782 bt_dev_err(hu->hdev, "failed to open port"); 1783 return ret; 1784 } 1785 } 1786 1787 switch (soc_type) { 1788 case QCA_WCN3950: 1789 case QCA_WCN3988: 1790 case QCA_WCN3990: 1791 case QCA_WCN3991: 1792 case QCA_WCN3998: 1793 /* Forcefully enable wcn399x to enter in to boot mode. */ 1794 host_set_baudrate(hu, 2400); 1795 ret = qca_send_power_pulse(hu, false); 1796 if (ret) 1797 return ret; 1798 break; 1799 1800 default: 1801 break; 1802 } 1803 1804 /* For wcn6750 need to enable gpio bt_en */ 1805 if (qcadev->bt_en) { 1806 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1807 msleep(50); 1808 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1809 msleep(50); 1810 if (qcadev->sw_ctrl) { 1811 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 1812 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 1813 } 1814 } 1815 1816 qca_set_speed(hu, QCA_INIT_SPEED); 1817 1818 switch (soc_type) { 1819 case QCA_WCN3950: 1820 case QCA_WCN3988: 1821 case QCA_WCN3990: 1822 case QCA_WCN3991: 1823 case QCA_WCN3998: 1824 ret = qca_send_power_pulse(hu, true); 1825 if (ret) 1826 return ret; 1827 break; 1828 1829 default: 1830 break; 1831 } 1832 1833 return qca_port_reopen(hu); 1834} 1835 1836static int qca_power_on(struct hci_dev *hdev) 1837{ 1838 struct hci_uart *hu = hci_get_drvdata(hdev); 1839 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1840 struct qca_serdev *qcadev; 1841 struct qca_data *qca = hu->priv; 1842 int ret = 0; 1843 1844 /* Non-serdev device usually is powered by external power 1845 * and don't need additional action in driver for power on 1846 */ 1847 if (!hu->serdev) 1848 return 0; 1849 1850 switch (soc_type) { 1851 case QCA_WCN3950: 1852 case QCA_WCN3988: 1853 case QCA_WCN3990: 1854 case QCA_WCN3991: 1855 case QCA_WCN3998: 1856 case QCA_WCN6750: 1857 case QCA_WCN6855: 1858 case QCA_WCN7850: 1859 case QCA_QCA6390: 1860 ret = qca_regulator_init(hu); 1861 break; 1862 1863 default: 1864 qcadev = serdev_device_get_drvdata(hu->serdev); 1865 if (qcadev->bt_en) { 1866 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1867 /* Controller needs time to bootup. */ 1868 msleep(150); 1869 } 1870 } 1871 1872 clear_bit(QCA_BT_OFF, &qca->flags); 1873 return ret; 1874} 1875 1876static void hci_coredump_qca(struct hci_dev *hdev) 1877{ 1878 int err; 1879 static const u8 param[] = { 0x26 }; 1880 1881 err = __hci_cmd_send(hdev, 0xfc0c, 1, param); 1882 if (err < 0) 1883 bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err); 1884} 1885 1886static int qca_get_data_path_id(struct hci_dev *hdev, __u8 *data_path_id) 1887{ 1888 /* QCA uses 1 as non-HCI data path id for HFP */ 1889 *data_path_id = 1; 1890 return 0; 1891} 1892 1893static int qca_configure_hfp_offload(struct hci_dev *hdev) 1894{ 1895 bt_dev_info(hdev, "HFP non-HCI data transport is supported"); 1896 hdev->get_data_path_id = qca_get_data_path_id; 1897 /* Do not need to send HCI_Configure_Data_Path to configure non-HCI 1898 * data transport path for QCA controllers, so set below field as NULL. 1899 */ 1900 hdev->get_codec_config_data = NULL; 1901 return 0; 1902} 1903 1904static int qca_setup(struct hci_uart *hu) 1905{ 1906 struct hci_dev *hdev = hu->hdev; 1907 struct qca_data *qca = hu->priv; 1908 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; 1909 unsigned int retries = 0; 1910 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1911 const char *firmware_name = qca_get_firmware_name(hu); 1912 const char *rampatch_name = qca_get_rampatch_name(hu); 1913 int ret; 1914 struct qca_btsoc_version ver; 1915 struct qca_serdev *qcadev; 1916 const char *soc_name; 1917 1918 ret = qca_check_speeds(hu); 1919 if (ret) 1920 return ret; 1921 1922 clear_bit(QCA_ROM_FW, &qca->flags); 1923 /* Patch downloading has to be done without IBS mode */ 1924 set_bit(QCA_IBS_DISABLED, &qca->flags); 1925 1926 /* Enable controller to do both LE scan and BR/EDR inquiry 1927 * simultaneously. 1928 */ 1929 hci_set_quirk(hdev, HCI_QUIRK_SIMULTANEOUS_DISCOVERY); 1930 1931 switch (soc_type) { 1932 case QCA_QCA2066: 1933 soc_name = "qca2066"; 1934 break; 1935 1936 case QCA_WCN3950: 1937 case QCA_WCN3988: 1938 case QCA_WCN3990: 1939 case QCA_WCN3991: 1940 case QCA_WCN3998: 1941 soc_name = "wcn399x"; 1942 break; 1943 1944 case QCA_WCN6750: 1945 soc_name = "wcn6750"; 1946 break; 1947 1948 case QCA_WCN6855: 1949 soc_name = "wcn6855"; 1950 break; 1951 1952 case QCA_WCN7850: 1953 soc_name = "wcn7850"; 1954 break; 1955 1956 default: 1957 soc_name = "ROME/QCA6390"; 1958 } 1959 bt_dev_info(hdev, "setting up %s", soc_name); 1960 1961 qca->memdump_state = QCA_MEMDUMP_IDLE; 1962 1963retry: 1964 ret = qca_power_on(hdev); 1965 if (ret) 1966 goto out; 1967 1968 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1969 1970 switch (soc_type) { 1971 case QCA_WCN3950: 1972 case QCA_WCN3988: 1973 case QCA_WCN3990: 1974 case QCA_WCN3991: 1975 case QCA_WCN3998: 1976 case QCA_WCN6750: 1977 case QCA_WCN6855: 1978 case QCA_WCN7850: 1979 qcadev = serdev_device_get_drvdata(hu->serdev); 1980 if (qcadev->bdaddr_property_broken) 1981 hci_set_quirk(hdev, HCI_QUIRK_BDADDR_PROPERTY_BROKEN); 1982 1983 hci_set_aosp_capable(hdev); 1984 1985 ret = qca_read_soc_version(hdev, &ver, soc_type); 1986 if (ret) 1987 goto out; 1988 break; 1989 1990 default: 1991 qca_set_speed(hu, QCA_INIT_SPEED); 1992 } 1993 1994 /* Setup user speed if needed */ 1995 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1996 if (speed) { 1997 ret = qca_set_speed(hu, QCA_OPER_SPEED); 1998 if (ret) 1999 goto out; 2000 2001 qca_baudrate = qca_get_baudrate_value(speed); 2002 } 2003 2004 switch (soc_type) { 2005 case QCA_WCN3950: 2006 case QCA_WCN3988: 2007 case QCA_WCN3990: 2008 case QCA_WCN3991: 2009 case QCA_WCN3998: 2010 case QCA_WCN6750: 2011 case QCA_WCN6855: 2012 case QCA_WCN7850: 2013 break; 2014 2015 default: 2016 /* Get QCA version information */ 2017 ret = qca_read_soc_version(hdev, &ver, soc_type); 2018 if (ret) 2019 goto out; 2020 } 2021 2022 /* Setup patch / NVM configurations */ 2023 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver, 2024 firmware_name, rampatch_name); 2025 if (!ret) { 2026 clear_bit(QCA_IBS_DISABLED, &qca->flags); 2027 qca_debugfs_init(hdev); 2028 hu->hdev->hw_error = qca_hw_error; 2029 hu->hdev->reset = qca_reset; 2030 if (hu->serdev) { 2031 if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) 2032 hu->hdev->wakeup = qca_wakeup; 2033 } 2034 } else if (ret == -ENOENT) { 2035 /* No patch/nvm-config found, run with original fw/config */ 2036 set_bit(QCA_ROM_FW, &qca->flags); 2037 ret = 0; 2038 } else if (ret == -EAGAIN) { 2039 /* 2040 * Userspace firmware loader will return -EAGAIN in case no 2041 * patch/nvm-config is found, so run with original fw/config. 2042 */ 2043 set_bit(QCA_ROM_FW, &qca->flags); 2044 ret = 0; 2045 } 2046 2047out: 2048 if (ret) { 2049 qca_power_shutdown(hu); 2050 2051 if (retries < MAX_INIT_RETRIES) { 2052 bt_dev_warn(hdev, "Retry BT power ON:%d", retries); 2053 if (hu->serdev) { 2054 serdev_device_close(hu->serdev); 2055 ret = serdev_device_open(hu->serdev); 2056 if (ret) { 2057 bt_dev_err(hdev, "failed to open port"); 2058 return ret; 2059 } 2060 } 2061 retries++; 2062 goto retry; 2063 } 2064 return ret; 2065 } 2066 2067 /* Setup bdaddr */ 2068 if (soc_type == QCA_ROME) 2069 hu->hdev->set_bdaddr = qca_set_bdaddr_rome; 2070 else 2071 hu->hdev->set_bdaddr = qca_set_bdaddr; 2072 2073 if (soc_type == QCA_QCA2066) 2074 qca_configure_hfp_offload(hdev); 2075 2076 qca->fw_version = le16_to_cpu(ver.patch_ver); 2077 qca->controller_id = le16_to_cpu(ver.rom_ver); 2078 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL); 2079 2080 return ret; 2081} 2082 2083static const struct hci_uart_proto qca_proto = { 2084 .id = HCI_UART_QCA, 2085 .name = "QCA", 2086 .manufacturer = 29, 2087 .init_speed = 115200, 2088 .oper_speed = 3000000, 2089 .open = qca_open, 2090 .close = qca_close, 2091 .flush = qca_flush, 2092 .setup = qca_setup, 2093 .recv = qca_recv, 2094 .enqueue = qca_enqueue, 2095 .dequeue = qca_dequeue, 2096}; 2097 2098static const struct qca_device_data qca_soc_data_wcn3950 __maybe_unused = { 2099 .soc_type = QCA_WCN3950, 2100 .vregs = (struct qca_vreg []) { 2101 { "vddio", 15000 }, 2102 { "vddxo", 60000 }, 2103 { "vddrf", 155000 }, 2104 { "vddch0", 585000 }, 2105 }, 2106 .num_vregs = 4, 2107}; 2108 2109static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = { 2110 .soc_type = QCA_WCN3988, 2111 .vregs = (struct qca_vreg []) { 2112 { "vddio", 15000 }, 2113 { "vddxo", 80000 }, 2114 { "vddrf", 300000 }, 2115 { "vddch0", 450000 }, 2116 }, 2117 .num_vregs = 4, 2118}; 2119 2120static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = { 2121 .soc_type = QCA_WCN3990, 2122 .vregs = (struct qca_vreg []) { 2123 { "vddio", 15000 }, 2124 { "vddxo", 80000 }, 2125 { "vddrf", 300000 }, 2126 { "vddch0", 450000 }, 2127 }, 2128 .num_vregs = 4, 2129}; 2130 2131static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = { 2132 .soc_type = QCA_WCN3991, 2133 .vregs = (struct qca_vreg []) { 2134 { "vddio", 15000 }, 2135 { "vddxo", 80000 }, 2136 { "vddrf", 300000 }, 2137 { "vddch0", 450000 }, 2138 }, 2139 .num_vregs = 4, 2140 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2141}; 2142 2143static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = { 2144 .soc_type = QCA_WCN3998, 2145 .vregs = (struct qca_vreg []) { 2146 { "vddio", 10000 }, 2147 { "vddxo", 80000 }, 2148 { "vddrf", 300000 }, 2149 { "vddch0", 450000 }, 2150 }, 2151 .num_vregs = 4, 2152}; 2153 2154static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = { 2155 .soc_type = QCA_QCA2066, 2156 .num_vregs = 0, 2157 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2158}; 2159 2160static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = { 2161 .soc_type = QCA_QCA6390, 2162 .num_vregs = 0, 2163}; 2164 2165static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = { 2166 .soc_type = QCA_WCN6750, 2167 .vregs = (struct qca_vreg []) { 2168 { "vddio", 5000 }, 2169 { "vddaon", 26000 }, 2170 { "vddbtcxmx", 126000 }, 2171 { "vddrfacmn", 12500 }, 2172 { "vddrfa0p8", 102000 }, 2173 { "vddrfa1p7", 302000 }, 2174 { "vddrfa1p2", 257000 }, 2175 { "vddrfa2p2", 1700000 }, 2176 { "vddasd", 200 }, 2177 }, 2178 .num_vregs = 9, 2179 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2180}; 2181 2182static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = { 2183 .soc_type = QCA_WCN6855, 2184 .vregs = (struct qca_vreg []) { 2185 { "vddio", 5000 }, 2186 { "vddbtcxmx", 126000 }, 2187 { "vddrfacmn", 12500 }, 2188 { "vddrfa0p8", 102000 }, 2189 { "vddrfa1p7", 302000 }, 2190 { "vddrfa1p2", 257000 }, 2191 }, 2192 .num_vregs = 6, 2193 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2194}; 2195 2196static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = { 2197 .soc_type = QCA_WCN7850, 2198 .vregs = (struct qca_vreg []) { 2199 { "vddio", 5000 }, 2200 { "vddaon", 26000 }, 2201 { "vdddig", 126000 }, 2202 { "vddrfa0p8", 102000 }, 2203 { "vddrfa1p2", 257000 }, 2204 { "vddrfa1p9", 302000 }, 2205 }, 2206 .num_vregs = 6, 2207 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2208}; 2209 2210static void qca_power_shutdown(struct hci_uart *hu) 2211{ 2212 struct qca_serdev *qcadev; 2213 struct qca_data *qca = hu->priv; 2214 unsigned long flags; 2215 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2216 bool sw_ctrl_state; 2217 struct qca_power *power; 2218 2219 /* From this point we go into power off state. But serial port is 2220 * still open, stop queueing the IBS data and flush all the buffered 2221 * data in skb's. 2222 */ 2223 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 2224 set_bit(QCA_IBS_DISABLED, &qca->flags); 2225 qca_flush(hu); 2226 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2227 2228 /* Non-serdev device usually is powered by external power 2229 * and don't need additional action in driver for power down 2230 */ 2231 if (!hu->serdev) 2232 return; 2233 2234 qcadev = serdev_device_get_drvdata(hu->serdev); 2235 power = qcadev->bt_power; 2236 2237 if (power && power->pwrseq) { 2238 pwrseq_power_off(power->pwrseq); 2239 set_bit(QCA_BT_OFF, &qca->flags); 2240 return; 2241 } 2242 2243 switch (soc_type) { 2244 case QCA_WCN3988: 2245 case QCA_WCN3990: 2246 case QCA_WCN3991: 2247 case QCA_WCN3998: 2248 host_set_baudrate(hu, 2400); 2249 qca_send_power_pulse(hu, false); 2250 qca_regulator_disable(qcadev); 2251 break; 2252 2253 case QCA_WCN6750: 2254 case QCA_WCN6855: 2255 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2256 msleep(100); 2257 qca_regulator_disable(qcadev); 2258 if (qcadev->sw_ctrl) { 2259 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 2260 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 2261 } 2262 break; 2263 2264 default: 2265 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2266 } 2267 2268 set_bit(QCA_BT_OFF, &qca->flags); 2269} 2270 2271static int qca_power_off(struct hci_dev *hdev) 2272{ 2273 struct hci_uart *hu = hci_get_drvdata(hdev); 2274 struct qca_data *qca = hu->priv; 2275 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2276 2277 hu->hdev->hw_error = NULL; 2278 hu->hdev->reset = NULL; 2279 2280 timer_delete_sync(&qca->wake_retrans_timer); 2281 timer_delete_sync(&qca->tx_idle_timer); 2282 2283 /* Stop sending shutdown command if soc crashes. */ 2284 if (soc_type != QCA_ROME 2285 && qca->memdump_state == QCA_MEMDUMP_IDLE) { 2286 qca_send_pre_shutdown_cmd(hdev); 2287 usleep_range(8000, 10000); 2288 } 2289 2290 qca_power_shutdown(hu); 2291 return 0; 2292} 2293 2294static int qca_regulator_enable(struct qca_serdev *qcadev) 2295{ 2296 struct qca_power *power = qcadev->bt_power; 2297 int ret; 2298 2299 if (power->pwrseq) 2300 return pwrseq_power_on(power->pwrseq); 2301 2302 /* Already enabled */ 2303 if (power->vregs_on) 2304 return 0; 2305 2306 BT_DBG("enabling %d regulators)", power->num_vregs); 2307 2308 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); 2309 if (ret) 2310 return ret; 2311 2312 power->vregs_on = true; 2313 2314 ret = clk_prepare_enable(qcadev->susclk); 2315 if (ret) 2316 qca_regulator_disable(qcadev); 2317 2318 return ret; 2319} 2320 2321static void qca_regulator_disable(struct qca_serdev *qcadev) 2322{ 2323 struct qca_power *power; 2324 2325 if (!qcadev) 2326 return; 2327 2328 power = qcadev->bt_power; 2329 2330 /* Already disabled? */ 2331 if (!power->vregs_on) 2332 return; 2333 2334 regulator_bulk_disable(power->num_vregs, power->vreg_bulk); 2335 power->vregs_on = false; 2336 2337 clk_disable_unprepare(qcadev->susclk); 2338} 2339 2340static int qca_init_regulators(struct qca_power *qca, 2341 const struct qca_vreg *vregs, size_t num_vregs) 2342{ 2343 struct regulator_bulk_data *bulk; 2344 int ret; 2345 int i; 2346 2347 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); 2348 if (!bulk) 2349 return -ENOMEM; 2350 2351 for (i = 0; i < num_vregs; i++) 2352 bulk[i].supply = vregs[i].name; 2353 2354 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); 2355 if (ret < 0) 2356 return ret; 2357 2358 for (i = 0; i < num_vregs; i++) { 2359 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); 2360 if (ret) 2361 return ret; 2362 } 2363 2364 qca->vreg_bulk = bulk; 2365 qca->num_vregs = num_vregs; 2366 2367 return 0; 2368} 2369 2370static int qca_serdev_probe(struct serdev_device *serdev) 2371{ 2372 struct qca_serdev *qcadev; 2373 struct hci_dev *hdev; 2374 const struct qca_device_data *data; 2375 int err; 2376 bool power_ctrl_enabled = true; 2377 2378 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); 2379 if (!qcadev) 2380 return -ENOMEM; 2381 2382 qcadev->serdev_hu.serdev = serdev; 2383 data = device_get_match_data(&serdev->dev); 2384 serdev_device_set_drvdata(serdev, qcadev); 2385 device_property_read_string_array(&serdev->dev, "firmware-name", 2386 qcadev->firmware_name, ARRAY_SIZE(qcadev->firmware_name)); 2387 device_property_read_u32(&serdev->dev, "max-speed", 2388 &qcadev->oper_speed); 2389 if (!qcadev->oper_speed) 2390 BT_DBG("UART will pick default operating speed"); 2391 2392 qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev, 2393 "qcom,local-bd-address-broken"); 2394 2395 if (data) 2396 qcadev->btsoc_type = data->soc_type; 2397 else 2398 qcadev->btsoc_type = QCA_ROME; 2399 2400 switch (qcadev->btsoc_type) { 2401 case QCA_WCN3950: 2402 case QCA_WCN3988: 2403 case QCA_WCN3990: 2404 case QCA_WCN3991: 2405 case QCA_WCN3998: 2406 case QCA_WCN6750: 2407 case QCA_WCN6855: 2408 case QCA_WCN7850: 2409 case QCA_QCA6390: 2410 qcadev->bt_power = devm_kzalloc(&serdev->dev, 2411 sizeof(struct qca_power), 2412 GFP_KERNEL); 2413 if (!qcadev->bt_power) 2414 return -ENOMEM; 2415 break; 2416 default: 2417 break; 2418 } 2419 2420 switch (qcadev->btsoc_type) { 2421 case QCA_WCN6855: 2422 case QCA_WCN7850: 2423 case QCA_WCN6750: 2424 if (!device_property_present(&serdev->dev, "enable-gpios")) { 2425 /* 2426 * Backward compatibility with old DT sources. If the 2427 * node doesn't have the 'enable-gpios' property then 2428 * let's use the power sequencer. Otherwise, let's 2429 * drive everything ourselves. 2430 */ 2431 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev, 2432 "bluetooth"); 2433 2434 /* 2435 * Some modules have BT_EN enabled via a hardware pull-up, 2436 * meaning it is not defined in the DTS and is not controlled 2437 * through the power sequence. In such cases, fall through 2438 * to follow the legacy flow. 2439 */ 2440 if (IS_ERR(qcadev->bt_power->pwrseq)) 2441 qcadev->bt_power->pwrseq = NULL; 2442 else 2443 break; 2444 } 2445 fallthrough; 2446 case QCA_WCN3950: 2447 case QCA_WCN3988: 2448 case QCA_WCN3990: 2449 case QCA_WCN3991: 2450 case QCA_WCN3998: 2451 qcadev->bt_power->dev = &serdev->dev; 2452 err = qca_init_regulators(qcadev->bt_power, data->vregs, 2453 data->num_vregs); 2454 if (err) { 2455 BT_ERR("Failed to init regulators:%d", err); 2456 return err; 2457 } 2458 2459 qcadev->bt_power->vregs_on = false; 2460 2461 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2462 GPIOD_OUT_LOW); 2463 if (IS_ERR(qcadev->bt_en)) 2464 return dev_err_probe(&serdev->dev, 2465 PTR_ERR(qcadev->bt_en), 2466 "failed to acquire BT_EN gpio\n"); 2467 2468 if (!qcadev->bt_en && 2469 (data->soc_type == QCA_WCN6750 || 2470 data->soc_type == QCA_WCN6855)) 2471 power_ctrl_enabled = false; 2472 2473 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", 2474 GPIOD_IN); 2475 if (IS_ERR(qcadev->sw_ctrl) && 2476 (data->soc_type == QCA_WCN6750 || 2477 data->soc_type == QCA_WCN6855 || 2478 data->soc_type == QCA_WCN7850)) { 2479 dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); 2480 return PTR_ERR(qcadev->sw_ctrl); 2481 } 2482 2483 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2484 if (IS_ERR(qcadev->susclk)) { 2485 dev_err(&serdev->dev, "failed to acquire clk\n"); 2486 return PTR_ERR(qcadev->susclk); 2487 } 2488 break; 2489 2490 case QCA_QCA6390: 2491 if (dev_of_node(&serdev->dev)) { 2492 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev, 2493 "bluetooth"); 2494 if (IS_ERR(qcadev->bt_power->pwrseq)) 2495 return PTR_ERR(qcadev->bt_power->pwrseq); 2496 break; 2497 } 2498 fallthrough; 2499 2500 default: 2501 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2502 GPIOD_OUT_LOW); 2503 if (IS_ERR(qcadev->bt_en)) { 2504 dev_err(&serdev->dev, "failed to acquire enable gpio\n"); 2505 return PTR_ERR(qcadev->bt_en); 2506 } 2507 2508 if (!qcadev->bt_en) 2509 power_ctrl_enabled = false; 2510 2511 qcadev->susclk = devm_clk_get_optional_enabled_with_rate( 2512 &serdev->dev, NULL, SUSCLK_RATE_32KHZ); 2513 if (IS_ERR(qcadev->susclk)) { 2514 dev_warn(&serdev->dev, "failed to acquire clk\n"); 2515 return PTR_ERR(qcadev->susclk); 2516 } 2517 } 2518 2519 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2520 if (err) { 2521 BT_ERR("serdev registration failed"); 2522 return err; 2523 } 2524 2525 hdev = qcadev->serdev_hu.hdev; 2526 2527 if (power_ctrl_enabled) { 2528 hci_set_quirk(hdev, HCI_QUIRK_NON_PERSISTENT_SETUP); 2529 hdev->shutdown = qca_power_off; 2530 } 2531 2532 if (data) { 2533 /* Wideband speech support must be set per driver since it can't 2534 * be queried via hci. Same with the valid le states quirk. 2535 */ 2536 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH) 2537 hci_set_quirk(hdev, 2538 HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED); 2539 2540 if (!(data->capabilities & QCA_CAP_VALID_LE_STATES)) 2541 hci_set_quirk(hdev, HCI_QUIRK_BROKEN_LE_STATES); 2542 } 2543 2544 return 0; 2545} 2546 2547static void qca_serdev_remove(struct serdev_device *serdev) 2548{ 2549 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2550 struct qca_power *power = qcadev->bt_power; 2551 2552 switch (qcadev->btsoc_type) { 2553 case QCA_WCN3988: 2554 case QCA_WCN3990: 2555 case QCA_WCN3991: 2556 case QCA_WCN3998: 2557 case QCA_WCN6750: 2558 case QCA_WCN6855: 2559 case QCA_WCN7850: 2560 if (power->vregs_on) 2561 qca_power_shutdown(&qcadev->serdev_hu); 2562 break; 2563 default: 2564 break; 2565 } 2566 2567 hci_uart_unregister_device(&qcadev->serdev_hu); 2568} 2569 2570static void qca_serdev_shutdown(struct device *dev) 2571{ 2572 int ret; 2573 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 2574 struct serdev_device *serdev = to_serdev_device(dev); 2575 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2576 struct hci_uart *hu = &qcadev->serdev_hu; 2577 struct hci_dev *hdev = hu->hdev; 2578 const u8 ibs_wake_cmd[] = { 0xFD }; 2579 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; 2580 2581 if (qcadev->btsoc_type == QCA_QCA6390) { 2582 /* The purpose of sending the VSC is to reset SOC into a initial 2583 * state and the state will ensure next hdev->setup() success. 2584 * if HCI_QUIRK_NON_PERSISTENT_SETUP is set, it means that 2585 * hdev->setup() can do its job regardless of SoC state, so 2586 * don't need to send the VSC. 2587 * if HCI_SETUP is set, it means that hdev->setup() was never 2588 * invoked and the SOC is already in the initial state, so 2589 * don't also need to send the VSC. 2590 */ 2591 if (hci_test_quirk(hdev, HCI_QUIRK_NON_PERSISTENT_SETUP) || 2592 hci_dev_test_flag(hdev, HCI_SETUP)) 2593 return; 2594 2595 /* The serdev must be in open state when control logic arrives 2596 * here, so also fix the use-after-free issue caused by that 2597 * the serdev is flushed or wrote after it is closed. 2598 */ 2599 serdev_device_write_flush(serdev); 2600 ret = serdev_device_write_buf(serdev, ibs_wake_cmd, 2601 sizeof(ibs_wake_cmd)); 2602 if (ret < 0) { 2603 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret); 2604 return; 2605 } 2606 serdev_device_wait_until_sent(serdev, timeout); 2607 usleep_range(8000, 10000); 2608 2609 serdev_device_write_flush(serdev); 2610 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd, 2611 sizeof(edl_reset_soc_cmd)); 2612 if (ret < 0) { 2613 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret); 2614 return; 2615 } 2616 serdev_device_wait_until_sent(serdev, timeout); 2617 usleep_range(8000, 10000); 2618 } 2619} 2620 2621static int __maybe_unused qca_suspend(struct device *dev) 2622{ 2623 struct serdev_device *serdev = to_serdev_device(dev); 2624 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2625 struct hci_uart *hu = &qcadev->serdev_hu; 2626 struct qca_data *qca = hu->priv; 2627 unsigned long flags; 2628 bool tx_pending = false; 2629 int ret = 0; 2630 u8 cmd; 2631 u32 wait_timeout = 0; 2632 2633 set_bit(QCA_SUSPENDING, &qca->flags); 2634 2635 /* if BT SoC is running with default firmware then it does not 2636 * support in-band sleep 2637 */ 2638 if (test_bit(QCA_ROM_FW, &qca->flags)) 2639 return 0; 2640 2641 /* During SSR after memory dump collection, controller will be 2642 * powered off and then powered on.If controller is powered off 2643 * during SSR then we should wait until SSR is completed. 2644 */ 2645 if (test_bit(QCA_BT_OFF, &qca->flags) && 2646 !test_bit(QCA_SSR_TRIGGERED, &qca->flags)) 2647 return 0; 2648 2649 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 2650 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 2651 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ? 2652 IBS_DISABLE_SSR_TIMEOUT_MS : 2653 FW_DOWNLOAD_TIMEOUT_MS; 2654 2655 /* QCA_IBS_DISABLED flag is set to true, During FW download 2656 * and during memory dump collection. It is reset to false, 2657 * After FW download complete. 2658 */ 2659 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED, 2660 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout)); 2661 2662 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) { 2663 bt_dev_err(hu->hdev, "SSR or FW download time out"); 2664 ret = -ETIMEDOUT; 2665 goto error; 2666 } 2667 } 2668 2669 cancel_work_sync(&qca->ws_awake_device); 2670 cancel_work_sync(&qca->ws_awake_rx); 2671 2672 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 2673 flags, SINGLE_DEPTH_NESTING); 2674 2675 switch (qca->tx_ibs_state) { 2676 case HCI_IBS_TX_WAKING: 2677 timer_delete(&qca->wake_retrans_timer); 2678 fallthrough; 2679 case HCI_IBS_TX_AWAKE: 2680 timer_delete(&qca->tx_idle_timer); 2681 2682 serdev_device_write_flush(hu->serdev); 2683 cmd = HCI_IBS_SLEEP_IND; 2684 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 2685 2686 if (ret < 0) { 2687 BT_ERR("Failed to send SLEEP to device"); 2688 break; 2689 } 2690 2691 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 2692 qca->ibs_sent_slps++; 2693 tx_pending = true; 2694 break; 2695 2696 case HCI_IBS_TX_ASLEEP: 2697 break; 2698 2699 default: 2700 BT_ERR("Spurious tx state %d", qca->tx_ibs_state); 2701 ret = -EINVAL; 2702 break; 2703 } 2704 2705 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2706 2707 if (ret < 0) 2708 goto error; 2709 2710 if (tx_pending) { 2711 serdev_device_wait_until_sent(hu->serdev, 2712 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 2713 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 2714 } 2715 2716 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going 2717 * to sleep, so that the packet does not wake the system later. 2718 */ 2719 ret = wait_event_interruptible_timeout(qca->suspend_wait_q, 2720 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, 2721 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS)); 2722 if (ret == 0) { 2723 ret = -ETIMEDOUT; 2724 goto error; 2725 } 2726 2727 return 0; 2728 2729error: 2730 clear_bit(QCA_SUSPENDING, &qca->flags); 2731 2732 return ret; 2733} 2734 2735static int __maybe_unused qca_resume(struct device *dev) 2736{ 2737 struct serdev_device *serdev = to_serdev_device(dev); 2738 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2739 struct hci_uart *hu = &qcadev->serdev_hu; 2740 struct qca_data *qca = hu->priv; 2741 2742 clear_bit(QCA_SUSPENDING, &qca->flags); 2743 2744 return 0; 2745} 2746 2747static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); 2748 2749#ifdef CONFIG_OF 2750static const struct of_device_id qca_bluetooth_of_match[] = { 2751 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066}, 2752 { .compatible = "qcom,qca6174-bt" }, 2753 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390}, 2754 { .compatible = "qcom,qca9377-bt" }, 2755 { .compatible = "qcom,wcn3950-bt", .data = &qca_soc_data_wcn3950}, 2756 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988}, 2757 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, 2758 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, 2759 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, 2760 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750}, 2761 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855}, 2762 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850}, 2763 { /* sentinel */ } 2764}; 2765MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); 2766#endif 2767 2768#ifdef CONFIG_ACPI 2769static const struct acpi_device_id qca_bluetooth_acpi_match[] = { 2770 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 }, 2771 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2772 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2773 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2774 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2775 { }, 2776}; 2777MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match); 2778#endif 2779 2780#ifdef CONFIG_DEV_COREDUMP 2781static void hciqca_coredump(struct device *dev) 2782{ 2783 struct serdev_device *serdev = to_serdev_device(dev); 2784 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2785 struct hci_uart *hu = &qcadev->serdev_hu; 2786 struct hci_dev *hdev = hu->hdev; 2787 2788 if (hdev->dump.coredump) 2789 hdev->dump.coredump(hdev); 2790} 2791#endif 2792 2793static struct serdev_device_driver qca_serdev_driver = { 2794 .probe = qca_serdev_probe, 2795 .remove = qca_serdev_remove, 2796 .driver = { 2797 .name = "hci_uart_qca", 2798 .of_match_table = of_match_ptr(qca_bluetooth_of_match), 2799 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match), 2800 .shutdown = qca_serdev_shutdown, 2801 .pm = &qca_pm_ops, 2802#ifdef CONFIG_DEV_COREDUMP 2803 .coredump = hciqca_coredump, 2804#endif 2805 }, 2806}; 2807 2808int __init qca_init(void) 2809{ 2810 serdev_device_driver_register(&qca_serdev_driver); 2811 2812 return hci_uart_register_proto(&qca_proto); 2813} 2814 2815int __exit qca_deinit(void) 2816{ 2817 serdev_device_driver_unregister(&qca_serdev_driver); 2818 2819 return hci_uart_unregister_proto(&qca_proto); 2820}
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