regmap.c

   1// SPDX-License-Identifier: GPL-2.0
   2//
   3// Register map access API
   4//
   5// Copyright 2011 Wolfson Microelectronics plc
   6//
   7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   8
   9#include <linux/device.h>
  10#include <linux/slab.h>
  11#include <linux/export.h>
  12#include <linux/mutex.h>
  13#include <linux/err.h>
  14#include <linux/property.h>
  15#include <linux/rbtree.h>
  16#include <linux/sched.h>
  17#include <linux/delay.h>
  18#include <linux/log2.h>
  19#include <linux/hwspinlock.h>
  20#include <linux/unaligned.h>
  21
  22#define CREATE_TRACE_POINTS
  23#include "trace.h"
  24
  25#include "internal.h"
  26
  27/*
  28 * Sometimes for failures during very early init the trace
  29 * infrastructure isn't available early enough to be used.  For this
  30 * sort of problem defining LOG_DEVICE will add printks for basic
  31 * register I/O on a specific device.
  32 */
  33#undef LOG_DEVICE
  34
  35#ifdef LOG_DEVICE
  36static inline bool regmap_should_log(struct regmap *map)
  37{
  38	return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
  39}
  40#else
  41static inline bool regmap_should_log(struct regmap *map) { return false; }
  42#endif
  43
  44
  45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
  46			       unsigned int mask, unsigned int val,
  47			       bool *change, bool force_write);
  48
  49static int _regmap_bus_reg_read(void *context, unsigned int reg,
  50				unsigned int *val);
  51static int _regmap_bus_read(void *context, unsigned int reg,
  52			    unsigned int *val);
  53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
  54				       unsigned int val);
  55static int _regmap_bus_reg_write(void *context, unsigned int reg,
  56				 unsigned int val);
  57static int _regmap_bus_raw_write(void *context, unsigned int reg,
  58				 unsigned int val);
  59
  60bool regmap_reg_in_ranges(unsigned int reg,
  61			  const struct regmap_range *ranges,
  62			  unsigned int nranges)
  63{
  64	const struct regmap_range *r;
  65	int i;
  66
  67	for (i = 0, r = ranges; i < nranges; i++, r++)
  68		if (regmap_reg_in_range(reg, r))
  69			return true;
  70	return false;
  71}
  72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
  73
  74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
  75			      const struct regmap_access_table *table)
  76{
  77	/* Check "no ranges" first */
  78	if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
  79		return false;
  80
  81	/* In case zero "yes ranges" are supplied, any reg is OK */
  82	if (!table->n_yes_ranges)
  83		return true;
  84
  85	return regmap_reg_in_ranges(reg, table->yes_ranges,
  86				    table->n_yes_ranges);
  87}
  88EXPORT_SYMBOL_GPL(regmap_check_range_table);
  89
  90bool regmap_writeable(struct regmap *map, unsigned int reg)
  91{
  92	if (map->max_register_is_set && reg > map->max_register)
  93		return false;
  94
  95	if (map->writeable_reg)
  96		return map->writeable_reg(map->dev, reg);
  97
  98	if (map->wr_table)
  99		return regmap_check_range_table(map, reg, map->wr_table);
 100
 101	return true;
 102}
 103
 104bool regmap_cached(struct regmap *map, unsigned int reg)
 105{
 106	int ret;
 107	unsigned int val;
 108
 109	if (map->cache_type == REGCACHE_NONE)
 110		return false;
 111
 112	if (!map->cache_ops)
 113		return false;
 114
 115	if (map->max_register_is_set && reg > map->max_register)
 116		return false;
 117
 118	map->lock(map->lock_arg);
 119	ret = regcache_read(map, reg, &val);
 120	map->unlock(map->lock_arg);
 121	if (ret)
 122		return false;
 123
 124	return true;
 125}
 126
 127bool regmap_readable(struct regmap *map, unsigned int reg)
 128{
 129	if (!map->reg_read)
 130		return false;
 131
 132	if (map->max_register_is_set && reg > map->max_register)
 133		return false;
 134
 135	if (map->format.format_write)
 136		return false;
 137
 138	if (map->readable_reg)
 139		return map->readable_reg(map->dev, reg);
 140
 141	if (map->rd_table)
 142		return regmap_check_range_table(map, reg, map->rd_table);
 143
 144	return true;
 145}
 146
 147bool regmap_volatile(struct regmap *map, unsigned int reg)
 148{
 149	if (!map->format.format_write && !regmap_readable(map, reg))
 150		return false;
 151
 152	if (map->volatile_reg)
 153		return map->volatile_reg(map->dev, reg);
 154
 155	if (map->volatile_table)
 156		return regmap_check_range_table(map, reg, map->volatile_table);
 157
 158	if (map->cache_ops)
 159		return false;
 160	else
 161		return true;
 162}
 163
 164bool regmap_precious(struct regmap *map, unsigned int reg)
 165{
 166	if (!regmap_readable(map, reg))
 167		return false;
 168
 169	if (map->precious_reg)
 170		return map->precious_reg(map->dev, reg);
 171
 172	if (map->precious_table)
 173		return regmap_check_range_table(map, reg, map->precious_table);
 174
 175	return false;
 176}
 177
 178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
 179{
 180	if (map->writeable_noinc_reg)
 181		return map->writeable_noinc_reg(map->dev, reg);
 182
 183	if (map->wr_noinc_table)
 184		return regmap_check_range_table(map, reg, map->wr_noinc_table);
 185
 186	return true;
 187}
 188
 189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
 190{
 191	if (map->readable_noinc_reg)
 192		return map->readable_noinc_reg(map->dev, reg);
 193
 194	if (map->rd_noinc_table)
 195		return regmap_check_range_table(map, reg, map->rd_noinc_table);
 196
 197	return true;
 198}
 199
 200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
 201	size_t num)
 202{
 203	unsigned int i;
 204
 205	for (i = 0; i < num; i++)
 206		if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
 207			return false;
 208
 209	return true;
 210}
 211
 212static void regmap_format_12_20_write(struct regmap *map,
 213				     unsigned int reg, unsigned int val)
 214{
 215	u8 *out = map->work_buf;
 216
 217	out[0] = reg >> 4;
 218	out[1] = (reg << 4) | (val >> 16);
 219	out[2] = val >> 8;
 220	out[3] = val;
 221}
 222
 223
 224static void regmap_format_2_6_write(struct regmap *map,
 225				     unsigned int reg, unsigned int val)
 226{
 227	u8 *out = map->work_buf;
 228
 229	*out = (reg << 6) | val;
 230}
 231
 232static void regmap_format_4_12_write(struct regmap *map,
 233				     unsigned int reg, unsigned int val)
 234{
 235	__be16 *out = map->work_buf;
 236	*out = cpu_to_be16((reg << 12) | val);
 237}
 238
 239static void regmap_format_7_9_write(struct regmap *map,
 240				    unsigned int reg, unsigned int val)
 241{
 242	__be16 *out = map->work_buf;
 243	*out = cpu_to_be16((reg << 9) | val);
 244}
 245
 246static void regmap_format_7_17_write(struct regmap *map,
 247				    unsigned int reg, unsigned int val)
 248{
 249	u8 *out = map->work_buf;
 250
 251	out[2] = val;
 252	out[1] = val >> 8;
 253	out[0] = (val >> 16) | (reg << 1);
 254}
 255
 256static void regmap_format_10_14_write(struct regmap *map,
 257				    unsigned int reg, unsigned int val)
 258{
 259	u8 *out = map->work_buf;
 260
 261	out[2] = val;
 262	out[1] = (val >> 8) | (reg << 6);
 263	out[0] = reg >> 2;
 264}
 265
 266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
 267{
 268	u8 *b = buf;
 269
 270	b[0] = val << shift;
 271}
 272
 273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
 274{
 275	put_unaligned_be16(val << shift, buf);
 276}
 277
 278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
 279{
 280	put_unaligned_le16(val << shift, buf);
 281}
 282
 283static void regmap_format_16_native(void *buf, unsigned int val,
 284				    unsigned int shift)
 285{
 286	u16 v = val << shift;
 287
 288	memcpy(buf, &v, sizeof(v));
 289}
 290
 291static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
 292{
 293	put_unaligned_be24(val << shift, buf);
 294}
 295
 296static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
 297{
 298	put_unaligned_be32(val << shift, buf);
 299}
 300
 301static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
 302{
 303	put_unaligned_le32(val << shift, buf);
 304}
 305
 306static void regmap_format_32_native(void *buf, unsigned int val,
 307				    unsigned int shift)
 308{
 309	u32 v = val << shift;
 310
 311	memcpy(buf, &v, sizeof(v));
 312}
 313
 314static void regmap_parse_inplace_noop(void *buf)
 315{
 316}
 317
 318static unsigned int regmap_parse_8(const void *buf)
 319{
 320	const u8 *b = buf;
 321
 322	return b[0];
 323}
 324
 325static unsigned int regmap_parse_16_be(const void *buf)
 326{
 327	return get_unaligned_be16(buf);
 328}
 329
 330static unsigned int regmap_parse_16_le(const void *buf)
 331{
 332	return get_unaligned_le16(buf);
 333}
 334
 335static void regmap_parse_16_be_inplace(void *buf)
 336{
 337	u16 v = get_unaligned_be16(buf);
 338
 339	memcpy(buf, &v, sizeof(v));
 340}
 341
 342static void regmap_parse_16_le_inplace(void *buf)
 343{
 344	u16 v = get_unaligned_le16(buf);
 345
 346	memcpy(buf, &v, sizeof(v));
 347}
 348
 349static unsigned int regmap_parse_16_native(const void *buf)
 350{
 351	u16 v;
 352
 353	memcpy(&v, buf, sizeof(v));
 354	return v;
 355}
 356
 357static unsigned int regmap_parse_24_be(const void *buf)
 358{
 359	return get_unaligned_be24(buf);
 360}
 361
 362static unsigned int regmap_parse_32_be(const void *buf)
 363{
 364	return get_unaligned_be32(buf);
 365}
 366
 367static unsigned int regmap_parse_32_le(const void *buf)
 368{
 369	return get_unaligned_le32(buf);
 370}
 371
 372static void regmap_parse_32_be_inplace(void *buf)
 373{
 374	u32 v = get_unaligned_be32(buf);
 375
 376	memcpy(buf, &v, sizeof(v));
 377}
 378
 379static void regmap_parse_32_le_inplace(void *buf)
 380{
 381	u32 v = get_unaligned_le32(buf);
 382
 383	memcpy(buf, &v, sizeof(v));
 384}
 385
 386static unsigned int regmap_parse_32_native(const void *buf)
 387{
 388	u32 v;
 389
 390	memcpy(&v, buf, sizeof(v));
 391	return v;
 392}
 393
 394static void regmap_lock_hwlock(void *__map)
 395{
 396	struct regmap *map = __map;
 397
 398	hwspin_lock_timeout(map->hwlock, UINT_MAX);
 399}
 400
 401static void regmap_lock_hwlock_irq(void *__map)
 402{
 403	struct regmap *map = __map;
 404
 405	hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
 406}
 407
 408static void regmap_lock_hwlock_irqsave(void *__map)
 409{
 410	struct regmap *map = __map;
 411	unsigned long flags = 0;
 412
 413	hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
 414				    &flags);
 415	map->spinlock_flags = flags;
 416}
 417
 418static void regmap_unlock_hwlock(void *__map)
 419{
 420	struct regmap *map = __map;
 421
 422	hwspin_unlock(map->hwlock);
 423}
 424
 425static void regmap_unlock_hwlock_irq(void *__map)
 426{
 427	struct regmap *map = __map;
 428
 429	hwspin_unlock_irq(map->hwlock);
 430}
 431
 432static void regmap_unlock_hwlock_irqrestore(void *__map)
 433{
 434	struct regmap *map = __map;
 435
 436	hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
 437}
 438
 439static void regmap_lock_unlock_none(void *__map)
 440{
 441
 442}
 443
 444static void regmap_lock_mutex(void *__map)
 445{
 446	struct regmap *map = __map;
 447	mutex_lock(&map->mutex);
 448}
 449
 450static void regmap_unlock_mutex(void *__map)
 451{
 452	struct regmap *map = __map;
 453	mutex_unlock(&map->mutex);
 454}
 455
 456static void regmap_lock_spinlock(void *__map)
 457__acquires(&map->spinlock)
 458{
 459	struct regmap *map = __map;
 460	unsigned long flags;
 461
 462	spin_lock_irqsave(&map->spinlock, flags);
 463	map->spinlock_flags = flags;
 464}
 465
 466static void regmap_unlock_spinlock(void *__map)
 467__releases(&map->spinlock)
 468{
 469	struct regmap *map = __map;
 470	spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
 471}
 472
 473static void regmap_lock_raw_spinlock(void *__map)
 474__acquires(&map->raw_spinlock)
 475{
 476	struct regmap *map = __map;
 477	unsigned long flags;
 478
 479	raw_spin_lock_irqsave(&map->raw_spinlock, flags);
 480	map->raw_spinlock_flags = flags;
 481}
 482
 483static void regmap_unlock_raw_spinlock(void *__map)
 484__releases(&map->raw_spinlock)
 485{
 486	struct regmap *map = __map;
 487	raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
 488}
 489
 490static void dev_get_regmap_release(struct device *dev, void *res)
 491{
 492	/*
 493	 * We don't actually have anything to do here; the goal here
 494	 * is not to manage the regmap but to provide a simple way to
 495	 * get the regmap back given a struct device.
 496	 */
 497}
 498
 499static bool _regmap_range_add(struct regmap *map,
 500			      struct regmap_range_node *data)
 501{
 502	struct rb_root *root = &map->range_tree;
 503	struct rb_node **new = &(root->rb_node), *parent = NULL;
 504
 505	while (*new) {
 506		struct regmap_range_node *this =
 507			rb_entry(*new, struct regmap_range_node, node);
 508
 509		parent = *new;
 510		if (data->range_max < this->range_min)
 511			new = &((*new)->rb_left);
 512		else if (data->range_min > this->range_max)
 513			new = &((*new)->rb_right);
 514		else
 515			return false;
 516	}
 517
 518	rb_link_node(&data->node, parent, new);
 519	rb_insert_color(&data->node, root);
 520
 521	return true;
 522}
 523
 524static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
 525						      unsigned int reg)
 526{
 527	struct rb_node *node = map->range_tree.rb_node;
 528
 529	while (node) {
 530		struct regmap_range_node *this =
 531			rb_entry(node, struct regmap_range_node, node);
 532
 533		if (reg < this->range_min)
 534			node = node->rb_left;
 535		else if (reg > this->range_max)
 536			node = node->rb_right;
 537		else
 538			return this;
 539	}
 540
 541	return NULL;
 542}
 543
 544static void regmap_range_exit(struct regmap *map)
 545{
 546	struct rb_node *next;
 547	struct regmap_range_node *range_node;
 548
 549	next = rb_first(&map->range_tree);
 550	while (next) {
 551		range_node = rb_entry(next, struct regmap_range_node, node);
 552		next = rb_next(&range_node->node);
 553		rb_erase(&range_node->node, &map->range_tree);
 554		kfree(range_node);
 555	}
 556
 557	kfree(map->selector_work_buf);
 558}
 559
 560static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
 561{
 562	if (config->name) {
 563		const char *name = kstrdup_const(config->name, GFP_KERNEL);
 564
 565		if (!name)
 566			return -ENOMEM;
 567
 568		kfree_const(map->name);
 569		map->name = name;
 570	}
 571
 572	return 0;
 573}
 574
 575int regmap_attach_dev(struct device *dev, struct regmap *map,
 576		      const struct regmap_config *config)
 577{
 578	struct regmap **m;
 579	int ret;
 580
 581	map->dev = dev;
 582
 583	ret = regmap_set_name(map, config);
 584	if (ret)
 585		return ret;
 586
 587	regmap_debugfs_exit(map);
 588	regmap_debugfs_init(map);
 589
 590	/* Add a devres resource for dev_get_regmap() */
 591	m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
 592	if (!m) {
 593		regmap_debugfs_exit(map);
 594		return -ENOMEM;
 595	}
 596	*m = map;
 597	devres_add(dev, m);
 598
 599	return 0;
 600}
 601EXPORT_SYMBOL_GPL(regmap_attach_dev);
 602
 603static int dev_get_regmap_match(struct device *dev, void *res, void *data);
 604
 605static int regmap_detach_dev(struct device *dev, struct regmap *map)
 606{
 607	if (!dev)
 608		return 0;
 609
 610	return devres_release(dev, dev_get_regmap_release,
 611			      dev_get_regmap_match, (void *)map->name);
 612}
 613
 614static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
 615					const struct regmap_config *config)
 616{
 617	enum regmap_endian endian;
 618
 619	/* Retrieve the endianness specification from the regmap config */
 620	endian = config->reg_format_endian;
 621
 622	/* If the regmap config specified a non-default value, use that */
 623	if (endian != REGMAP_ENDIAN_DEFAULT)
 624		return endian;
 625
 626	/* Retrieve the endianness specification from the bus config */
 627	if (bus && bus->reg_format_endian_default)
 628		endian = bus->reg_format_endian_default;
 629
 630	/* If the bus specified a non-default value, use that */
 631	if (endian != REGMAP_ENDIAN_DEFAULT)
 632		return endian;
 633
 634	/* Use this if no other value was found */
 635	return REGMAP_ENDIAN_BIG;
 636}
 637
 638enum regmap_endian regmap_get_val_endian(struct device *dev,
 639					 const struct regmap_bus *bus,
 640					 const struct regmap_config *config)
 641{
 642	struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
 643	enum regmap_endian endian;
 644
 645	/* Retrieve the endianness specification from the regmap config */
 646	endian = config->val_format_endian;
 647
 648	/* If the regmap config specified a non-default value, use that */
 649	if (endian != REGMAP_ENDIAN_DEFAULT)
 650		return endian;
 651
 652	/* If the firmware node exist try to get endianness from it */
 653	if (fwnode_property_read_bool(fwnode, "big-endian"))
 654		endian = REGMAP_ENDIAN_BIG;
 655	else if (fwnode_property_read_bool(fwnode, "little-endian"))
 656		endian = REGMAP_ENDIAN_LITTLE;
 657	else if (fwnode_property_read_bool(fwnode, "native-endian"))
 658		endian = REGMAP_ENDIAN_NATIVE;
 659
 660	/* If the endianness was specified in fwnode, use that */
 661	if (endian != REGMAP_ENDIAN_DEFAULT)
 662		return endian;
 663
 664	/* Retrieve the endianness specification from the bus config */
 665	if (bus && bus->val_format_endian_default)
 666		endian = bus->val_format_endian_default;
 667
 668	/* If the bus specified a non-default value, use that */
 669	if (endian != REGMAP_ENDIAN_DEFAULT)
 670		return endian;
 671
 672	/* Use this if no other value was found */
 673	return REGMAP_ENDIAN_BIG;
 674}
 675EXPORT_SYMBOL_GPL(regmap_get_val_endian);
 676
 677struct regmap *__regmap_init(struct device *dev,
 678			     const struct regmap_bus *bus,
 679			     void *bus_context,
 680			     const struct regmap_config *config,
 681			     struct lock_class_key *lock_key,
 682			     const char *lock_name)
 683{
 684	struct regmap *map;
 685	int ret = -EINVAL;
 686	enum regmap_endian reg_endian, val_endian;
 687	int i, j;
 688
 689	if (!config)
 690		goto err;
 691
 692	map = kzalloc(sizeof(*map), GFP_KERNEL);
 693	if (map == NULL) {
 694		ret = -ENOMEM;
 695		goto err;
 696	}
 697
 698	ret = regmap_set_name(map, config);
 699	if (ret)
 700		goto err_map;
 701
 702	ret = -EINVAL; /* Later error paths rely on this */
 703
 704	if (config->disable_locking) {
 705		map->lock = map->unlock = regmap_lock_unlock_none;
 706		map->can_sleep = config->can_sleep;
 707		regmap_debugfs_disable(map);
 708	} else if (config->lock && config->unlock) {
 709		map->lock = config->lock;
 710		map->unlock = config->unlock;
 711		map->lock_arg = config->lock_arg;
 712		map->can_sleep = config->can_sleep;
 713	} else if (config->use_hwlock) {
 714		map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
 715		if (!map->hwlock) {
 716			ret = -ENXIO;
 717			goto err_name;
 718		}
 719
 720		switch (config->hwlock_mode) {
 721		case HWLOCK_IRQSTATE:
 722			map->lock = regmap_lock_hwlock_irqsave;
 723			map->unlock = regmap_unlock_hwlock_irqrestore;
 724			break;
 725		case HWLOCK_IRQ:
 726			map->lock = regmap_lock_hwlock_irq;
 727			map->unlock = regmap_unlock_hwlock_irq;
 728			break;
 729		default:
 730			map->lock = regmap_lock_hwlock;
 731			map->unlock = regmap_unlock_hwlock;
 732			break;
 733		}
 734
 735		map->lock_arg = map;
 736	} else {
 737		if ((bus && bus->fast_io) ||
 738		    config->fast_io) {
 739			if (config->use_raw_spinlock) {
 740				raw_spin_lock_init(&map->raw_spinlock);
 741				map->lock = regmap_lock_raw_spinlock;
 742				map->unlock = regmap_unlock_raw_spinlock;
 743				lockdep_set_class_and_name(&map->raw_spinlock,
 744							   lock_key, lock_name);
 745			} else {
 746				spin_lock_init(&map->spinlock);
 747				map->lock = regmap_lock_spinlock;
 748				map->unlock = regmap_unlock_spinlock;
 749				lockdep_set_class_and_name(&map->spinlock,
 750							   lock_key, lock_name);
 751			}
 752		} else {
 753			mutex_init(&map->mutex);
 754			map->lock = regmap_lock_mutex;
 755			map->unlock = regmap_unlock_mutex;
 756			map->can_sleep = true;
 757			lockdep_set_class_and_name(&map->mutex,
 758						   lock_key, lock_name);
 759		}
 760		map->lock_arg = map;
 761		map->lock_key = lock_key;
 762	}
 763
 764	/*
 765	 * When we write in fast-paths with regmap_bulk_write() don't allocate
 766	 * scratch buffers with sleeping allocations.
 767	 */
 768	if ((bus && bus->fast_io) || config->fast_io)
 769		map->alloc_flags = GFP_ATOMIC;
 770	else
 771		map->alloc_flags = GFP_KERNEL;
 772
 773	map->reg_base = config->reg_base;
 774	map->reg_shift = config->pad_bits % 8;
 775
 776	map->format.pad_bytes = config->pad_bits / 8;
 777	map->format.reg_shift = config->reg_shift;
 778	map->format.reg_bytes = BITS_TO_BYTES(config->reg_bits);
 779	map->format.val_bytes = BITS_TO_BYTES(config->val_bits);
 780	map->format.buf_size = BITS_TO_BYTES(config->reg_bits + config->val_bits + config->pad_bits);
 781	if (config->reg_stride)
 782		map->reg_stride = config->reg_stride;
 783	else
 784		map->reg_stride = 1;
 785	if (is_power_of_2(map->reg_stride))
 786		map->reg_stride_order = ilog2(map->reg_stride);
 787	else
 788		map->reg_stride_order = -1;
 789	map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
 790	map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
 791	map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
 792	if (bus) {
 793		map->max_raw_read = bus->max_raw_read;
 794		map->max_raw_write = bus->max_raw_write;
 795	} else if (config->max_raw_read && config->max_raw_write) {
 796		map->max_raw_read = config->max_raw_read;
 797		map->max_raw_write = config->max_raw_write;
 798	}
 799	map->dev = dev;
 800	map->bus = bus;
 801	map->bus_context = bus_context;
 802	map->max_register = config->max_register;
 803	map->max_register_is_set = map->max_register ?: config->max_register_is_0;
 804	map->wr_table = config->wr_table;
 805	map->rd_table = config->rd_table;
 806	map->volatile_table = config->volatile_table;
 807	map->precious_table = config->precious_table;
 808	map->wr_noinc_table = config->wr_noinc_table;
 809	map->rd_noinc_table = config->rd_noinc_table;
 810	map->writeable_reg = config->writeable_reg;
 811	map->readable_reg = config->readable_reg;
 812	map->volatile_reg = config->volatile_reg;
 813	map->precious_reg = config->precious_reg;
 814	map->writeable_noinc_reg = config->writeable_noinc_reg;
 815	map->readable_noinc_reg = config->readable_noinc_reg;
 816	map->cache_type = config->cache_type;
 817
 818	spin_lock_init(&map->async_lock);
 819	INIT_LIST_HEAD(&map->async_list);
 820	INIT_LIST_HEAD(&map->async_free);
 821	init_waitqueue_head(&map->async_waitq);
 822
 823	if (config->read_flag_mask ||
 824	    config->write_flag_mask ||
 825	    config->zero_flag_mask) {
 826		map->read_flag_mask = config->read_flag_mask;
 827		map->write_flag_mask = config->write_flag_mask;
 828	} else if (bus) {
 829		map->read_flag_mask = bus->read_flag_mask;
 830	}
 831
 832	if (config->read && config->write) {
 833		map->reg_read  = _regmap_bus_read;
 834		if (config->reg_update_bits)
 835			map->reg_update_bits = config->reg_update_bits;
 836
 837		/* Bulk read/write */
 838		map->read = config->read;
 839		map->write = config->write;
 840
 841		reg_endian = REGMAP_ENDIAN_NATIVE;
 842		val_endian = REGMAP_ENDIAN_NATIVE;
 843	} else if (!bus) {
 844		map->reg_read  = config->reg_read;
 845		map->reg_write = config->reg_write;
 846		map->reg_update_bits = config->reg_update_bits;
 847
 848		map->defer_caching = false;
 849		goto skip_format_initialization;
 850	} else if (!bus->read || !bus->write) {
 851		map->reg_read = _regmap_bus_reg_read;
 852		map->reg_write = _regmap_bus_reg_write;
 853		map->reg_update_bits = bus->reg_update_bits;
 854
 855		map->defer_caching = false;
 856		goto skip_format_initialization;
 857	} else {
 858		map->reg_read  = _regmap_bus_read;
 859		map->reg_update_bits = bus->reg_update_bits;
 860		/* Bulk read/write */
 861		map->read = bus->read;
 862		map->write = bus->write;
 863
 864		reg_endian = regmap_get_reg_endian(bus, config);
 865		val_endian = regmap_get_val_endian(dev, bus, config);
 866	}
 867
 868	switch (config->reg_bits + map->reg_shift) {
 869	case 2:
 870		switch (config->val_bits) {
 871		case 6:
 872			map->format.format_write = regmap_format_2_6_write;
 873			break;
 874		default:
 875			goto err_hwlock;
 876		}
 877		break;
 878
 879	case 4:
 880		switch (config->val_bits) {
 881		case 12:
 882			map->format.format_write = regmap_format_4_12_write;
 883			break;
 884		default:
 885			goto err_hwlock;
 886		}
 887		break;
 888
 889	case 7:
 890		switch (config->val_bits) {
 891		case 9:
 892			map->format.format_write = regmap_format_7_9_write;
 893			break;
 894		case 17:
 895			map->format.format_write = regmap_format_7_17_write;
 896			break;
 897		default:
 898			goto err_hwlock;
 899		}
 900		break;
 901
 902	case 10:
 903		switch (config->val_bits) {
 904		case 14:
 905			map->format.format_write = regmap_format_10_14_write;
 906			break;
 907		default:
 908			goto err_hwlock;
 909		}
 910		break;
 911
 912	case 12:
 913		switch (config->val_bits) {
 914		case 20:
 915			map->format.format_write = regmap_format_12_20_write;
 916			break;
 917		default:
 918			goto err_hwlock;
 919		}
 920		break;
 921
 922	case 8:
 923		map->format.format_reg = regmap_format_8;
 924		break;
 925
 926	case 16:
 927		switch (reg_endian) {
 928		case REGMAP_ENDIAN_BIG:
 929			map->format.format_reg = regmap_format_16_be;
 930			break;
 931		case REGMAP_ENDIAN_LITTLE:
 932			map->format.format_reg = regmap_format_16_le;
 933			break;
 934		case REGMAP_ENDIAN_NATIVE:
 935			map->format.format_reg = regmap_format_16_native;
 936			break;
 937		default:
 938			goto err_hwlock;
 939		}
 940		break;
 941
 942	case 24:
 943		switch (reg_endian) {
 944		case REGMAP_ENDIAN_BIG:
 945			map->format.format_reg = regmap_format_24_be;
 946			break;
 947		default:
 948			goto err_hwlock;
 949		}
 950		break;
 951
 952	case 32:
 953		switch (reg_endian) {
 954		case REGMAP_ENDIAN_BIG:
 955			map->format.format_reg = regmap_format_32_be;
 956			break;
 957		case REGMAP_ENDIAN_LITTLE:
 958			map->format.format_reg = regmap_format_32_le;
 959			break;
 960		case REGMAP_ENDIAN_NATIVE:
 961			map->format.format_reg = regmap_format_32_native;
 962			break;
 963		default:
 964			goto err_hwlock;
 965		}
 966		break;
 967
 968	default:
 969		goto err_hwlock;
 970	}
 971
 972	if (val_endian == REGMAP_ENDIAN_NATIVE)
 973		map->format.parse_inplace = regmap_parse_inplace_noop;
 974
 975	switch (config->val_bits) {
 976	case 8:
 977		map->format.format_val = regmap_format_8;
 978		map->format.parse_val = regmap_parse_8;
 979		map->format.parse_inplace = regmap_parse_inplace_noop;
 980		break;
 981	case 16:
 982		switch (val_endian) {
 983		case REGMAP_ENDIAN_BIG:
 984			map->format.format_val = regmap_format_16_be;
 985			map->format.parse_val = regmap_parse_16_be;
 986			map->format.parse_inplace = regmap_parse_16_be_inplace;
 987			break;
 988		case REGMAP_ENDIAN_LITTLE:
 989			map->format.format_val = regmap_format_16_le;
 990			map->format.parse_val = regmap_parse_16_le;
 991			map->format.parse_inplace = regmap_parse_16_le_inplace;
 992			break;
 993		case REGMAP_ENDIAN_NATIVE:
 994			map->format.format_val = regmap_format_16_native;
 995			map->format.parse_val = regmap_parse_16_native;
 996			break;
 997		default:
 998			goto err_hwlock;
 999		}
1000		break;
1001	case 24:
1002		switch (val_endian) {
1003		case REGMAP_ENDIAN_BIG:
1004			map->format.format_val = regmap_format_24_be;
1005			map->format.parse_val = regmap_parse_24_be;
1006			break;
1007		default:
1008			goto err_hwlock;
1009		}
1010		break;
1011	case 32:
1012		switch (val_endian) {
1013		case REGMAP_ENDIAN_BIG:
1014			map->format.format_val = regmap_format_32_be;
1015			map->format.parse_val = regmap_parse_32_be;
1016			map->format.parse_inplace = regmap_parse_32_be_inplace;
1017			break;
1018		case REGMAP_ENDIAN_LITTLE:
1019			map->format.format_val = regmap_format_32_le;
1020			map->format.parse_val = regmap_parse_32_le;
1021			map->format.parse_inplace = regmap_parse_32_le_inplace;
1022			break;
1023		case REGMAP_ENDIAN_NATIVE:
1024			map->format.format_val = regmap_format_32_native;
1025			map->format.parse_val = regmap_parse_32_native;
1026			break;
1027		default:
1028			goto err_hwlock;
1029		}
1030		break;
1031	}
1032
1033	if (map->format.format_write) {
1034		if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1035		    (val_endian != REGMAP_ENDIAN_BIG))
1036			goto err_hwlock;
1037		map->use_single_write = true;
1038	}
1039
1040	if (!map->format.format_write &&
1041	    !(map->format.format_reg && map->format.format_val))
1042		goto err_hwlock;
1043
1044	map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1045	if (map->work_buf == NULL) {
1046		ret = -ENOMEM;
1047		goto err_hwlock;
1048	}
1049
1050	if (map->format.format_write) {
1051		map->defer_caching = false;
1052		map->reg_write = _regmap_bus_formatted_write;
1053	} else if (map->format.format_val) {
1054		map->defer_caching = true;
1055		map->reg_write = _regmap_bus_raw_write;
1056	}
1057
1058skip_format_initialization:
1059
1060	map->range_tree = RB_ROOT;
1061	for (i = 0; i < config->num_ranges; i++) {
1062		const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1063		struct regmap_range_node *new;
1064
1065		/* Sanity check */
1066		if (range_cfg->range_max < range_cfg->range_min) {
1067			dev_err(map->dev, "Invalid range %d: %u < %u\n", i,
1068				range_cfg->range_max, range_cfg->range_min);
1069			goto err_range;
1070		}
1071
1072		if (range_cfg->range_max > map->max_register) {
1073			dev_err(map->dev, "Invalid range %d: %u > %u\n", i,
1074				range_cfg->range_max, map->max_register);
1075			goto err_range;
1076		}
1077
1078		if (range_cfg->selector_reg > map->max_register) {
1079			dev_err(map->dev,
1080				"Invalid range %d: selector out of map\n", i);
1081			goto err_range;
1082		}
1083
1084		if (range_cfg->window_len == 0) {
1085			dev_err(map->dev, "Invalid range %d: window_len 0\n",
1086				i);
1087			goto err_range;
1088		}
1089
1090		/* Make sure, that this register range has no selector
1091		   or data window within its boundary */
1092		for (j = 0; j < config->num_ranges; j++) {
1093			unsigned int sel_reg = config->ranges[j].selector_reg;
1094			unsigned int win_min = config->ranges[j].window_start;
1095			unsigned int win_max = win_min +
1096					       config->ranges[j].window_len - 1;
1097
1098			/* Allow data window inside its own virtual range */
1099			if (j == i)
1100				continue;
1101
1102			if (range_cfg->range_min <= sel_reg &&
1103			    sel_reg <= range_cfg->range_max) {
1104				dev_err(map->dev,
1105					"Range %d: selector for %d in window\n",
1106					i, j);
1107				goto err_range;
1108			}
1109
1110			if (!(win_max < range_cfg->range_min ||
1111			      win_min > range_cfg->range_max)) {
1112				dev_err(map->dev,
1113					"Range %d: window for %d in window\n",
1114					i, j);
1115				goto err_range;
1116			}
1117		}
1118
1119		new = kzalloc(sizeof(*new), GFP_KERNEL);
1120		if (new == NULL) {
1121			ret = -ENOMEM;
1122			goto err_range;
1123		}
1124
1125		new->map = map;
1126		new->name = range_cfg->name;
1127		new->range_min = range_cfg->range_min;
1128		new->range_max = range_cfg->range_max;
1129		new->selector_reg = range_cfg->selector_reg;
1130		new->selector_mask = range_cfg->selector_mask;
1131		new->selector_shift = range_cfg->selector_shift;
1132		new->window_start = range_cfg->window_start;
1133		new->window_len = range_cfg->window_len;
1134
1135		if (!_regmap_range_add(map, new)) {
1136			dev_err(map->dev, "Failed to add range %d\n", i);
1137			kfree(new);
1138			goto err_range;
1139		}
1140
1141		if (map->selector_work_buf == NULL) {
1142			map->selector_work_buf =
1143				kzalloc(map->format.buf_size, GFP_KERNEL);
1144			if (map->selector_work_buf == NULL) {
1145				ret = -ENOMEM;
1146				goto err_range;
1147			}
1148		}
1149	}
1150
1151	ret = regcache_init(map, config);
1152	if (ret != 0)
1153		goto err_range;
1154
1155	if (dev) {
1156		ret = regmap_attach_dev(dev, map, config);
1157		if (ret != 0)
1158			goto err_regcache;
1159	} else {
1160		regmap_debugfs_init(map);
1161	}
1162
1163	return map;
1164
1165err_regcache:
1166	regcache_exit(map);
1167err_range:
1168	regmap_range_exit(map);
1169	kfree(map->work_buf);
1170err_hwlock:
1171	if (map->hwlock)
1172		hwspin_lock_free(map->hwlock);
1173err_name:
1174	kfree_const(map->name);
1175err_map:
1176	kfree(map);
1177err:
1178	if (bus && bus->free_on_exit)
1179		kfree(bus);
1180	return ERR_PTR(ret);
1181}
1182EXPORT_SYMBOL_GPL(__regmap_init);
1183
1184static void devm_regmap_release(struct device *dev, void *res)
1185{
1186	regmap_exit(*(struct regmap **)res);
1187}
1188
1189struct regmap *__devm_regmap_init(struct device *dev,
1190				  const struct regmap_bus *bus,
1191				  void *bus_context,
1192				  const struct regmap_config *config,
1193				  struct lock_class_key *lock_key,
1194				  const char *lock_name)
1195{
1196	struct regmap **ptr, *regmap;
1197
1198	ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1199	if (!ptr)
1200		return ERR_PTR(-ENOMEM);
1201
1202	regmap = __regmap_init(dev, bus, bus_context, config,
1203			       lock_key, lock_name);
1204	if (!IS_ERR(regmap)) {
1205		*ptr = regmap;
1206		devres_add(dev, ptr);
1207	} else {
1208		devres_free(ptr);
1209	}
1210
1211	return regmap;
1212}
1213EXPORT_SYMBOL_GPL(__devm_regmap_init);
1214
1215static void regmap_field_init(struct regmap_field *rm_field,
1216	struct regmap *regmap, struct reg_field reg_field)
1217{
1218	rm_field->regmap = regmap;
1219	rm_field->reg = reg_field.reg;
1220	rm_field->shift = reg_field.lsb;
1221	rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1222
1223	WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1224
1225	rm_field->id_size = reg_field.id_size;
1226	rm_field->id_offset = reg_field.id_offset;
1227}
1228
1229/**
1230 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1231 *
1232 * @dev: Device that will be interacted with
1233 * @regmap: regmap bank in which this register field is located.
1234 * @reg_field: Register field with in the bank.
1235 *
1236 * The return value will be an ERR_PTR() on error or a valid pointer
1237 * to a struct regmap_field. The regmap_field will be automatically freed
1238 * by the device management code.
1239 */
1240struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1241		struct regmap *regmap, struct reg_field reg_field)
1242{
1243	struct regmap_field *rm_field = devm_kzalloc(dev,
1244					sizeof(*rm_field), GFP_KERNEL);
1245	if (!rm_field)
1246		return ERR_PTR(-ENOMEM);
1247
1248	regmap_field_init(rm_field, regmap, reg_field);
1249
1250	return rm_field;
1251
1252}
1253EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1254
1255
1256/**
1257 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1258 *
1259 * @regmap: regmap bank in which this register field is located.
1260 * @rm_field: regmap register fields within the bank.
1261 * @reg_field: Register fields within the bank.
1262 * @num_fields: Number of register fields.
1263 *
1264 * The return value will be an -ENOMEM on error or zero for success.
1265 * Newly allocated regmap_fields should be freed by calling
1266 * regmap_field_bulk_free()
1267 */
1268int regmap_field_bulk_alloc(struct regmap *regmap,
1269			    struct regmap_field **rm_field,
1270			    const struct reg_field *reg_field,
1271			    int num_fields)
1272{
1273	struct regmap_field *rf;
1274	int i;
1275
1276	rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1277	if (!rf)
1278		return -ENOMEM;
1279
1280	for (i = 0; i < num_fields; i++) {
1281		regmap_field_init(&rf[i], regmap, reg_field[i]);
1282		rm_field[i] = &rf[i];
1283	}
1284
1285	return 0;
1286}
1287EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1288
1289/**
1290 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1291 * fields.
1292 *
1293 * @dev: Device that will be interacted with
1294 * @regmap: regmap bank in which this register field is located.
1295 * @rm_field: regmap register fields within the bank.
1296 * @reg_field: Register fields within the bank.
1297 * @num_fields: Number of register fields.
1298 *
1299 * The return value will be an -ENOMEM on error or zero for success.
1300 * Newly allocated regmap_fields will be automatically freed by the
1301 * device management code.
1302 */
1303int devm_regmap_field_bulk_alloc(struct device *dev,
1304				 struct regmap *regmap,
1305				 struct regmap_field **rm_field,
1306				 const struct reg_field *reg_field,
1307				 int num_fields)
1308{
1309	struct regmap_field *rf;
1310	int i;
1311
1312	rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1313	if (!rf)
1314		return -ENOMEM;
1315
1316	for (i = 0; i < num_fields; i++) {
1317		regmap_field_init(&rf[i], regmap, reg_field[i]);
1318		rm_field[i] = &rf[i];
1319	}
1320
1321	return 0;
1322}
1323EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1324
1325/**
1326 * regmap_field_bulk_free() - Free register field allocated using
1327 *                       regmap_field_bulk_alloc.
1328 *
1329 * @field: regmap fields which should be freed.
1330 */
1331void regmap_field_bulk_free(struct regmap_field *field)
1332{
1333	kfree(field);
1334}
1335EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1336
1337/**
1338 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1339 *                            devm_regmap_field_bulk_alloc.
1340 *
1341 * @dev: Device that will be interacted with
1342 * @field: regmap field which should be freed.
1343 *
1344 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1345 * drivers need not call this function, as the memory allocated via devm
1346 * will be freed as per device-driver life-cycle.
1347 */
1348void devm_regmap_field_bulk_free(struct device *dev,
1349				 struct regmap_field *field)
1350{
1351	devm_kfree(dev, field);
1352}
1353EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1354
1355/**
1356 * devm_regmap_field_free() - Free a register field allocated using
1357 *                            devm_regmap_field_alloc.
1358 *
1359 * @dev: Device that will be interacted with
1360 * @field: regmap field which should be freed.
1361 *
1362 * Free register field allocated using devm_regmap_field_alloc(). Usually
1363 * drivers need not call this function, as the memory allocated via devm
1364 * will be freed as per device-driver life-cyle.
1365 */
1366void devm_regmap_field_free(struct device *dev,
1367	struct regmap_field *field)
1368{
1369	devm_kfree(dev, field);
1370}
1371EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1372
1373/**
1374 * regmap_field_alloc() - Allocate and initialise a register field.
1375 *
1376 * @regmap: regmap bank in which this register field is located.
1377 * @reg_field: Register field with in the bank.
1378 *
1379 * The return value will be an ERR_PTR() on error or a valid pointer
1380 * to a struct regmap_field. The regmap_field should be freed by the
1381 * user once its finished working with it using regmap_field_free().
1382 */
1383struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1384		struct reg_field reg_field)
1385{
1386	struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1387
1388	if (!rm_field)
1389		return ERR_PTR(-ENOMEM);
1390
1391	regmap_field_init(rm_field, regmap, reg_field);
1392
1393	return rm_field;
1394}
1395EXPORT_SYMBOL_GPL(regmap_field_alloc);
1396
1397/**
1398 * regmap_field_free() - Free register field allocated using
1399 *                       regmap_field_alloc.
1400 *
1401 * @field: regmap field which should be freed.
1402 */
1403void regmap_field_free(struct regmap_field *field)
1404{
1405	kfree(field);
1406}
1407EXPORT_SYMBOL_GPL(regmap_field_free);
1408
1409/**
1410 * regmap_reinit_cache() - Reinitialise the current register cache
1411 *
1412 * @map: Register map to operate on.
1413 * @config: New configuration.  Only the cache data will be used.
1414 *
1415 * Discard any existing register cache for the map and initialize a
1416 * new cache.  This can be used to restore the cache to defaults or to
1417 * update the cache configuration to reflect runtime discovery of the
1418 * hardware.
1419 *
1420 * No explicit locking is done here, the user needs to ensure that
1421 * this function will not race with other calls to regmap.
1422 */
1423int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1424{
1425	int ret;
1426
1427	regcache_exit(map);
1428	regmap_debugfs_exit(map);
1429
1430	map->max_register = config->max_register;
1431	map->max_register_is_set = map->max_register ?: config->max_register_is_0;
1432	map->writeable_reg = config->writeable_reg;
1433	map->readable_reg = config->readable_reg;
1434	map->volatile_reg = config->volatile_reg;
1435	map->precious_reg = config->precious_reg;
1436	map->writeable_noinc_reg = config->writeable_noinc_reg;
1437	map->readable_noinc_reg = config->readable_noinc_reg;
1438	map->cache_type = config->cache_type;
1439
1440	ret = regmap_set_name(map, config);
1441	if (ret)
1442		return ret;
1443
1444	regmap_debugfs_init(map);
1445
1446	map->cache_bypass = false;
1447	map->cache_only = false;
1448
1449	return regcache_init(map, config);
1450}
1451EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1452
1453/**
1454 * regmap_exit() - Free a previously allocated register map
1455 *
1456 * @map: Register map to operate on.
1457 */
1458void regmap_exit(struct regmap *map)
1459{
1460	struct regmap_async *async;
1461
1462	regmap_detach_dev(map->dev, map);
1463	regcache_exit(map);
1464
1465	regmap_debugfs_exit(map);
1466	regmap_range_exit(map);
1467	if (map->bus && map->bus->free_context)
1468		map->bus->free_context(map->bus_context);
1469	kfree(map->work_buf);
1470	while (!list_empty(&map->async_free)) {
1471		async = list_first_entry_or_null(&map->async_free,
1472						 struct regmap_async,
1473						 list);
1474		list_del(&async->list);
1475		kfree(async->work_buf);
1476		kfree(async);
1477	}
1478	if (map->hwlock)
1479		hwspin_lock_free(map->hwlock);
1480	if (map->lock == regmap_lock_mutex)
1481		mutex_destroy(&map->mutex);
1482	kfree_const(map->name);
1483	kfree(map->patch);
1484	if (map->bus && map->bus->free_on_exit)
1485		kfree(map->bus);
1486	kfree(map);
1487}
1488EXPORT_SYMBOL_GPL(regmap_exit);
1489
1490static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1491{
1492	struct regmap **r = res;
1493	if (!r || !*r) {
1494		WARN_ON(!r || !*r);
1495		return 0;
1496	}
1497
1498	/* If the user didn't specify a name match any */
1499	if (data)
1500		return (*r)->name && !strcmp((*r)->name, data);
1501	else
1502		return 1;
1503}
1504
1505/**
1506 * dev_get_regmap() - Obtain the regmap (if any) for a device
1507 *
1508 * @dev: Device to retrieve the map for
1509 * @name: Optional name for the register map, usually NULL.
1510 *
1511 * Returns the regmap for the device if one is present, or NULL.  If
1512 * name is specified then it must match the name specified when
1513 * registering the device, if it is NULL then the first regmap found
1514 * will be used.  Devices with multiple register maps are very rare,
1515 * generic code should normally not need to specify a name.
1516 */
1517struct regmap *dev_get_regmap(struct device *dev, const char *name)
1518{
1519	struct regmap **r = devres_find(dev, dev_get_regmap_release,
1520					dev_get_regmap_match, (void *)name);
1521
1522	if (!r)
1523		return NULL;
1524	return *r;
1525}
1526EXPORT_SYMBOL_GPL(dev_get_regmap);
1527
1528/**
1529 * regmap_get_device() - Obtain the device from a regmap
1530 *
1531 * @map: Register map to operate on.
1532 *
1533 * Returns the underlying device that the regmap has been created for.
1534 */
1535struct device *regmap_get_device(struct regmap *map)
1536{
1537	return map->dev;
1538}
1539EXPORT_SYMBOL_GPL(regmap_get_device);
1540
1541static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1542			       struct regmap_range_node *range,
1543			       unsigned int val_num)
1544{
1545	void *orig_work_buf;
1546	unsigned int selector_reg;
1547	unsigned int win_offset;
1548	unsigned int win_page;
1549	bool page_chg;
1550	int ret;
1551
1552	win_offset = (*reg - range->range_min) % range->window_len;
1553	win_page = (*reg - range->range_min) / range->window_len;
1554
1555	if (val_num > 1) {
1556		/* Bulk write shouldn't cross range boundary */
1557		if (*reg + val_num - 1 > range->range_max)
1558			return -EINVAL;
1559
1560		/* ... or single page boundary */
1561		if (val_num > range->window_len - win_offset)
1562			return -EINVAL;
1563	}
1564
1565	/*
1566	 * Calculate the address of the selector register in the corresponding
1567	 * data window if it is located on every page.
1568	 */
1569	page_chg = in_range(range->selector_reg, range->window_start, range->window_len);
1570	if (page_chg)
1571		selector_reg = range->range_min + win_page * range->window_len +
1572			       range->selector_reg - range->window_start;
1573
1574	/*
1575	 * It is possible to have selector register inside data window.
1576	 * In that case, selector register is located on every page and it
1577	 * needs no page switching, when accessed alone.
1578	 *
1579	 * Nevertheless we should synchronize the cache values for it.
1580	 * This can't be properly achieved if the selector register is
1581	 * the first and the only one to be read inside the data window.
1582	 * That's why we update it in that case as well.
1583	 *
1584	 * However, we specifically avoid updating it for the default page,
1585	 * when it's overlapped with the real data window, to prevent from
1586	 * infinite looping.
1587	 */
1588	if (val_num > 1 ||
1589	    (page_chg && selector_reg != range->selector_reg) ||
1590	    range->window_start + win_offset != range->selector_reg) {
1591		/* Use separate work_buf during page switching */
1592		orig_work_buf = map->work_buf;
1593		map->work_buf = map->selector_work_buf;
1594
1595		ret = _regmap_update_bits(map, range->selector_reg,
1596					  range->selector_mask,
1597					  win_page << range->selector_shift,
1598					  NULL, false);
1599
1600		map->work_buf = orig_work_buf;
1601
1602		if (ret != 0)
1603			return ret;
1604	}
1605
1606	*reg = range->window_start + win_offset;
1607
1608	return 0;
1609}
1610
1611static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1612					  unsigned long mask)
1613{
1614	u8 *buf;
1615	int i;
1616
1617	if (!mask || !map->work_buf)
1618		return;
1619
1620	buf = map->work_buf;
1621
1622	for (i = 0; i < max_bytes; i++)
1623		buf[i] |= (mask >> (8 * i)) & 0xff;
1624}
1625
1626static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg)
1627{
1628	reg += map->reg_base;
1629
1630	if (map->format.reg_shift > 0)
1631		reg >>= map->format.reg_shift;
1632	else if (map->format.reg_shift < 0)
1633		reg <<= -(map->format.reg_shift);
1634
1635	return reg;
1636}
1637
1638static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1639				  const void *val, size_t val_len, bool noinc)
1640{
1641	struct regmap_range_node *range;
1642	unsigned long flags;
1643	void *work_val = map->work_buf + map->format.reg_bytes +
1644		map->format.pad_bytes;
1645	void *buf;
1646	int ret = -ENOTSUPP;
1647	size_t len;
1648	int i;
1649
1650	/* Check for unwritable or noinc registers in range
1651	 * before we start
1652	 */
1653	if (!regmap_writeable_noinc(map, reg)) {
1654		for (i = 0; i < val_len / map->format.val_bytes; i++) {
1655			unsigned int element =
1656				reg + regmap_get_offset(map, i);
1657			if (!regmap_writeable(map, element) ||
1658				regmap_writeable_noinc(map, element))
1659				return -EINVAL;
1660		}
1661	}
1662
1663	if (!map->cache_bypass && map->format.parse_val) {
1664		unsigned int ival, offset;
1665		int val_bytes = map->format.val_bytes;
1666
1667		/* Cache the last written value for noinc writes */
1668		i = noinc ? val_len - val_bytes : 0;
1669		for (; i < val_len; i += val_bytes) {
1670			ival = map->format.parse_val(val + i);
1671			offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes);
1672			ret = regcache_write(map, reg + offset, ival);
1673			if (ret) {
1674				dev_err(map->dev,
1675					"Error in caching of register: %x ret: %d\n",
1676					reg + offset, ret);
1677				return ret;
1678			}
1679		}
1680		if (map->cache_only) {
1681			map->cache_dirty = true;
1682			return 0;
1683		}
1684	}
1685
1686	range = _regmap_range_lookup(map, reg);
1687	if (range) {
1688		int val_num = val_len / map->format.val_bytes;
1689		int win_offset = (reg - range->range_min) % range->window_len;
1690		int win_residue = range->window_len - win_offset;
1691
1692		/* If the write goes beyond the end of the window split it */
1693		while (val_num > win_residue) {
1694			dev_dbg(map->dev, "Writing window %d/%zu\n",
1695				win_residue, val_len / map->format.val_bytes);
1696			ret = _regmap_raw_write_impl(map, reg, val,
1697						     win_residue *
1698						     map->format.val_bytes, noinc);
1699			if (ret != 0)
1700				return ret;
1701
1702			reg += win_residue;
1703			val_num -= win_residue;
1704			val += win_residue * map->format.val_bytes;
1705			val_len -= win_residue * map->format.val_bytes;
1706
1707			win_offset = (reg - range->range_min) %
1708				range->window_len;
1709			win_residue = range->window_len - win_offset;
1710		}
1711
1712		ret = _regmap_select_page(map, &reg, range, noinc ? 1 : val_num);
1713		if (ret != 0)
1714			return ret;
1715	}
1716
1717	reg = regmap_reg_addr(map, reg);
1718	map->format.format_reg(map->work_buf, reg, map->reg_shift);
1719	regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1720				      map->write_flag_mask);
1721
1722	/*
1723	 * Essentially all I/O mechanisms will be faster with a single
1724	 * buffer to write.  Since register syncs often generate raw
1725	 * writes of single registers optimise that case.
1726	 */
1727	if (val != work_val && val_len == map->format.val_bytes) {
1728		memcpy(work_val, val, map->format.val_bytes);
1729		val = work_val;
1730	}
1731
1732	if (map->async && map->bus && map->bus->async_write) {
1733		struct regmap_async *async;
1734
1735		trace_regmap_async_write_start(map, reg, val_len);
1736
1737		spin_lock_irqsave(&map->async_lock, flags);
1738		async = list_first_entry_or_null(&map->async_free,
1739						 struct regmap_async,
1740						 list);
1741		if (async)
1742			list_del(&async->list);
1743		spin_unlock_irqrestore(&map->async_lock, flags);
1744
1745		if (!async) {
1746			async = map->bus->async_alloc();
1747			if (!async)
1748				return -ENOMEM;
1749
1750			async->work_buf = kzalloc(map->format.buf_size,
1751						  GFP_KERNEL | GFP_DMA);
1752			if (!async->work_buf) {
1753				kfree(async);
1754				return -ENOMEM;
1755			}
1756		}
1757
1758		async->map = map;
1759
1760		/* If the caller supplied the value we can use it safely. */
1761		memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1762		       map->format.reg_bytes + map->format.val_bytes);
1763
1764		spin_lock_irqsave(&map->async_lock, flags);
1765		list_add_tail(&async->list, &map->async_list);
1766		spin_unlock_irqrestore(&map->async_lock, flags);
1767
1768		if (val != work_val)
1769			ret = map->bus->async_write(map->bus_context,
1770						    async->work_buf,
1771						    map->format.reg_bytes +
1772						    map->format.pad_bytes,
1773						    val, val_len, async);
1774		else
1775			ret = map->bus->async_write(map->bus_context,
1776						    async->work_buf,
1777						    map->format.reg_bytes +
1778						    map->format.pad_bytes +
1779						    val_len, NULL, 0, async);
1780
1781		if (ret != 0) {
1782			dev_err(map->dev, "Failed to schedule write: %d\n",
1783				ret);
1784
1785			spin_lock_irqsave(&map->async_lock, flags);
1786			list_move(&async->list, &map->async_free);
1787			spin_unlock_irqrestore(&map->async_lock, flags);
1788		}
1789
1790		return ret;
1791	}
1792
1793	trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1794
1795	/* If we're doing a single register write we can probably just
1796	 * send the work_buf directly, otherwise try to do a gather
1797	 * write.
1798	 */
1799	if (val == work_val)
1800		ret = map->write(map->bus_context, map->work_buf,
1801				 map->format.reg_bytes +
1802				 map->format.pad_bytes +
1803				 val_len);
1804	else if (map->bus && map->bus->gather_write)
1805		ret = map->bus->gather_write(map->bus_context, map->work_buf,
1806					     map->format.reg_bytes +
1807					     map->format.pad_bytes,
1808					     val, val_len);
1809	else
1810		ret = -ENOTSUPP;
1811
1812	/* If that didn't work fall back on linearising by hand. */
1813	if (ret == -ENOTSUPP) {
1814		len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1815		buf = kzalloc(len, GFP_KERNEL);
1816		if (!buf)
1817			return -ENOMEM;
1818
1819		memcpy(buf, map->work_buf, map->format.reg_bytes);
1820		memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1821		       val, val_len);
1822		ret = map->write(map->bus_context, buf, len);
1823
1824		kfree(buf);
1825	} else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1826		/* regcache_drop_region() takes lock that we already have,
1827		 * thus call map->cache_ops->drop() directly
1828		 */
1829		if (map->cache_ops && map->cache_ops->drop)
1830			map->cache_ops->drop(map, reg, reg + 1);
1831	}
1832
1833	trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1834
1835	return ret;
1836}
1837
1838/**
1839 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1840 *
1841 * @map: Map to check.
1842 */
1843bool regmap_can_raw_write(struct regmap *map)
1844{
1845	return map->write && map->format.format_val && map->format.format_reg;
1846}
1847EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1848
1849/**
1850 * regmap_get_raw_read_max - Get the maximum size we can read
1851 *
1852 * @map: Map to check.
1853 */
1854size_t regmap_get_raw_read_max(struct regmap *map)
1855{
1856	return map->max_raw_read;
1857}
1858EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1859
1860/**
1861 * regmap_get_raw_write_max - Get the maximum size we can read
1862 *
1863 * @map: Map to check.
1864 */
1865size_t regmap_get_raw_write_max(struct regmap *map)
1866{
1867	return map->max_raw_write;
1868}
1869EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1870
1871static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1872				       unsigned int val)
1873{
1874	int ret;
1875	struct regmap_range_node *range;
1876	struct regmap *map = context;
1877
1878	WARN_ON(!map->format.format_write);
1879
1880	range = _regmap_range_lookup(map, reg);
1881	if (range) {
1882		ret = _regmap_select_page(map, &reg, range, 1);
1883		if (ret != 0)
1884			return ret;
1885	}
1886
1887	reg = regmap_reg_addr(map, reg);
1888	map->format.format_write(map, reg, val);
1889
1890	trace_regmap_hw_write_start(map, reg, 1);
1891
1892	ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1893
1894	trace_regmap_hw_write_done(map, reg, 1);
1895
1896	return ret;
1897}
1898
1899static int _regmap_bus_reg_write(void *context, unsigned int reg,
1900				 unsigned int val)
1901{
1902	struct regmap *map = context;
1903	struct regmap_range_node *range;
1904	int ret;
1905
1906	range = _regmap_range_lookup(map, reg);
1907	if (range) {
1908		ret = _regmap_select_page(map, &reg, range, 1);
1909		if (ret != 0)
1910			return ret;
1911	}
1912
1913	reg = regmap_reg_addr(map, reg);
1914	return map->bus->reg_write(map->bus_context, reg, val);
1915}
1916
1917static int _regmap_bus_raw_write(void *context, unsigned int reg,
1918				 unsigned int val)
1919{
1920	struct regmap *map = context;
1921
1922	WARN_ON(!map->format.format_val);
1923
1924	map->format.format_val(map->work_buf + map->format.reg_bytes
1925			       + map->format.pad_bytes, val, 0);
1926	return _regmap_raw_write_impl(map, reg,
1927				      map->work_buf +
1928				      map->format.reg_bytes +
1929				      map->format.pad_bytes,
1930				      map->format.val_bytes,
1931				      false);
1932}
1933
1934static inline void *_regmap_map_get_context(struct regmap *map)
1935{
1936	return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1937}
1938
1939int _regmap_write(struct regmap *map, unsigned int reg,
1940		  unsigned int val)
1941{
1942	int ret;
1943	void *context = _regmap_map_get_context(map);
1944
1945	if (!regmap_writeable(map, reg))
1946		return -EIO;
1947
1948	if (!map->cache_bypass && !map->defer_caching) {
1949		ret = regcache_write(map, reg, val);
1950		if (ret != 0)
1951			return ret;
1952		if (map->cache_only) {
1953			map->cache_dirty = true;
1954			return 0;
1955		}
1956	}
1957
1958	ret = map->reg_write(context, reg, val);
1959	if (ret == 0) {
1960		if (regmap_should_log(map))
1961			dev_info(map->dev, "%x <= %x\n", reg, val);
1962
1963		trace_regmap_reg_write(map, reg, val);
1964	}
1965
1966	return ret;
1967}
1968
1969/**
1970 * regmap_write() - Write a value to a single register
1971 *
1972 * @map: Register map to write to
1973 * @reg: Register to write to
1974 * @val: Value to be written
1975 *
1976 * A value of zero will be returned on success, a negative errno will
1977 * be returned in error cases.
1978 */
1979int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1980{
1981	int ret;
1982
1983	if (!IS_ALIGNED(reg, map->reg_stride))
1984		return -EINVAL;
1985
1986	map->lock(map->lock_arg);
1987
1988	ret = _regmap_write(map, reg, val);
1989
1990	map->unlock(map->lock_arg);
1991
1992	return ret;
1993}
1994EXPORT_SYMBOL_GPL(regmap_write);
1995
1996/**
1997 * regmap_write_async() - Write a value to a single register asynchronously
1998 *
1999 * @map: Register map to write to
2000 * @reg: Register to write to
2001 * @val: Value to be written
2002 *
2003 * A value of zero will be returned on success, a negative errno will
2004 * be returned in error cases.
2005 */
2006int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
2007{
2008	int ret;
2009
2010	if (!IS_ALIGNED(reg, map->reg_stride))
2011		return -EINVAL;
2012
2013	map->lock(map->lock_arg);
2014
2015	map->async = true;
2016
2017	ret = _regmap_write(map, reg, val);
2018
2019	map->async = false;
2020
2021	map->unlock(map->lock_arg);
2022
2023	return ret;
2024}
2025EXPORT_SYMBOL_GPL(regmap_write_async);
2026
2027int _regmap_raw_write(struct regmap *map, unsigned int reg,
2028		      const void *val, size_t val_len, bool noinc)
2029{
2030	size_t val_bytes = map->format.val_bytes;
2031	size_t val_count = val_len / val_bytes;
2032	size_t chunk_count, chunk_bytes;
2033	size_t chunk_regs = val_count;
2034	int ret, i;
2035
2036	if (!val_count)
2037		return -EINVAL;
2038
2039	if (map->use_single_write)
2040		chunk_regs = 1;
2041	else if (map->max_raw_write && val_len > map->max_raw_write)
2042		chunk_regs = map->max_raw_write / val_bytes;
2043
2044	chunk_count = val_count / chunk_regs;
2045	chunk_bytes = chunk_regs * val_bytes;
2046
2047	/* Write as many bytes as possible with chunk_size */
2048	for (i = 0; i < chunk_count; i++) {
2049		ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2050		if (ret)
2051			return ret;
2052
2053		reg += regmap_get_offset(map, chunk_regs);
2054		val += chunk_bytes;
2055		val_len -= chunk_bytes;
2056	}
2057
2058	/* Write remaining bytes */
2059	if (val_len)
2060		ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2061
2062	return ret;
2063}
2064
2065/**
2066 * regmap_raw_write() - Write raw values to one or more registers
2067 *
2068 * @map: Register map to write to
2069 * @reg: Initial register to write to
2070 * @val: Block of data to be written, laid out for direct transmission to the
2071 *       device
2072 * @val_len: Length of data pointed to by val.
2073 *
2074 * This function is intended to be used for things like firmware
2075 * download where a large block of data needs to be transferred to the
2076 * device.  No formatting will be done on the data provided.
2077 *
2078 * A value of zero will be returned on success, a negative errno will
2079 * be returned in error cases.
2080 */
2081int regmap_raw_write(struct regmap *map, unsigned int reg,
2082		     const void *val, size_t val_len)
2083{
2084	int ret;
2085
2086	if (!regmap_can_raw_write(map))
2087		return -EINVAL;
2088	if (val_len % map->format.val_bytes)
2089		return -EINVAL;
2090
2091	map->lock(map->lock_arg);
2092
2093	ret = _regmap_raw_write(map, reg, val, val_len, false);
2094
2095	map->unlock(map->lock_arg);
2096
2097	return ret;
2098}
2099EXPORT_SYMBOL_GPL(regmap_raw_write);
2100
2101static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2102				  void *val, unsigned int val_len, bool write)
2103{
2104	size_t val_bytes = map->format.val_bytes;
2105	size_t val_count = val_len / val_bytes;
2106	unsigned int lastval;
2107	u8 *u8p;
2108	u16 *u16p;
2109	u32 *u32p;
2110	int ret;
2111	int i;
2112
2113	switch (val_bytes) {
2114	case 1:
2115		u8p = val;
2116		if (write)
2117			lastval = (unsigned int)u8p[val_count - 1];
2118		break;
2119	case 2:
2120		u16p = val;
2121		if (write)
2122			lastval = (unsigned int)u16p[val_count - 1];
2123		break;
2124	case 4:
2125		u32p = val;
2126		if (write)
2127			lastval = (unsigned int)u32p[val_count - 1];
2128		break;
2129	default:
2130		return -EINVAL;
2131	}
2132
2133	/*
2134	 * Update the cache with the last value we write, the rest is just
2135	 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
2136	 * sure a single read from the cache will work.
2137	 */
2138	if (write) {
2139		if (!map->cache_bypass && !map->defer_caching) {
2140			ret = regcache_write(map, reg, lastval);
2141			if (ret != 0)
2142				return ret;
2143			if (map->cache_only) {
2144				map->cache_dirty = true;
2145				return 0;
2146			}
2147		}
2148		ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2149	} else {
2150		ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2151	}
2152
2153	if (!ret && regmap_should_log(map)) {
2154		dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2155		for (i = 0; i < val_count; i++) {
2156			switch (val_bytes) {
2157			case 1:
2158				pr_cont("%x", u8p[i]);
2159				break;
2160			case 2:
2161				pr_cont("%x", u16p[i]);
2162				break;
2163			case 4:
2164				pr_cont("%x", u32p[i]);
2165				break;
2166			default:
2167				break;
2168			}
2169			if (i == (val_count - 1))
2170				pr_cont("]\n");
2171			else
2172				pr_cont(",");
2173		}
2174	}
2175
2176	return 0;
2177}
2178
2179/**
2180 * regmap_noinc_write(): Write data to a register without incrementing the
2181 *			register number
2182 *
2183 * @map: Register map to write to
2184 * @reg: Register to write to
2185 * @val: Pointer to data buffer
2186 * @val_len: Length of output buffer in bytes.
2187 *
2188 * The regmap API usually assumes that bulk bus write operations will write a
2189 * range of registers. Some devices have certain registers for which a write
2190 * operation can write to an internal FIFO.
2191 *
2192 * The target register must be volatile but registers after it can be
2193 * completely unrelated cacheable registers.
2194 *
2195 * This will attempt multiple writes as required to write val_len bytes.
2196 *
2197 * A value of zero will be returned on success, a negative errno will be
2198 * returned in error cases.
2199 */
2200int regmap_noinc_write(struct regmap *map, unsigned int reg,
2201		      const void *val, size_t val_len)
2202{
2203	size_t write_len;
2204	int ret;
2205
2206	if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2207		return -EINVAL;
2208	if (val_len % map->format.val_bytes)
2209		return -EINVAL;
2210	if (!IS_ALIGNED(reg, map->reg_stride))
2211		return -EINVAL;
2212	if (val_len == 0)
2213		return -EINVAL;
2214
2215	map->lock(map->lock_arg);
2216
2217	if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2218		ret = -EINVAL;
2219		goto out_unlock;
2220	}
2221
2222	/*
2223	 * Use the accelerated operation if we can. The val drops the const
2224	 * typing in order to facilitate code reuse in regmap_noinc_readwrite().
2225	 */
2226	if (map->bus->reg_noinc_write) {
2227		ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true);
2228		goto out_unlock;
2229	}
2230
2231	while (val_len) {
2232		if (map->max_raw_write && map->max_raw_write < val_len)
2233			write_len = map->max_raw_write;
2234		else
2235			write_len = val_len;
2236		ret = _regmap_raw_write(map, reg, val, write_len, true);
2237		if (ret)
2238			goto out_unlock;
2239		val = ((u8 *)val) + write_len;
2240		val_len -= write_len;
2241	}
2242
2243out_unlock:
2244	map->unlock(map->lock_arg);
2245	return ret;
2246}
2247EXPORT_SYMBOL_GPL(regmap_noinc_write);
2248
2249/**
2250 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2251 *                                   register field.
2252 *
2253 * @field: Register field to write to
2254 * @mask: Bitmask to change
2255 * @val: Value to be written
2256 * @change: Boolean indicating if a write was done
2257 * @async: Boolean indicating asynchronously
2258 * @force: Boolean indicating use force update
2259 *
2260 * Perform a read/modify/write cycle on the register field with change,
2261 * async, force option.
2262 *
2263 * A value of zero will be returned on success, a negative errno will
2264 * be returned in error cases.
2265 */
2266int regmap_field_update_bits_base(struct regmap_field *field,
2267				  unsigned int mask, unsigned int val,
2268				  bool *change, bool async, bool force)
2269{
2270	mask = (mask << field->shift) & field->mask;
2271
2272	return regmap_update_bits_base(field->regmap, field->reg,
2273				       mask, val << field->shift,
2274				       change, async, force);
2275}
2276EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2277
2278/**
2279 * regmap_field_test_bits() - Check if all specified bits are set in a
2280 *                            register field.
2281 *
2282 * @field: Register field to operate on
2283 * @bits: Bits to test
2284 *
2285 * Returns negative errno if the underlying regmap_field_read() fails,
2286 * 0 if at least one of the tested bits is not set and 1 if all tested
2287 * bits are set.
2288 */
2289int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2290{
2291	unsigned int val;
2292	int ret;
2293
2294	ret = regmap_field_read(field, &val);
2295	if (ret)
2296		return ret;
2297
2298	return (val & bits) == bits;
2299}
2300EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2301
2302/**
2303 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2304 *                                    register field with port ID
2305 *
2306 * @field: Register field to write to
2307 * @id: port ID
2308 * @mask: Bitmask to change
2309 * @val: Value to be written
2310 * @change: Boolean indicating if a write was done
2311 * @async: Boolean indicating asynchronously
2312 * @force: Boolean indicating use force update
2313 *
2314 * A value of zero will be returned on success, a negative errno will
2315 * be returned in error cases.
2316 */
2317int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2318				   unsigned int mask, unsigned int val,
2319				   bool *change, bool async, bool force)
2320{
2321	if (id >= field->id_size)
2322		return -EINVAL;
2323
2324	mask = (mask << field->shift) & field->mask;
2325
2326	return regmap_update_bits_base(field->regmap,
2327				       field->reg + (field->id_offset * id),
2328				       mask, val << field->shift,
2329				       change, async, force);
2330}
2331EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2332
2333/**
2334 * regmap_bulk_write() - Write multiple registers to the device
2335 *
2336 * @map: Register map to write to
2337 * @reg: First register to be write from
2338 * @val: Block of data to be written, in native register size for device
2339 * @val_count: Number of registers to write
2340 *
2341 * This function is intended to be used for writing a large block of
2342 * data to the device either in single transfer or multiple transfer.
2343 *
2344 * A value of zero will be returned on success, a negative errno will
2345 * be returned in error cases.
2346 */
2347int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2348		     size_t val_count)
2349{
2350	int ret = 0, i;
2351	size_t val_bytes = map->format.val_bytes;
2352
2353	if (!IS_ALIGNED(reg, map->reg_stride))
2354		return -EINVAL;
2355
2356	/*
2357	 * Some devices don't support bulk write, for them we have a series of
2358	 * single write operations.
2359	 */
2360	if (!map->write || !map->format.parse_inplace) {
2361		map->lock(map->lock_arg);
2362		for (i = 0; i < val_count; i++) {
2363			unsigned int ival;
2364
2365			switch (val_bytes) {
2366			case 1:
2367				ival = *(u8 *)(val + (i * val_bytes));
2368				break;
2369			case 2:
2370				ival = *(u16 *)(val + (i * val_bytes));
2371				break;
2372			case 4:
2373				ival = *(u32 *)(val + (i * val_bytes));
2374				break;
2375			default:
2376				ret = -EINVAL;
2377				goto out;
2378			}
2379
2380			ret = _regmap_write(map,
2381					    reg + regmap_get_offset(map, i),
2382					    ival);
2383			if (ret != 0)
2384				goto out;
2385		}
2386out:
2387		map->unlock(map->lock_arg);
2388	} else {
2389		void *wval;
2390
2391		wval = kmemdup_array(val, val_count, val_bytes, map->alloc_flags);
2392		if (!wval)
2393			return -ENOMEM;
2394
2395		for (i = 0; i < val_count * val_bytes; i += val_bytes)
2396			map->format.parse_inplace(wval + i);
2397
2398		ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2399
2400		kfree(wval);
2401	}
2402
2403	if (!ret)
2404		trace_regmap_bulk_write(map, reg, val, val_bytes * val_count);
2405
2406	return ret;
2407}
2408EXPORT_SYMBOL_GPL(regmap_bulk_write);
2409
2410/*
2411 * _regmap_raw_multi_reg_write()
2412 *
2413 * the (register,newvalue) pairs in regs have not been formatted, but
2414 * they are all in the same page and have been changed to being page
2415 * relative. The page register has been written if that was necessary.
2416 */
2417static int _regmap_raw_multi_reg_write(struct regmap *map,
2418				       const struct reg_sequence *regs,
2419				       size_t num_regs)
2420{
2421	int ret;
2422	void *buf;
2423	int i;
2424	u8 *u8;
2425	size_t val_bytes = map->format.val_bytes;
2426	size_t reg_bytes = map->format.reg_bytes;
2427	size_t pad_bytes = map->format.pad_bytes;
2428	size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2429	size_t len = pair_size * num_regs;
2430
2431	if (!len)
2432		return -EINVAL;
2433
2434	buf = kzalloc(len, GFP_KERNEL);
2435	if (!buf)
2436		return -ENOMEM;
2437
2438	/* We have to linearise by hand. */
2439
2440	u8 = buf;
2441
2442	for (i = 0; i < num_regs; i++) {
2443		unsigned int reg = regs[i].reg;
2444		unsigned int val = regs[i].def;
2445		trace_regmap_hw_write_start(map, reg, 1);
2446		reg = regmap_reg_addr(map, reg);
2447		map->format.format_reg(u8, reg, map->reg_shift);
2448		u8 += reg_bytes + pad_bytes;
2449		map->format.format_val(u8, val, 0);
2450		u8 += val_bytes;
2451	}
2452	u8 = buf;
2453	*u8 |= map->write_flag_mask;
2454
2455	ret = map->write(map->bus_context, buf, len);
2456
2457	kfree(buf);
2458
2459	for (i = 0; i < num_regs; i++) {
2460		int reg = regs[i].reg;
2461		trace_regmap_hw_write_done(map, reg, 1);
2462	}
2463	return ret;
2464}
2465
2466static unsigned int _regmap_register_page(struct regmap *map,
2467					  unsigned int reg,
2468					  struct regmap_range_node *range)
2469{
2470	unsigned int win_page = (reg - range->range_min) / range->window_len;
2471
2472	return win_page;
2473}
2474
2475static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2476					       struct reg_sequence *regs,
2477					       size_t num_regs)
2478{
2479	int ret;
2480	int i, n;
2481	struct reg_sequence *base;
2482	unsigned int this_page = 0;
2483	unsigned int page_change = 0;
2484	/*
2485	 * the set of registers are not neccessarily in order, but
2486	 * since the order of write must be preserved this algorithm
2487	 * chops the set each time the page changes. This also applies
2488	 * if there is a delay required at any point in the sequence.
2489	 */
2490	base = regs;
2491	for (i = 0, n = 0; i < num_regs; i++, n++) {
2492		unsigned int reg = regs[i].reg;
2493		struct regmap_range_node *range;
2494
2495		range = _regmap_range_lookup(map, reg);
2496		if (range) {
2497			unsigned int win_page = _regmap_register_page(map, reg,
2498								      range);
2499
2500			if (i == 0)
2501				this_page = win_page;
2502			if (win_page != this_page) {
2503				this_page = win_page;
2504				page_change = 1;
2505			}
2506		}
2507
2508		/* If we have both a page change and a delay make sure to
2509		 * write the regs and apply the delay before we change the
2510		 * page.
2511		 */
2512
2513		if (page_change || regs[i].delay_us) {
2514
2515				/* For situations where the first write requires
2516				 * a delay we need to make sure we don't call
2517				 * raw_multi_reg_write with n=0
2518				 * This can't occur with page breaks as we
2519				 * never write on the first iteration
2520				 */
2521				if (regs[i].delay_us && i == 0)
2522					n = 1;
2523
2524				ret = _regmap_raw_multi_reg_write(map, base, n);
2525				if (ret != 0)
2526					return ret;
2527
2528				if (regs[i].delay_us) {
2529					if (map->can_sleep)
2530						fsleep(regs[i].delay_us);
2531					else
2532						udelay(regs[i].delay_us);
2533				}
2534
2535				base += n;
2536				n = 0;
2537
2538				if (page_change) {
2539					ret = _regmap_select_page(map,
2540								  &base[n].reg,
2541								  range, 1);
2542					if (ret != 0)
2543						return ret;
2544
2545					page_change = 0;
2546				}
2547
2548		}
2549
2550	}
2551	if (n > 0)
2552		return _regmap_raw_multi_reg_write(map, base, n);
2553	return 0;
2554}
2555
2556static int _regmap_multi_reg_write(struct regmap *map,
2557				   const struct reg_sequence *regs,
2558				   size_t num_regs)
2559{
2560	int i;
2561	int ret;
2562
2563	if (!map->can_multi_write) {
2564		for (i = 0; i < num_regs; i++) {
2565			ret = _regmap_write(map, regs[i].reg, regs[i].def);
2566			if (ret != 0)
2567				return ret;
2568
2569			if (regs[i].delay_us) {
2570				if (map->can_sleep)
2571					fsleep(regs[i].delay_us);
2572				else
2573					udelay(regs[i].delay_us);
2574			}
2575		}
2576		return 0;
2577	}
2578
2579	if (!map->format.parse_inplace)
2580		return -EINVAL;
2581
2582	if (map->writeable_reg)
2583		for (i = 0; i < num_regs; i++) {
2584			int reg = regs[i].reg;
2585			if (!map->writeable_reg(map->dev, reg))
2586				return -EINVAL;
2587			if (!IS_ALIGNED(reg, map->reg_stride))
2588				return -EINVAL;
2589		}
2590
2591	if (!map->cache_bypass) {
2592		for (i = 0; i < num_regs; i++) {
2593			unsigned int val = regs[i].def;
2594			unsigned int reg = regs[i].reg;
2595			ret = regcache_write(map, reg, val);
2596			if (ret) {
2597				dev_err(map->dev,
2598				"Error in caching of register: %x ret: %d\n",
2599								reg, ret);
2600				return ret;
2601			}
2602		}
2603		if (map->cache_only) {
2604			map->cache_dirty = true;
2605			return 0;
2606		}
2607	}
2608
2609	WARN_ON(!map->bus);
2610
2611	for (i = 0; i < num_regs; i++) {
2612		unsigned int reg = regs[i].reg;
2613		struct regmap_range_node *range;
2614
2615		/* Coalesce all the writes between a page break or a delay
2616		 * in a sequence
2617		 */
2618		range = _regmap_range_lookup(map, reg);
2619		if (range || regs[i].delay_us) {
2620			size_t len = sizeof(struct reg_sequence)*num_regs;
2621			struct reg_sequence *base = kmemdup(regs, len,
2622							   GFP_KERNEL);
2623			if (!base)
2624				return -ENOMEM;
2625			ret = _regmap_range_multi_paged_reg_write(map, base,
2626								  num_regs);
2627			kfree(base);
2628
2629			return ret;
2630		}
2631	}
2632	return _regmap_raw_multi_reg_write(map, regs, num_regs);
2633}
2634
2635/**
2636 * regmap_multi_reg_write() - Write multiple registers to the device
2637 *
2638 * @map: Register map to write to
2639 * @regs: Array of structures containing register,value to be written
2640 * @num_regs: Number of registers to write
2641 *
2642 * Write multiple registers to the device where the set of register, value
2643 * pairs are supplied in any order, possibly not all in a single range.
2644 *
2645 * The 'normal' block write mode will send ultimately send data on the
2646 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2647 * addressed. However, this alternative block multi write mode will send
2648 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2649 * must of course support the mode.
2650 *
2651 * A value of zero will be returned on success, a negative errno will be
2652 * returned in error cases.
2653 */
2654int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2655			   int num_regs)
2656{
2657	int ret;
2658
2659	map->lock(map->lock_arg);
2660
2661	ret = _regmap_multi_reg_write(map, regs, num_regs);
2662
2663	map->unlock(map->lock_arg);
2664
2665	return ret;
2666}
2667EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2668
2669/**
2670 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2671 *                                     device but not the cache
2672 *
2673 * @map: Register map to write to
2674 * @regs: Array of structures containing register,value to be written
2675 * @num_regs: Number of registers to write
2676 *
2677 * Write multiple registers to the device but not the cache where the set
2678 * of register are supplied in any order.
2679 *
2680 * This function is intended to be used for writing a large block of data
2681 * atomically to the device in single transfer for those I2C client devices
2682 * that implement this alternative block write mode.
2683 *
2684 * A value of zero will be returned on success, a negative errno will
2685 * be returned in error cases.
2686 */
2687int regmap_multi_reg_write_bypassed(struct regmap *map,
2688				    const struct reg_sequence *regs,
2689				    int num_regs)
2690{
2691	int ret;
2692	bool bypass;
2693
2694	map->lock(map->lock_arg);
2695
2696	bypass = map->cache_bypass;
2697	map->cache_bypass = true;
2698
2699	ret = _regmap_multi_reg_write(map, regs, num_regs);
2700
2701	map->cache_bypass = bypass;
2702
2703	map->unlock(map->lock_arg);
2704
2705	return ret;
2706}
2707EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2708
2709/**
2710 * regmap_raw_write_async() - Write raw values to one or more registers
2711 *                            asynchronously
2712 *
2713 * @map: Register map to write to
2714 * @reg: Initial register to write to
2715 * @val: Block of data to be written, laid out for direct transmission to the
2716 *       device.  Must be valid until regmap_async_complete() is called.
2717 * @val_len: Length of data pointed to by val.
2718 *
2719 * This function is intended to be used for things like firmware
2720 * download where a large block of data needs to be transferred to the
2721 * device.  No formatting will be done on the data provided.
2722 *
2723 * If supported by the underlying bus the write will be scheduled
2724 * asynchronously, helping maximise I/O speed on higher speed buses
2725 * like SPI.  regmap_async_complete() can be called to ensure that all
2726 * asynchrnous writes have been completed.
2727 *
2728 * A value of zero will be returned on success, a negative errno will
2729 * be returned in error cases.
2730 */
2731int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2732			   const void *val, size_t val_len)
2733{
2734	int ret;
2735
2736	if (val_len % map->format.val_bytes)
2737		return -EINVAL;
2738	if (!IS_ALIGNED(reg, map->reg_stride))
2739		return -EINVAL;
2740
2741	map->lock(map->lock_arg);
2742
2743	map->async = true;
2744
2745	ret = _regmap_raw_write(map, reg, val, val_len, false);
2746
2747	map->async = false;
2748
2749	map->unlock(map->lock_arg);
2750
2751	return ret;
2752}
2753EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2754
2755static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2756			    unsigned int val_len, bool noinc)
2757{
2758	struct regmap_range_node *range;
2759	int ret;
2760
2761	if (!map->read)
2762		return -EINVAL;
2763
2764	range = _regmap_range_lookup(map, reg);
2765	if (range) {
2766		ret = _regmap_select_page(map, &reg, range,
2767					  noinc ? 1 : val_len / map->format.val_bytes);
2768		if (ret != 0)
2769			return ret;
2770	}
2771
2772	reg = regmap_reg_addr(map, reg);
2773	map->format.format_reg(map->work_buf, reg, map->reg_shift);
2774	regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2775				      map->read_flag_mask);
2776	trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2777
2778	ret = map->read(map->bus_context, map->work_buf,
2779			map->format.reg_bytes + map->format.pad_bytes,
2780			val, val_len);
2781
2782	trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2783
2784	return ret;
2785}
2786
2787static int _regmap_bus_reg_read(void *context, unsigned int reg,
2788				unsigned int *val)
2789{
2790	struct regmap *map = context;
2791	struct regmap_range_node *range;
2792	int ret;
2793
2794	range = _regmap_range_lookup(map, reg);
2795	if (range) {
2796		ret = _regmap_select_page(map, &reg, range, 1);
2797		if (ret != 0)
2798			return ret;
2799	}
2800
2801	reg = regmap_reg_addr(map, reg);
2802	return map->bus->reg_read(map->bus_context, reg, val);
2803}
2804
2805static int _regmap_bus_read(void *context, unsigned int reg,
2806			    unsigned int *val)
2807{
2808	int ret;
2809	struct regmap *map = context;
2810	void *work_val = map->work_buf + map->format.reg_bytes +
2811		map->format.pad_bytes;
2812
2813	if (!map->format.parse_val)
2814		return -EINVAL;
2815
2816	ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2817	if (ret == 0)
2818		*val = map->format.parse_val(work_val);
2819
2820	return ret;
2821}
2822
2823static int _regmap_read(struct regmap *map, unsigned int reg,
2824			unsigned int *val)
2825{
2826	int ret;
2827	void *context = _regmap_map_get_context(map);
2828
2829	if (!map->cache_bypass) {
2830		ret = regcache_read(map, reg, val);
2831		if (ret == 0)
2832			return 0;
2833	}
2834
2835	if (map->cache_only)
2836		return -EBUSY;
2837
2838	if (!regmap_readable(map, reg))
2839		return -EIO;
2840
2841	ret = map->reg_read(context, reg, val);
2842	if (ret == 0) {
2843		if (regmap_should_log(map))
2844			dev_info(map->dev, "%x => %x\n", reg, *val);
2845
2846		trace_regmap_reg_read(map, reg, *val);
2847
2848		if (!map->cache_bypass)
2849			regcache_write(map, reg, *val);
2850	}
2851
2852	return ret;
2853}
2854
2855/**
2856 * regmap_read() - Read a value from a single register
2857 *
2858 * @map: Register map to read from
2859 * @reg: Register to be read from
2860 * @val: Pointer to store read value
2861 *
2862 * A value of zero will be returned on success, a negative errno will
2863 * be returned in error cases.
2864 */
2865int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2866{
2867	int ret;
2868
2869	if (!IS_ALIGNED(reg, map->reg_stride))
2870		return -EINVAL;
2871
2872	map->lock(map->lock_arg);
2873
2874	ret = _regmap_read(map, reg, val);
2875
2876	map->unlock(map->lock_arg);
2877
2878	return ret;
2879}
2880EXPORT_SYMBOL_GPL(regmap_read);
2881
2882/**
2883 * regmap_read_bypassed() - Read a value from a single register direct
2884 *			    from the device, bypassing the cache
2885 *
2886 * @map: Register map to read from
2887 * @reg: Register to be read from
2888 * @val: Pointer to store read value
2889 *
2890 * A value of zero will be returned on success, a negative errno will
2891 * be returned in error cases.
2892 */
2893int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val)
2894{
2895	int ret;
2896	bool bypass, cache_only;
2897
2898	if (!IS_ALIGNED(reg, map->reg_stride))
2899		return -EINVAL;
2900
2901	map->lock(map->lock_arg);
2902
2903	bypass = map->cache_bypass;
2904	cache_only = map->cache_only;
2905	map->cache_bypass = true;
2906	map->cache_only = false;
2907
2908	ret = _regmap_read(map, reg, val);
2909
2910	map->cache_bypass = bypass;
2911	map->cache_only = cache_only;
2912
2913	map->unlock(map->lock_arg);
2914
2915	return ret;
2916}
2917EXPORT_SYMBOL_GPL(regmap_read_bypassed);
2918
2919/**
2920 * regmap_raw_read() - Read raw data from the device
2921 *
2922 * @map: Register map to read from
2923 * @reg: First register to be read from
2924 * @val: Pointer to store read value
2925 * @val_len: Size of data to read
2926 *
2927 * A value of zero will be returned on success, a negative errno will
2928 * be returned in error cases.
2929 */
2930int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2931		    size_t val_len)
2932{
2933	size_t val_bytes = map->format.val_bytes;
2934	size_t val_count = val_len / val_bytes;
2935	unsigned int v;
2936	int ret, i;
2937
2938	if (val_len % map->format.val_bytes)
2939		return -EINVAL;
2940	if (!IS_ALIGNED(reg, map->reg_stride))
2941		return -EINVAL;
2942	if (val_count == 0)
2943		return -EINVAL;
2944
2945	map->lock(map->lock_arg);
2946
2947	if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2948	    map->cache_type == REGCACHE_NONE) {
2949		size_t chunk_count, chunk_bytes;
2950		size_t chunk_regs = val_count;
2951
2952		if (!map->cache_bypass && map->cache_only) {
2953			ret = -EBUSY;
2954			goto out;
2955		}
2956
2957		if (!map->read) {
2958			ret = -ENOTSUPP;
2959			goto out;
2960		}
2961
2962		if (map->use_single_read)
2963			chunk_regs = 1;
2964		else if (map->max_raw_read && val_len > map->max_raw_read)
2965			chunk_regs = map->max_raw_read / val_bytes;
2966
2967		chunk_count = val_count / chunk_regs;
2968		chunk_bytes = chunk_regs * val_bytes;
2969
2970		/* Read bytes that fit into whole chunks */
2971		for (i = 0; i < chunk_count; i++) {
2972			ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2973			if (ret != 0)
2974				goto out;
2975
2976			reg += regmap_get_offset(map, chunk_regs);
2977			val += chunk_bytes;
2978			val_len -= chunk_bytes;
2979		}
2980
2981		/* Read remaining bytes */
2982		if (val_len) {
2983			ret = _regmap_raw_read(map, reg, val, val_len, false);
2984			if (ret != 0)
2985				goto out;
2986		}
2987	} else {
2988		/* Otherwise go word by word for the cache; should be low
2989		 * cost as we expect to hit the cache.
2990		 */
2991		for (i = 0; i < val_count; i++) {
2992			ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2993					   &v);
2994			if (ret != 0)
2995				goto out;
2996
2997			map->format.format_val(val + (i * val_bytes), v, 0);
2998		}
2999	}
3000
3001 out:
3002	map->unlock(map->lock_arg);
3003
3004	return ret;
3005}
3006EXPORT_SYMBOL_GPL(regmap_raw_read);
3007
3008/**
3009 * regmap_noinc_read(): Read data from a register without incrementing the
3010 *			register number
3011 *
3012 * @map: Register map to read from
3013 * @reg: Register to read from
3014 * @val: Pointer to data buffer
3015 * @val_len: Length of output buffer in bytes.
3016 *
3017 * The regmap API usually assumes that bulk read operations will read a
3018 * range of registers. Some devices have certain registers for which a read
3019 * operation read will read from an internal FIFO.
3020 *
3021 * The target register must be volatile but registers after it can be
3022 * completely unrelated cacheable registers.
3023 *
3024 * This will attempt multiple reads as required to read val_len bytes.
3025 *
3026 * A value of zero will be returned on success, a negative errno will be
3027 * returned in error cases.
3028 */
3029int regmap_noinc_read(struct regmap *map, unsigned int reg,
3030		      void *val, size_t val_len)
3031{
3032	size_t read_len;
3033	int ret;
3034
3035	if (!map->read)
3036		return -ENOTSUPP;
3037
3038	if (val_len % map->format.val_bytes)
3039		return -EINVAL;
3040	if (!IS_ALIGNED(reg, map->reg_stride))
3041		return -EINVAL;
3042	if (val_len == 0)
3043		return -EINVAL;
3044
3045	map->lock(map->lock_arg);
3046
3047	if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
3048		ret = -EINVAL;
3049		goto out_unlock;
3050	}
3051
3052	/*
3053	 * We have not defined the FIFO semantics for cache, as the
3054	 * cache is just one value deep. Should we return the last
3055	 * written value? Just avoid this by always reading the FIFO
3056	 * even when using cache. Cache only will not work.
3057	 */
3058	if (!map->cache_bypass && map->cache_only) {
3059		ret = -EBUSY;
3060		goto out_unlock;
3061	}
3062
3063	/* Use the accelerated operation if we can */
3064	if (map->bus->reg_noinc_read) {
3065		ret = regmap_noinc_readwrite(map, reg, val, val_len, false);
3066		goto out_unlock;
3067	}
3068
3069	while (val_len) {
3070		if (map->max_raw_read && map->max_raw_read < val_len)
3071			read_len = map->max_raw_read;
3072		else
3073			read_len = val_len;
3074		ret = _regmap_raw_read(map, reg, val, read_len, true);
3075		if (ret)
3076			goto out_unlock;
3077		val = ((u8 *)val) + read_len;
3078		val_len -= read_len;
3079	}
3080
3081out_unlock:
3082	map->unlock(map->lock_arg);
3083	return ret;
3084}
3085EXPORT_SYMBOL_GPL(regmap_noinc_read);
3086
3087/**
3088 * regmap_field_read(): Read a value to a single register field
3089 *
3090 * @field: Register field to read from
3091 * @val: Pointer to store read value
3092 *
3093 * A value of zero will be returned on success, a negative errno will
3094 * be returned in error cases.
3095 */
3096int regmap_field_read(struct regmap_field *field, unsigned int *val)
3097{
3098	int ret;
3099	unsigned int reg_val;
3100	ret = regmap_read(field->regmap, field->reg, &reg_val);
3101	if (ret != 0)
3102		return ret;
3103
3104	reg_val &= field->mask;
3105	reg_val >>= field->shift;
3106	*val = reg_val;
3107
3108	return ret;
3109}
3110EXPORT_SYMBOL_GPL(regmap_field_read);
3111
3112/**
3113 * regmap_fields_read() - Read a value to a single register field with port ID
3114 *
3115 * @field: Register field to read from
3116 * @id: port ID
3117 * @val: Pointer to store read value
3118 *
3119 * A value of zero will be returned on success, a negative errno will
3120 * be returned in error cases.
3121 */
3122int regmap_fields_read(struct regmap_field *field, unsigned int id,
3123		       unsigned int *val)
3124{
3125	int ret;
3126	unsigned int reg_val;
3127
3128	if (id >= field->id_size)
3129		return -EINVAL;
3130
3131	ret = regmap_read(field->regmap,
3132			  field->reg + (field->id_offset * id),
3133			  &reg_val);
3134	if (ret != 0)
3135		return ret;
3136
3137	reg_val &= field->mask;
3138	reg_val >>= field->shift;
3139	*val = reg_val;
3140
3141	return ret;
3142}
3143EXPORT_SYMBOL_GPL(regmap_fields_read);
3144
3145static int _regmap_bulk_read(struct regmap *map, unsigned int reg,
3146			     const unsigned int *regs, void *val, size_t val_count)
3147{
3148	u32 *u32 = val;
3149	u16 *u16 = val;
3150	u8 *u8 = val;
3151	int ret, i;
3152
3153	map->lock(map->lock_arg);
3154
3155	for (i = 0; i < val_count; i++) {
3156		unsigned int ival;
3157
3158		if (regs) {
3159			if (!IS_ALIGNED(regs[i], map->reg_stride)) {
3160				ret = -EINVAL;
3161				goto out;
3162			}
3163			ret = _regmap_read(map, regs[i], &ival);
3164		} else {
3165			ret = _regmap_read(map, reg + regmap_get_offset(map, i), &ival);
3166		}
3167		if (ret != 0)
3168			goto out;
3169
3170		switch (map->format.val_bytes) {
3171		case 4:
3172			u32[i] = ival;
3173			break;
3174		case 2:
3175			u16[i] = ival;
3176			break;
3177		case 1:
3178			u8[i] = ival;
3179			break;
3180		default:
3181			ret = -EINVAL;
3182			goto out;
3183		}
3184	}
3185out:
3186	map->unlock(map->lock_arg);
3187	return ret;
3188}
3189
3190/**
3191 * regmap_bulk_read() - Read multiple sequential registers from the device
3192 *
3193 * @map: Register map to read from
3194 * @reg: First register to be read from
3195 * @val: Pointer to store read value, in native register size for device
3196 * @val_count: Number of registers to read
3197 *
3198 * A value of zero will be returned on success, a negative errno will
3199 * be returned in error cases.
3200 */
3201int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3202		     size_t val_count)
3203{
3204	int ret, i;
3205	size_t val_bytes = map->format.val_bytes;
3206	bool vol = regmap_volatile_range(map, reg, val_count);
3207
3208	if (!IS_ALIGNED(reg, map->reg_stride))
3209		return -EINVAL;
3210	if (val_count == 0)
3211		return -EINVAL;
3212
3213	if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3214		ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3215		if (ret != 0)
3216			return ret;
3217
3218		for (i = 0; i < val_count * val_bytes; i += val_bytes)
3219			map->format.parse_inplace(val + i);
3220	} else {
3221		ret = _regmap_bulk_read(map, reg, NULL, val, val_count);
3222	}
3223	if (!ret)
3224		trace_regmap_bulk_read(map, reg, val, val_bytes * val_count);
3225	return ret;
3226}
3227EXPORT_SYMBOL_GPL(regmap_bulk_read);
3228
3229/**
3230 * regmap_multi_reg_read() - Read multiple non-sequential registers from the device
3231 *
3232 * @map: Register map to read from
3233 * @regs: Array of registers to read from
3234 * @val: Pointer to store read value, in native register size for device
3235 * @val_count: Number of registers to read
3236 *
3237 * A value of zero will be returned on success, a negative errno will
3238 * be returned in error cases.
3239 */
3240int regmap_multi_reg_read(struct regmap *map, const unsigned int *regs, void *val,
3241			  size_t val_count)
3242{
3243	if (val_count == 0)
3244		return -EINVAL;
3245
3246	return _regmap_bulk_read(map, 0, regs, val, val_count);
3247}
3248EXPORT_SYMBOL_GPL(regmap_multi_reg_read);
3249
3250static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3251			       unsigned int mask, unsigned int val,
3252			       bool *change, bool force_write)
3253{
3254	int ret;
3255	unsigned int tmp, orig;
3256
3257	if (change)
3258		*change = false;
3259
3260	if (regmap_volatile(map, reg) && map->reg_update_bits) {
3261		reg = regmap_reg_addr(map, reg);
3262		ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3263		if (ret == 0 && change)
3264			*change = true;
3265	} else {
3266		ret = _regmap_read(map, reg, &orig);
3267		if (ret != 0)
3268			return ret;
3269
3270		tmp = orig & ~mask;
3271		tmp |= val & mask;
3272
3273		if (force_write || (tmp != orig) || map->force_write_field) {
3274			ret = _regmap_write(map, reg, tmp);
3275			if (ret == 0 && change)
3276				*change = true;
3277		}
3278	}
3279
3280	return ret;
3281}
3282
3283/**
3284 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3285 *
3286 * @map: Register map to update
3287 * @reg: Register to update
3288 * @mask: Bitmask to change
3289 * @val: New value for bitmask
3290 * @change: Boolean indicating if a write was done
3291 * @async: Boolean indicating asynchronously
3292 * @force: Boolean indicating use force update
3293 *
3294 * Perform a read/modify/write cycle on a register map with change, async, force
3295 * options.
3296 *
3297 * If async is true:
3298 *
3299 * With most buses the read must be done synchronously so this is most useful
3300 * for devices with a cache which do not need to interact with the hardware to
3301 * determine the current register value.
3302 *
3303 * Returns zero for success, a negative number on error.
3304 */
3305int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3306			    unsigned int mask, unsigned int val,
3307			    bool *change, bool async, bool force)
3308{
3309	int ret;
3310
3311	map->lock(map->lock_arg);
3312
3313	map->async = async;
3314
3315	ret = _regmap_update_bits(map, reg, mask, val, change, force);
3316
3317	map->async = false;
3318
3319	map->unlock(map->lock_arg);
3320
3321	return ret;
3322}
3323EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3324
3325/**
3326 * regmap_test_bits() - Check if all specified bits are set in a register.
3327 *
3328 * @map: Register map to operate on
3329 * @reg: Register to read from
3330 * @bits: Bits to test
3331 *
3332 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3333 * bits are set and a negative error number if the underlying regmap_read()
3334 * fails.
3335 */
3336int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3337{
3338	unsigned int val;
3339	int ret;
3340
3341	ret = regmap_read(map, reg, &val);
3342	if (ret)
3343		return ret;
3344
3345	return (val & bits) == bits;
3346}
3347EXPORT_SYMBOL_GPL(regmap_test_bits);
3348
3349void regmap_async_complete_cb(struct regmap_async *async, int ret)
3350{
3351	struct regmap *map = async->map;
3352	bool wake;
3353
3354	trace_regmap_async_io_complete(map);
3355
3356	spin_lock(&map->async_lock);
3357	list_move(&async->list, &map->async_free);
3358	wake = list_empty(&map->async_list);
3359
3360	if (ret != 0)
3361		map->async_ret = ret;
3362
3363	spin_unlock(&map->async_lock);
3364
3365	if (wake)
3366		wake_up(&map->async_waitq);
3367}
3368EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3369
3370static int regmap_async_is_done(struct regmap *map)
3371{
3372	unsigned long flags;
3373	int ret;
3374
3375	spin_lock_irqsave(&map->async_lock, flags);
3376	ret = list_empty(&map->async_list);
3377	spin_unlock_irqrestore(&map->async_lock, flags);
3378
3379	return ret;
3380}
3381
3382/**
3383 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3384 *
3385 * @map: Map to operate on.
3386 *
3387 * Blocks until any pending asynchronous I/O has completed.  Returns
3388 * an error code for any failed I/O operations.
3389 */
3390int regmap_async_complete(struct regmap *map)
3391{
3392	unsigned long flags;
3393	int ret;
3394
3395	/* Nothing to do with no async support */
3396	if (!map->bus || !map->bus->async_write)
3397		return 0;
3398
3399	trace_regmap_async_complete_start(map);
3400
3401	wait_event(map->async_waitq, regmap_async_is_done(map));
3402
3403	spin_lock_irqsave(&map->async_lock, flags);
3404	ret = map->async_ret;
3405	map->async_ret = 0;
3406	spin_unlock_irqrestore(&map->async_lock, flags);
3407
3408	trace_regmap_async_complete_done(map);
3409
3410	return ret;
3411}
3412EXPORT_SYMBOL_GPL(regmap_async_complete);
3413
3414/**
3415 * regmap_register_patch - Register and apply register updates to be applied
3416 *                         on device initialistion
3417 *
3418 * @map: Register map to apply updates to.
3419 * @regs: Values to update.
3420 * @num_regs: Number of entries in regs.
3421 *
3422 * Register a set of register updates to be applied to the device
3423 * whenever the device registers are synchronised with the cache and
3424 * apply them immediately.  Typically this is used to apply
3425 * corrections to be applied to the device defaults on startup, such
3426 * as the updates some vendors provide to undocumented registers.
3427 *
3428 * The caller must ensure that this function cannot be called
3429 * concurrently with either itself or regcache_sync().
3430 */
3431int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3432			  int num_regs)
3433{
3434	struct reg_sequence *p;
3435	int ret;
3436	bool bypass;
3437
3438	if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3439	    num_regs))
3440		return 0;
3441
3442	p = krealloc(map->patch,
3443		     sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3444		     GFP_KERNEL);
3445	if (p) {
3446		memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3447		map->patch = p;
3448		map->patch_regs += num_regs;
3449	} else {
3450		return -ENOMEM;
3451	}
3452
3453	map->lock(map->lock_arg);
3454
3455	bypass = map->cache_bypass;
3456
3457	map->cache_bypass = true;
3458	map->async = true;
3459
3460	ret = _regmap_multi_reg_write(map, regs, num_regs);
3461
3462	map->async = false;
3463	map->cache_bypass = bypass;
3464
3465	map->unlock(map->lock_arg);
3466
3467	regmap_async_complete(map);
3468
3469	return ret;
3470}
3471EXPORT_SYMBOL_GPL(regmap_register_patch);
3472
3473/**
3474 * regmap_get_val_bytes() - Report the size of a register value
3475 *
3476 * @map: Register map to operate on.
3477 *
3478 * Report the size of a register value, mainly intended to for use by
3479 * generic infrastructure built on top of regmap.
3480 */
3481int regmap_get_val_bytes(struct regmap *map)
3482{
3483	if (map->format.format_write)
3484		return -EINVAL;
3485
3486	return map->format.val_bytes;
3487}
3488EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3489
3490/**
3491 * regmap_get_max_register() - Report the max register value
3492 *
3493 * @map: Register map to operate on.
3494 *
3495 * Report the max register value, mainly intended to for use by
3496 * generic infrastructure built on top of regmap.
3497 */
3498int regmap_get_max_register(struct regmap *map)
3499{
3500	return map->max_register_is_set ? map->max_register : -EINVAL;
3501}
3502EXPORT_SYMBOL_GPL(regmap_get_max_register);
3503
3504/**
3505 * regmap_get_reg_stride() - Report the register address stride
3506 *
3507 * @map: Register map to operate on.
3508 *
3509 * Report the register address stride, mainly intended to for use by
3510 * generic infrastructure built on top of regmap.
3511 */
3512int regmap_get_reg_stride(struct regmap *map)
3513{
3514	return map->reg_stride;
3515}
3516EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3517
3518/**
3519 * regmap_might_sleep() - Returns whether a regmap access might sleep.
3520 *
3521 * @map: Register map to operate on.
3522 *
3523 * Returns true if an access to the register might sleep, else false.
3524 */
3525bool regmap_might_sleep(struct regmap *map)
3526{
3527	return map->can_sleep;
3528}
3529EXPORT_SYMBOL_GPL(regmap_might_sleep);
3530
3531int regmap_parse_val(struct regmap *map, const void *buf,
3532			unsigned int *val)
3533{
3534	if (!map->format.parse_val)
3535		return -EINVAL;
3536
3537	*val = map->format.parse_val(buf);
3538
3539	return 0;
3540}
3541EXPORT_SYMBOL_GPL(regmap_parse_val);
3542
3543static int __init regmap_initcall(void)
3544{
3545	regmap_debugfs_initcall();
3546
3547	return 0;
3548}
3549postcore_initcall(regmap_initcall);