pci_irq.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 *  pci_irq.c - ACPI PCI Interrupt Routing ($Revision: 11 $)
  4 *
  5 *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  6 *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  7 *  Copyright (C) 2002       Dominik Brodowski <devel@brodo.de>
  8 *  (c) Copyright 2008 Hewlett-Packard Development Company, L.P.
  9 *	Bjorn Helgaas <bjorn.helgaas@hp.com>
 10 */
 11
 12#define pr_fmt(fmt) "ACPI: PCI: " fmt
 13
 14#include <linux/dmi.h>
 15#include <linux/kernel.h>
 16#include <linux/module.h>
 17#include <linux/init.h>
 18#include <linux/types.h>
 19#include <linux/spinlock.h>
 20#include <linux/pm.h>
 21#include <linux/pci.h>
 22#include <linux/acpi.h>
 23#include <linux/slab.h>
 24#include <linux/interrupt.h>
 25#include <linux/string_choices.h>
 26
 27struct acpi_prt_entry {
 28	struct acpi_pci_id	id;
 29	u8			pin;
 30	acpi_handle		link;
 31	u32			index;		/* GSI, or link _CRS index */
 32};
 33
 34static inline char pin_name(int pin)
 35{
 36	return 'A' + pin - 1;
 37}
 38
 39/* --------------------------------------------------------------------------
 40                         PCI IRQ Routing Table (PRT) Support
 41   -------------------------------------------------------------------------- */
 42
 43/* http://bugzilla.kernel.org/show_bug.cgi?id=4773 */
 44static const struct dmi_system_id medion_md9580[] = {
 45	{
 46		.ident = "Medion MD9580-F laptop",
 47		.matches = {
 48			DMI_MATCH(DMI_SYS_VENDOR, "MEDIONNB"),
 49			DMI_MATCH(DMI_PRODUCT_NAME, "A555"),
 50		},
 51	},
 52	{ }
 53};
 54
 55/* http://bugzilla.kernel.org/show_bug.cgi?id=5044 */
 56static const struct dmi_system_id dell_optiplex[] = {
 57	{
 58		.ident = "Dell Optiplex GX1",
 59		.matches = {
 60			DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
 61			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex GX1 600S+"),
 62		},
 63	},
 64	{ }
 65};
 66
 67/* http://bugzilla.kernel.org/show_bug.cgi?id=10138 */
 68static const struct dmi_system_id hp_t5710[] = {
 69	{
 70		.ident = "HP t5710",
 71		.matches = {
 72			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
 73			DMI_MATCH(DMI_PRODUCT_NAME, "hp t5000 series"),
 74			DMI_MATCH(DMI_BOARD_NAME, "098Ch"),
 75		},
 76	},
 77	{ }
 78};
 79
 80struct prt_quirk {
 81	const struct dmi_system_id *system;
 82	unsigned int		segment;
 83	unsigned int		bus;
 84	unsigned int		device;
 85	unsigned char		pin;
 86	const char		*source;	/* according to BIOS */
 87	const char		*actual_source;
 88};
 89
 90#define PCI_INTX_PIN(c)		(c - 'A' + 1)
 91
 92/*
 93 * These systems have incorrect _PRT entries.  The BIOS claims the PCI
 94 * interrupt at the listed segment/bus/device/pin is connected to the first
 95 * link device, but it is actually connected to the second.
 96 */
 97static const struct prt_quirk prt_quirks[] = {
 98	{ medion_md9580, 0, 0, 9, PCI_INTX_PIN('A'),
 99		"\\_SB_.PCI0.ISA_.LNKA",
100		"\\_SB_.PCI0.ISA_.LNKB"},
101	{ dell_optiplex, 0, 0, 0xd, PCI_INTX_PIN('A'),
102		"\\_SB_.LNKB",
103		"\\_SB_.LNKA"},
104	{ hp_t5710, 0, 0, 1, PCI_INTX_PIN('A'),
105		"\\_SB_.PCI0.LNK1",
106		"\\_SB_.PCI0.LNK3"},
107};
108
109static void do_prt_fixups(struct acpi_prt_entry *entry,
110			  struct acpi_pci_routing_table *prt)
111{
112	int i;
113	const struct prt_quirk *quirk;
114
115	for (i = 0; i < ARRAY_SIZE(prt_quirks); i++) {
116		quirk = &prt_quirks[i];
117
118		/* All current quirks involve link devices, not GSIs */
119		if (dmi_check_system(quirk->system) &&
120		    entry->id.segment == quirk->segment &&
121		    entry->id.bus == quirk->bus &&
122		    entry->id.device == quirk->device &&
123		    entry->pin == quirk->pin &&
124		    !strcmp(prt->source, quirk->source) &&
125		    strlen(prt->source) >= strlen(quirk->actual_source)) {
126			pr_warn("Firmware reports "
127				"%04x:%02x:%02x PCI INT %c connected to %s; "
128				"changing to %s\n",
129				entry->id.segment, entry->id.bus,
130				entry->id.device, pin_name(entry->pin),
131				prt->source, quirk->actual_source);
132			strcpy(prt->source, quirk->actual_source);
133		}
134	}
135}
136
137static int acpi_pci_irq_check_entry(acpi_handle handle, struct pci_dev *dev,
138				  int pin, struct acpi_pci_routing_table *prt,
139				  struct acpi_prt_entry **entry_ptr)
140{
141	int segment = pci_domain_nr(dev->bus);
142	int bus = dev->bus->number;
143	int device = pci_ari_enabled(dev->bus) ? 0 : PCI_SLOT(dev->devfn);
144	struct acpi_prt_entry *entry;
145
146	if (((prt->address >> 16) & 0xffff) != device ||
147	    prt->pin + 1 != pin)
148		return -ENODEV;
149
150	entry = kzalloc(sizeof(struct acpi_prt_entry), GFP_KERNEL);
151	if (!entry)
152		return -ENOMEM;
153
154	/*
155	 * Note that the _PRT uses 0=INTA, 1=INTB, etc, while PCI uses
156	 * 1=INTA, 2=INTB.  We use the PCI encoding throughout, so convert
157	 * it here.
158	 */
159	entry->id.segment = segment;
160	entry->id.bus = bus;
161	entry->id.device = (prt->address >> 16) & 0xFFFF;
162	entry->pin = prt->pin + 1;
163
164	do_prt_fixups(entry, prt);
165
166	entry->index = prt->source_index;
167
168	/*
169	 * Type 1: Dynamic
170	 * ---------------
171	 * The 'source' field specifies the PCI interrupt link device used to
172	 * configure the IRQ assigned to this slot|dev|pin.  The 'source_index'
173	 * indicates which resource descriptor in the resource template (of
174	 * the link device) this interrupt is allocated from.
175	 *
176	 * NOTE: Don't query the Link Device for IRQ information at this time
177	 *       because Link Device enumeration may not have occurred yet
178	 *       (e.g. exists somewhere 'below' this _PRT entry in the ACPI
179	 *       namespace).
180	 */
181	if (prt->source[0])
182		acpi_get_handle(handle, prt->source, &entry->link);
183
184	/*
185	 * Type 2: Static
186	 * --------------
187	 * The 'source' field is NULL, and the 'source_index' field specifies
188	 * the IRQ value, which is hardwired to specific interrupt inputs on
189	 * the interrupt controller.
190	 */
191	pr_debug("%04x:%02x:%02x[%c] -> %s[%u]\n",
192		 entry->id.segment, entry->id.bus, entry->id.device,
193		 pin_name(entry->pin), prt->source, entry->index);
194
195	*entry_ptr = entry;
196
197	return 0;
198}
199
200static int acpi_pci_irq_find_prt_entry(struct pci_dev *dev,
201			  int pin, struct acpi_prt_entry **entry_ptr)
202{
203	acpi_status status;
204	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
205	struct acpi_pci_routing_table *entry;
206	acpi_handle handle = NULL;
207
208	if (dev->bus->bridge)
209		handle = ACPI_HANDLE(dev->bus->bridge);
210
211	if (!handle)
212		return -ENODEV;
213
214	/* 'handle' is the _PRT's parent (root bridge or PCI-PCI bridge) */
215	status = acpi_get_irq_routing_table(handle, &buffer);
216	if (ACPI_FAILURE(status)) {
217		kfree(buffer.pointer);
218		return -ENODEV;
219	}
220
221	entry = buffer.pointer;
222	while (entry && (entry->length > 0)) {
223		if (!acpi_pci_irq_check_entry(handle, dev, pin,
224						 entry, entry_ptr))
225			break;
226		entry = (struct acpi_pci_routing_table *)
227		    ((unsigned long)entry + entry->length);
228	}
229
230	kfree(buffer.pointer);
231	return 0;
232}
233
234/* --------------------------------------------------------------------------
235                          PCI Interrupt Routing Support
236   -------------------------------------------------------------------------- */
237#ifdef CONFIG_X86_IO_APIC
238extern int noioapicquirk;
239extern int noioapicreroute;
240
241static int bridge_has_boot_interrupt_variant(struct pci_bus *bus)
242{
243	struct pci_bus *bus_it;
244
245	for (bus_it = bus ; bus_it ; bus_it = bus_it->parent) {
246		if (!bus_it->self)
247			return 0;
248		if (bus_it->self->irq_reroute_variant)
249			return bus_it->self->irq_reroute_variant;
250	}
251	return 0;
252}
253
254/*
255 * Some chipsets (e.g. Intel 6700PXH) generate a legacy INTx when the IRQ
256 * entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel does
257 * during interrupt handling). When this INTx generation cannot be disabled,
258 * we reroute these interrupts to their legacy equivalent to get rid of
259 * spurious interrupts.
260 */
261static int acpi_reroute_boot_interrupt(struct pci_dev *dev,
262				       struct acpi_prt_entry *entry)
263{
264	if (noioapicquirk || noioapicreroute) {
265		return 0;
266	} else {
267		switch (bridge_has_boot_interrupt_variant(dev->bus)) {
268		case 0:
269			/* no rerouting necessary */
270			return 0;
271		case INTEL_IRQ_REROUTE_VARIANT:
272			/*
273			 * Remap according to INTx routing table in 6700PXH
274			 * specs, intel order number 302628-002, section
275			 * 2.15.2. Other chipsets (80332, ...) have the same
276			 * mapping and are handled here as well.
277			 */
278			dev_info(&dev->dev, "PCI IRQ %d -> rerouted to legacy "
279				 "IRQ %d\n", entry->index,
280				 (entry->index % 4) + 16);
281			entry->index = (entry->index % 4) + 16;
282			return 1;
283		default:
284			dev_warn(&dev->dev, "Cannot reroute IRQ %d to legacy "
285				 "IRQ: unknown mapping\n", entry->index);
286			return -1;
287		}
288	}
289}
290#endif /* CONFIG_X86_IO_APIC */
291
292struct acpi_prt_entry *acpi_pci_irq_lookup(struct pci_dev *dev, int pin)
293{
294	struct acpi_prt_entry *entry = NULL;
295	struct pci_dev *bridge;
296	u8 bridge_pin, orig_pin = pin;
297	int ret;
298
299	ret = acpi_pci_irq_find_prt_entry(dev, pin, &entry);
300	if (!ret && entry) {
301#ifdef CONFIG_X86_IO_APIC
302		acpi_reroute_boot_interrupt(dev, entry);
303#endif /* CONFIG_X86_IO_APIC */
304		dev_dbg(&dev->dev, "Found [%c] _PRT entry\n", pin_name(pin));
305		return entry;
306	}
307
308	/*
309	 * Attempt to derive an IRQ for this device from a parent bridge's
310	 * PCI interrupt routing entry (eg. yenta bridge and add-in card bridge).
311	 */
312	bridge = dev->bus->self;
313	while (bridge) {
314		pin = pci_swizzle_interrupt_pin(dev, pin);
315
316		if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) {
317			/* PC card has the same IRQ as its cardbridge */
318			bridge_pin = bridge->pin;
319			if (!bridge_pin) {
320				dev_dbg(&bridge->dev, "No interrupt pin configured\n");
321				return NULL;
322			}
323			pin = bridge_pin;
324		}
325
326		ret = acpi_pci_irq_find_prt_entry(bridge, pin, &entry);
327		if (!ret && entry) {
328			dev_dbg(&dev->dev, "Derived GSI INT %c from %s\n",
329				pin_name(orig_pin), pci_name(bridge));
330			return entry;
331		}
332
333		dev = bridge;
334		bridge = dev->bus->self;
335	}
336
337	dev_warn(&dev->dev, "can't derive routing for PCI INT %c\n",
338		 pin_name(orig_pin));
339	return NULL;
340}
341
342#if IS_ENABLED(CONFIG_ISA) || IS_ENABLED(CONFIG_EISA)
343static int acpi_isa_register_gsi(struct pci_dev *dev)
344{
345	u32 dev_gsi;
346
347	/* Interrupt Line values above 0xF are forbidden */
348	if (dev->irq > 0 && (dev->irq <= 0xF) &&
349	    acpi_isa_irq_available(dev->irq) &&
350	    (acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
351		dev_warn(&dev->dev, "PCI INT %c: no GSI - using ISA IRQ %d\n",
352			 pin_name(dev->pin), dev->irq);
353		acpi_register_gsi(&dev->dev, dev_gsi,
354				  ACPI_LEVEL_SENSITIVE,
355				  ACPI_ACTIVE_LOW);
356		return 0;
357	}
358	return -EINVAL;
359}
360#else
361static inline int acpi_isa_register_gsi(struct pci_dev *dev)
362{
363	return -ENODEV;
364}
365#endif
366
367static inline bool acpi_pci_irq_valid(struct pci_dev *dev, u8 pin)
368{
369#ifdef CONFIG_X86
370	/*
371	 * On x86 irq line 0xff means "unknown" or "no connection"
372	 * (PCI 3.0, Section 6.2.4, footnote on page 223).
373	 */
374	if (dev->irq == 0xff) {
375		dev->irq = IRQ_NOTCONNECTED;
376		dev_warn(&dev->dev, "PCI INT %c: not connected\n",
377			 pin_name(pin));
378		return false;
379	}
380#endif
381	return true;
382}
383
384int acpi_pci_irq_enable(struct pci_dev *dev)
385{
386	struct acpi_prt_entry *entry;
387	u32 gsi;
388	u8 pin;
389	int triggering = ACPI_LEVEL_SENSITIVE;
390	/*
391	 * On ARM systems with the GIC interrupt model, or LoongArch
392	 * systems with the LPIC interrupt model, level interrupts
393	 * are always polarity high by specification; PCI legacy
394	 * IRQs lines are inverted before reaching the interrupt
395	 * controller and must therefore be considered active high
396	 * as default.
397	 */
398	int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
399		       acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
400				      ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
401	char *link = NULL;
402	char link_desc[16];
403	int rc;
404
405	pin = dev->pin;
406	if (!pin) {
407		dev_dbg(&dev->dev, "No interrupt pin configured\n");
408		return 0;
409	}
410
411	if (dev->irq_managed && dev->irq > 0)
412		return 0;
413
414	entry = acpi_pci_irq_lookup(dev, pin);
415	if (!entry) {
416		/*
417		 * IDE legacy mode controller IRQs are magic. Why do compat
418		 * extensions always make such a nasty mess.
419		 */
420		if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE &&
421				(dev->class & 0x05) == 0)
422			return 0;
423	}
424
425	rc = -ENODEV;
426
427	if (entry) {
428		if (entry->link)
429			rc = acpi_pci_link_allocate_irq(entry->link,
430							 entry->index,
431							 &triggering, &polarity,
432							 &link, &gsi);
433		else {
434			gsi = entry->index;
435			rc = 0;
436		}
437	}
438
439	if (rc < 0) {
440		/*
441		 * No IRQ known to the ACPI subsystem - maybe the BIOS /
442		 * driver reported one, then use it. Exit in any case.
443		 */
444		if (!acpi_pci_irq_valid(dev, pin)) {
445			kfree(entry);
446			return 0;
447		}
448
449		if (acpi_isa_register_gsi(dev))
450			dev_warn(&dev->dev, "PCI INT %c: no GSI\n",
451				 pin_name(pin));
452
453		kfree(entry);
454		return 0;
455	}
456
457	rc = acpi_register_gsi(&dev->dev, gsi, triggering, polarity);
458	if (rc < 0) {
459		dev_warn(&dev->dev, "PCI INT %c: failed to register GSI\n",
460			 pin_name(pin));
461		kfree(entry);
462		return rc;
463	}
464	dev->irq = rc;
465	dev->irq_managed = 1;
466
467	if (link)
468		snprintf(link_desc, sizeof(link_desc), " -> Link[%s]", link);
469	else
470		link_desc[0] = '\0';
471
472	dev_dbg(&dev->dev, "PCI INT %c%s -> GSI %u (%s, %s) -> IRQ %d\n",
473		pin_name(pin), link_desc, gsi,
474		(triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
475		str_low_high(polarity == ACPI_ACTIVE_LOW), dev->irq);
476
477	kfree(entry);
478	return 0;
479}
480
481void acpi_pci_irq_disable(struct pci_dev *dev)
482{
483	struct acpi_prt_entry *entry;
484	int gsi;
485	u8 pin;
486
487	pin = dev->pin;
488	if (!pin || !dev->irq_managed || dev->irq <= 0)
489		return;
490
491	/* Keep IOAPIC pin configuration when suspending */
492	if (dev->dev.power.is_prepared)
493		return;
494#ifdef	CONFIG_PM
495	if (dev->dev.power.runtime_status == RPM_SUSPENDING)
496		return;
497#endif
498
499	entry = acpi_pci_irq_lookup(dev, pin);
500	if (!entry)
501		return;
502
503	if (entry->link)
504		gsi = acpi_pci_link_free_irq(entry->link);
505	else
506		gsi = entry->index;
507
508	kfree(entry);
509
510	/*
511	 * TBD: It might be worth clearing dev->irq by magic constant
512	 * (e.g. PCI_UNDEFINED_IRQ).
513	 */
514
515	dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
516	if (gsi >= 0) {
517		acpi_unregister_gsi(gsi);
518		dev->irq_managed = 0;
519	}
520}