iort.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) 2016, Semihalf
   4 *	Author: Tomasz Nowicki <tn@semihalf.com>
   5 *
   6 * This file implements early detection/parsing of I/O mapping
   7 * reported to OS through firmware via I/O Remapping Table (IORT)
   8 * IORT document number: ARM DEN 0049A
   9 */
  10
  11#define pr_fmt(fmt)	"ACPI: IORT: " fmt
  12
  13#include <linux/acpi_iort.h>
  14#include <linux/bitfield.h>
  15#include <linux/iommu.h>
  16#include <linux/kernel.h>
  17#include <linux/list.h>
  18#include <linux/pci.h>
  19#include <linux/platform_device.h>
  20#include <linux/slab.h>
  21#include <linux/dma-map-ops.h>
  22#include "init.h"
  23
  24#define IORT_TYPE_MASK(type)	(1 << (type))
  25#define IORT_MSI_TYPE		(1 << ACPI_IORT_NODE_ITS_GROUP)
  26#define IORT_IOMMU_TYPE		((1 << ACPI_IORT_NODE_SMMU) |	\
  27				(1 << ACPI_IORT_NODE_SMMU_V3))
  28
  29struct iort_its_msi_chip {
  30	struct list_head	list;
  31	struct fwnode_handle	*fw_node;
  32	phys_addr_t		base_addr;
  33	u32			translation_id;
  34};
  35
  36struct iort_fwnode {
  37	struct list_head list;
  38	struct acpi_iort_node *iort_node;
  39	struct fwnode_handle *fwnode;
  40};
  41static LIST_HEAD(iort_fwnode_list);
  42static DEFINE_SPINLOCK(iort_fwnode_lock);
  43
  44/**
  45 * iort_set_fwnode() - Create iort_fwnode and use it to register
  46 *		       iommu data in the iort_fwnode_list
  47 *
  48 * @iort_node: IORT table node associated with the IOMMU
  49 * @fwnode: fwnode associated with the IORT node
  50 *
  51 * Returns: 0 on success
  52 *          <0 on failure
  53 */
  54static inline int iort_set_fwnode(struct acpi_iort_node *iort_node,
  55				  struct fwnode_handle *fwnode)
  56{
  57	struct iort_fwnode *np;
  58
  59	np = kzalloc(sizeof(struct iort_fwnode), GFP_ATOMIC);
  60
  61	if (WARN_ON(!np))
  62		return -ENOMEM;
  63
  64	INIT_LIST_HEAD(&np->list);
  65	np->iort_node = iort_node;
  66	np->fwnode = fwnode;
  67
  68	spin_lock(&iort_fwnode_lock);
  69	list_add_tail(&np->list, &iort_fwnode_list);
  70	spin_unlock(&iort_fwnode_lock);
  71
  72	return 0;
  73}
  74
  75/**
  76 * iort_get_fwnode() - Retrieve fwnode associated with an IORT node
  77 *
  78 * @node: IORT table node to be looked-up
  79 *
  80 * Returns: fwnode_handle pointer on success, NULL on failure
  81 */
  82static inline struct fwnode_handle *iort_get_fwnode(
  83			struct acpi_iort_node *node)
  84{
  85	struct iort_fwnode *curr;
  86	struct fwnode_handle *fwnode = NULL;
  87
  88	spin_lock(&iort_fwnode_lock);
  89	list_for_each_entry(curr, &iort_fwnode_list, list) {
  90		if (curr->iort_node == node) {
  91			fwnode = curr->fwnode;
  92			break;
  93		}
  94	}
  95	spin_unlock(&iort_fwnode_lock);
  96
  97	return fwnode;
  98}
  99
 100/**
 101 * iort_delete_fwnode() - Delete fwnode associated with an IORT node
 102 *
 103 * @node: IORT table node associated with fwnode to delete
 104 */
 105static inline void iort_delete_fwnode(struct acpi_iort_node *node)
 106{
 107	struct iort_fwnode *curr, *tmp;
 108
 109	spin_lock(&iort_fwnode_lock);
 110	list_for_each_entry_safe(curr, tmp, &iort_fwnode_list, list) {
 111		if (curr->iort_node == node) {
 112			list_del(&curr->list);
 113			kfree(curr);
 114			break;
 115		}
 116	}
 117	spin_unlock(&iort_fwnode_lock);
 118}
 119
 120/**
 121 * iort_get_iort_node() - Retrieve iort_node associated with an fwnode
 122 *
 123 * @fwnode: fwnode associated with device to be looked-up
 124 *
 125 * Returns: iort_node pointer on success, NULL on failure
 126 */
 127static inline struct acpi_iort_node *iort_get_iort_node(
 128			struct fwnode_handle *fwnode)
 129{
 130	struct iort_fwnode *curr;
 131	struct acpi_iort_node *iort_node = NULL;
 132
 133	spin_lock(&iort_fwnode_lock);
 134	list_for_each_entry(curr, &iort_fwnode_list, list) {
 135		if (curr->fwnode == fwnode) {
 136			iort_node = curr->iort_node;
 137			break;
 138		}
 139	}
 140	spin_unlock(&iort_fwnode_lock);
 141
 142	return iort_node;
 143}
 144
 145typedef acpi_status (*iort_find_node_callback)
 146	(struct acpi_iort_node *node, void *context);
 147
 148/* Root pointer to the mapped IORT table */
 149static struct acpi_table_header *iort_table;
 150
 151static LIST_HEAD(iort_msi_chip_list);
 152static DEFINE_SPINLOCK(iort_msi_chip_lock);
 153
 154/**
 155 * iort_register_domain_token() - register domain token along with related
 156 * ITS ID and base address to the list from where we can get it back later on.
 157 * @trans_id: ITS ID.
 158 * @base: ITS base address.
 159 * @fw_node: Domain token.
 160 *
 161 * Returns: 0 on success, -ENOMEM if no memory when allocating list element
 162 */
 163int iort_register_domain_token(int trans_id, phys_addr_t base,
 164			       struct fwnode_handle *fw_node)
 165{
 166	struct iort_its_msi_chip *its_msi_chip;
 167
 168	its_msi_chip = kzalloc(sizeof(*its_msi_chip), GFP_KERNEL);
 169	if (!its_msi_chip)
 170		return -ENOMEM;
 171
 172	its_msi_chip->fw_node = fw_node;
 173	its_msi_chip->translation_id = trans_id;
 174	its_msi_chip->base_addr = base;
 175
 176	spin_lock(&iort_msi_chip_lock);
 177	list_add(&its_msi_chip->list, &iort_msi_chip_list);
 178	spin_unlock(&iort_msi_chip_lock);
 179
 180	return 0;
 181}
 182
 183/**
 184 * iort_deregister_domain_token() - Deregister domain token based on ITS ID
 185 * @trans_id: ITS ID.
 186 *
 187 * Returns: none.
 188 */
 189void iort_deregister_domain_token(int trans_id)
 190{
 191	struct iort_its_msi_chip *its_msi_chip, *t;
 192
 193	spin_lock(&iort_msi_chip_lock);
 194	list_for_each_entry_safe(its_msi_chip, t, &iort_msi_chip_list, list) {
 195		if (its_msi_chip->translation_id == trans_id) {
 196			list_del(&its_msi_chip->list);
 197			kfree(its_msi_chip);
 198			break;
 199		}
 200	}
 201	spin_unlock(&iort_msi_chip_lock);
 202}
 203
 204/**
 205 * iort_find_domain_token() - Find domain token based on given ITS ID
 206 * @trans_id: ITS ID.
 207 *
 208 * Returns: domain token when find on the list, NULL otherwise
 209 */
 210struct fwnode_handle *iort_find_domain_token(int trans_id)
 211{
 212	struct fwnode_handle *fw_node = NULL;
 213	struct iort_its_msi_chip *its_msi_chip;
 214
 215	spin_lock(&iort_msi_chip_lock);
 216	list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) {
 217		if (its_msi_chip->translation_id == trans_id) {
 218			fw_node = its_msi_chip->fw_node;
 219			break;
 220		}
 221	}
 222	spin_unlock(&iort_msi_chip_lock);
 223
 224	return fw_node;
 225}
 226
 227static struct acpi_iort_node *iort_scan_node(enum acpi_iort_node_type type,
 228					     iort_find_node_callback callback,
 229					     void *context)
 230{
 231	struct acpi_iort_node *iort_node, *iort_end;
 232	struct acpi_table_iort *iort;
 233	int i;
 234
 235	if (!iort_table)
 236		return NULL;
 237
 238	/* Get the first IORT node */
 239	iort = (struct acpi_table_iort *)iort_table;
 240	iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
 241				 iort->node_offset);
 242	iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
 243				iort_table->length);
 244
 245	for (i = 0; i < iort->node_count; i++) {
 246		if (WARN_TAINT(iort_node >= iort_end, TAINT_FIRMWARE_WORKAROUND,
 247			       "IORT node pointer overflows, bad table!\n"))
 248			return NULL;
 249
 250		if (iort_node->type == type &&
 251		    ACPI_SUCCESS(callback(iort_node, context)))
 252			return iort_node;
 253
 254		iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
 255					 iort_node->length);
 256	}
 257
 258	return NULL;
 259}
 260
 261static acpi_status iort_match_node_callback(struct acpi_iort_node *node,
 262					    void *context)
 263{
 264	struct device *dev = context;
 265	acpi_status status = AE_NOT_FOUND;
 266
 267	if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT) {
 268		struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
 269		struct acpi_device *adev;
 270		struct acpi_iort_named_component *ncomp;
 271		struct device *nc_dev = dev;
 272
 273		/*
 274		 * Walk the device tree to find a device with an
 275		 * ACPI companion; there is no point in scanning
 276		 * IORT for a device matching a named component if
 277		 * the device does not have an ACPI companion to
 278		 * start with.
 279		 */
 280		do {
 281			adev = ACPI_COMPANION(nc_dev);
 282			if (adev)
 283				break;
 284
 285			nc_dev = nc_dev->parent;
 286		} while (nc_dev);
 287
 288		if (!adev)
 289			goto out;
 290
 291		status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, &buf);
 292		if (ACPI_FAILURE(status)) {
 293			dev_warn(nc_dev, "Can't get device full path name\n");
 294			goto out;
 295		}
 296
 297		ncomp = (struct acpi_iort_named_component *)node->node_data;
 298		status = !strcmp(ncomp->device_name, buf.pointer) ?
 299							AE_OK : AE_NOT_FOUND;
 300		acpi_os_free(buf.pointer);
 301	} else if (node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
 302		struct acpi_iort_root_complex *pci_rc;
 303		struct pci_bus *bus;
 304
 305		bus = to_pci_bus(dev);
 306		pci_rc = (struct acpi_iort_root_complex *)node->node_data;
 307
 308		/*
 309		 * It is assumed that PCI segment numbers maps one-to-one
 310		 * with root complexes. Each segment number can represent only
 311		 * one root complex.
 312		 */
 313		status = pci_rc->pci_segment_number == pci_domain_nr(bus) ?
 314							AE_OK : AE_NOT_FOUND;
 315	}
 316out:
 317	return status;
 318}
 319
 320static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
 321		       u32 *rid_out, bool check_overlap)
 322{
 323	/* Single mapping does not care for input id */
 324	if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
 325		if (type == ACPI_IORT_NODE_NAMED_COMPONENT ||
 326		    type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
 327			*rid_out = map->output_base;
 328			return 0;
 329		}
 330
 331		pr_warn(FW_BUG "[map %p] SINGLE MAPPING flag not allowed for node type %d, skipping ID map\n",
 332			map, type);
 333		return -ENXIO;
 334	}
 335
 336	if (rid_in < map->input_base ||
 337	    (rid_in > map->input_base + map->id_count))
 338		return -ENXIO;
 339
 340	if (check_overlap) {
 341		/*
 342		 * We already found a mapping for this input ID at the end of
 343		 * another region. If it coincides with the start of this
 344		 * region, we assume the prior match was due to the off-by-1
 345		 * issue mentioned below, and allow it to be superseded.
 346		 * Otherwise, things are *really* broken, and we just disregard
 347		 * duplicate matches entirely to retain compatibility.
 348		 */
 349		pr_err(FW_BUG "[map %p] conflicting mapping for input ID 0x%x\n",
 350		       map, rid_in);
 351		if (rid_in != map->input_base)
 352			return -ENXIO;
 353
 354		pr_err(FW_BUG "applying workaround.\n");
 355	}
 356
 357	*rid_out = map->output_base + (rid_in - map->input_base);
 358
 359	/*
 360	 * Due to confusion regarding the meaning of the id_count field (which
 361	 * carries the number of IDs *minus 1*), we may have to disregard this
 362	 * match if it is at the end of the range, and overlaps with the start
 363	 * of another one.
 364	 */
 365	if (map->id_count > 0 && rid_in == map->input_base + map->id_count)
 366		return -EAGAIN;
 367	return 0;
 368}
 369
 370static struct acpi_iort_node *iort_node_get_id(struct acpi_iort_node *node,
 371					       u32 *id_out, int index)
 372{
 373	struct acpi_iort_node *parent;
 374	struct acpi_iort_id_mapping *map;
 375
 376	if (!node->mapping_offset || !node->mapping_count ||
 377				     index >= node->mapping_count)
 378		return NULL;
 379
 380	map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
 381			   node->mapping_offset + index * sizeof(*map));
 382
 383	/* Firmware bug! */
 384	if (!map->output_reference) {
 385		pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
 386		       node, node->type);
 387		return NULL;
 388	}
 389
 390	parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
 391			       map->output_reference);
 392
 393	if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
 394		if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
 395		    node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX ||
 396		    node->type == ACPI_IORT_NODE_SMMU_V3 ||
 397		    node->type == ACPI_IORT_NODE_PMCG) {
 398			*id_out = map->output_base;
 399			return parent;
 400		}
 401	}
 402
 403	return NULL;
 404}
 405
 406#ifndef ACPI_IORT_SMMU_V3_DEVICEID_VALID
 407#define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1 << 4)
 408#endif
 409
 410static int iort_get_id_mapping_index(struct acpi_iort_node *node)
 411{
 412	struct acpi_iort_smmu_v3 *smmu;
 413	struct acpi_iort_pmcg *pmcg;
 414
 415	switch (node->type) {
 416	case ACPI_IORT_NODE_SMMU_V3:
 417		/*
 418		 * SMMUv3 dev ID mapping index was introduced in revision 1
 419		 * table, not available in revision 0
 420		 */
 421		if (node->revision < 1)
 422			return -EINVAL;
 423
 424		smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
 425		/*
 426		 * Until IORT E.e (node rev. 5), the ID mapping index was
 427		 * defined to be valid unless all interrupts are GSIV-based.
 428		 */
 429		if (node->revision < 5) {
 430			if (smmu->event_gsiv && smmu->pri_gsiv &&
 431			    smmu->gerr_gsiv && smmu->sync_gsiv)
 432				return -EINVAL;
 433		} else if (!(smmu->flags & ACPI_IORT_SMMU_V3_DEVICEID_VALID)) {
 434			return -EINVAL;
 435		}
 436
 437		if (smmu->id_mapping_index >= node->mapping_count) {
 438			pr_err(FW_BUG "[node %p type %d] ID mapping index overflows valid mappings\n",
 439			       node, node->type);
 440			return -EINVAL;
 441		}
 442
 443		return smmu->id_mapping_index;
 444	case ACPI_IORT_NODE_PMCG:
 445		pmcg = (struct acpi_iort_pmcg *)node->node_data;
 446		if (pmcg->overflow_gsiv || node->mapping_count == 0)
 447			return -EINVAL;
 448
 449		return 0;
 450	default:
 451		return -EINVAL;
 452	}
 453}
 454
 455static struct acpi_iort_node *iort_node_map_id(struct acpi_iort_node *node,
 456					       u32 id_in, u32 *id_out,
 457					       u8 type_mask)
 458{
 459	u32 id = id_in;
 460
 461	/* Parse the ID mapping tree to find specified node type */
 462	while (node) {
 463		struct acpi_iort_id_mapping *map;
 464		int i, index, rc = 0;
 465		u32 out_ref = 0, map_id = id;
 466
 467		if (IORT_TYPE_MASK(node->type) & type_mask) {
 468			if (id_out)
 469				*id_out = id;
 470			return node;
 471		}
 472
 473		if (!node->mapping_offset || !node->mapping_count)
 474			goto fail_map;
 475
 476		map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
 477				   node->mapping_offset);
 478
 479		/* Firmware bug! */
 480		if (!map->output_reference) {
 481			pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
 482			       node, node->type);
 483			goto fail_map;
 484		}
 485
 486		/*
 487		 * Get the special ID mapping index (if any) and skip its
 488		 * associated ID map to prevent erroneous multi-stage
 489		 * IORT ID translations.
 490		 */
 491		index = iort_get_id_mapping_index(node);
 492
 493		/* Do the ID translation */
 494		for (i = 0; i < node->mapping_count; i++, map++) {
 495			/* if it is special mapping index, skip it */
 496			if (i == index)
 497				continue;
 498
 499			rc = iort_id_map(map, node->type, map_id, &id, out_ref);
 500			if (!rc)
 501				break;
 502			if (rc == -EAGAIN)
 503				out_ref = map->output_reference;
 504		}
 505
 506		if (i == node->mapping_count && !out_ref)
 507			goto fail_map;
 508
 509		node = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
 510				    rc ? out_ref : map->output_reference);
 511	}
 512
 513fail_map:
 514	/* Map input ID to output ID unchanged on mapping failure */
 515	if (id_out)
 516		*id_out = id_in;
 517
 518	return NULL;
 519}
 520
 521static struct acpi_iort_node *iort_node_map_platform_id(
 522		struct acpi_iort_node *node, u32 *id_out, u8 type_mask,
 523		int index)
 524{
 525	struct acpi_iort_node *parent;
 526	u32 id;
 527
 528	/* step 1: retrieve the initial dev id */
 529	parent = iort_node_get_id(node, &id, index);
 530	if (!parent)
 531		return NULL;
 532
 533	/*
 534	 * optional step 2: map the initial dev id if its parent is not
 535	 * the target type we want, map it again for the use cases such
 536	 * as NC (named component) -> SMMU -> ITS. If the type is matched,
 537	 * return the initial dev id and its parent pointer directly.
 538	 */
 539	if (!(IORT_TYPE_MASK(parent->type) & type_mask))
 540		parent = iort_node_map_id(parent, id, id_out, type_mask);
 541	else
 542		if (id_out)
 543			*id_out = id;
 544
 545	return parent;
 546}
 547
 548static struct acpi_iort_node *iort_find_dev_node(struct device *dev)
 549{
 550	struct pci_bus *pbus;
 551
 552	if (!dev_is_pci(dev)) {
 553		struct acpi_iort_node *node;
 554		/*
 555		 * scan iort_fwnode_list to see if it's an iort platform
 556		 * device (such as SMMU, PMCG),its iort node already cached
 557		 * and associated with fwnode when iort platform devices
 558		 * were initialized.
 559		 */
 560		node = iort_get_iort_node(dev->fwnode);
 561		if (node)
 562			return node;
 563		/*
 564		 * if not, then it should be a platform device defined in
 565		 * DSDT/SSDT (with Named Component node in IORT)
 566		 */
 567		return iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
 568				      iort_match_node_callback, dev);
 569	}
 570
 571	pbus = to_pci_dev(dev)->bus;
 572
 573	return iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
 574			      iort_match_node_callback, &pbus->dev);
 575}
 576
 577/**
 578 * iort_msi_map_id() - Map a MSI input ID for a device
 579 * @dev: The device for which the mapping is to be done.
 580 * @input_id: The device input ID.
 581 *
 582 * Returns: mapped MSI ID on success, input ID otherwise
 583 */
 584u32 iort_msi_map_id(struct device *dev, u32 input_id)
 585{
 586	struct acpi_iort_node *node;
 587	u32 dev_id;
 588
 589	node = iort_find_dev_node(dev);
 590	if (!node)
 591		return input_id;
 592
 593	iort_node_map_id(node, input_id, &dev_id, IORT_MSI_TYPE);
 594	return dev_id;
 595}
 596
 597/**
 598 * iort_pmsi_get_dev_id() - Get the device id for a device
 599 * @dev: The device for which the mapping is to be done.
 600 * @dev_id: The device ID found.
 601 *
 602 * Returns: 0 for successful find a dev id, -ENODEV on error
 603 */
 604int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
 605{
 606	int i, index;
 607	struct acpi_iort_node *node;
 608
 609	node = iort_find_dev_node(dev);
 610	if (!node)
 611		return -ENODEV;
 612
 613	index = iort_get_id_mapping_index(node);
 614	/* if there is a valid index, go get the dev_id directly */
 615	if (index >= 0) {
 616		if (iort_node_get_id(node, dev_id, index))
 617			return 0;
 618	} else {
 619		for (i = 0; i < node->mapping_count; i++) {
 620			if (iort_node_map_platform_id(node, dev_id,
 621						      IORT_MSI_TYPE, i))
 622				return 0;
 623		}
 624	}
 625
 626	return -ENODEV;
 627}
 628
 629static int __maybe_unused iort_find_its_base(u32 its_id, phys_addr_t *base)
 630{
 631	struct iort_its_msi_chip *its_msi_chip;
 632	int ret = -ENODEV;
 633
 634	spin_lock(&iort_msi_chip_lock);
 635	list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) {
 636		if (its_msi_chip->translation_id == its_id) {
 637			*base = its_msi_chip->base_addr;
 638			ret = 0;
 639			break;
 640		}
 641	}
 642	spin_unlock(&iort_msi_chip_lock);
 643
 644	return ret;
 645}
 646
 647/**
 648 * iort_dev_find_its_id() - Find the ITS identifier for a device
 649 * @dev: The device.
 650 * @id: Device's ID
 651 * @idx: Index of the ITS identifier list.
 652 * @its_id: ITS identifier.
 653 *
 654 * Returns: 0 on success, appropriate error value otherwise
 655 */
 656static int iort_dev_find_its_id(struct device *dev, u32 id,
 657				unsigned int idx, int *its_id)
 658{
 659	struct acpi_iort_its_group *its;
 660	struct acpi_iort_node *node;
 661
 662	node = iort_find_dev_node(dev);
 663	if (!node)
 664		return -ENXIO;
 665
 666	node = iort_node_map_id(node, id, NULL, IORT_MSI_TYPE);
 667	if (!node)
 668		return -ENXIO;
 669
 670	/* Move to ITS specific data */
 671	its = (struct acpi_iort_its_group *)node->node_data;
 672	if (idx >= its->its_count) {
 673		dev_err(dev, "requested ITS ID index [%d] overruns ITS entries [%d]\n",
 674			idx, its->its_count);
 675		return -ENXIO;
 676	}
 677
 678	*its_id = its->identifiers[idx];
 679	return 0;
 680}
 681
 682/**
 683 * iort_get_device_domain() - Find MSI domain related to a device
 684 * @dev: The device.
 685 * @id: Requester ID for the device.
 686 * @bus_token: irq domain bus token.
 687 *
 688 * Returns: the MSI domain for this device, NULL otherwise
 689 */
 690struct irq_domain *iort_get_device_domain(struct device *dev, u32 id,
 691					  enum irq_domain_bus_token bus_token)
 692{
 693	struct fwnode_handle *handle;
 694	int its_id;
 695
 696	if (iort_dev_find_its_id(dev, id, 0, &its_id))
 697		return NULL;
 698
 699	handle = iort_find_domain_token(its_id);
 700	if (!handle)
 701		return NULL;
 702
 703	return irq_find_matching_fwnode(handle, bus_token);
 704}
 705
 706static void iort_set_device_domain(struct device *dev,
 707				   struct acpi_iort_node *node)
 708{
 709	struct acpi_iort_its_group *its;
 710	struct acpi_iort_node *msi_parent;
 711	struct acpi_iort_id_mapping *map;
 712	struct fwnode_handle *iort_fwnode;
 713	struct irq_domain *domain;
 714	int index;
 715
 716	index = iort_get_id_mapping_index(node);
 717	if (index < 0)
 718		return;
 719
 720	map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
 721			   node->mapping_offset + index * sizeof(*map));
 722
 723	/* Firmware bug! */
 724	if (!map->output_reference ||
 725	    !(map->flags & ACPI_IORT_ID_SINGLE_MAPPING)) {
 726		pr_err(FW_BUG "[node %p type %d] Invalid MSI mapping\n",
 727		       node, node->type);
 728		return;
 729	}
 730
 731	msi_parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
 732				  map->output_reference);
 733
 734	if (!msi_parent || msi_parent->type != ACPI_IORT_NODE_ITS_GROUP)
 735		return;
 736
 737	/* Move to ITS specific data */
 738	its = (struct acpi_iort_its_group *)msi_parent->node_data;
 739
 740	iort_fwnode = iort_find_domain_token(its->identifiers[0]);
 741	if (!iort_fwnode)
 742		return;
 743
 744	domain = irq_find_matching_fwnode(iort_fwnode, DOMAIN_BUS_PLATFORM_MSI);
 745	if (domain)
 746		dev_set_msi_domain(dev, domain);
 747}
 748
 749/**
 750 * iort_get_platform_device_domain() - Find MSI domain related to a
 751 * platform device
 752 * @dev: the dev pointer associated with the platform device
 753 *
 754 * Returns: the MSI domain for this device, NULL otherwise
 755 */
 756static struct irq_domain *iort_get_platform_device_domain(struct device *dev)
 757{
 758	struct acpi_iort_node *node, *msi_parent = NULL;
 759	struct fwnode_handle *iort_fwnode;
 760	struct acpi_iort_its_group *its;
 761	int i;
 762
 763	/* find its associated iort node */
 764	node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
 765			      iort_match_node_callback, dev);
 766	if (!node)
 767		return NULL;
 768
 769	/* then find its msi parent node */
 770	for (i = 0; i < node->mapping_count; i++) {
 771		msi_parent = iort_node_map_platform_id(node, NULL,
 772						       IORT_MSI_TYPE, i);
 773		if (msi_parent)
 774			break;
 775	}
 776
 777	if (!msi_parent)
 778		return NULL;
 779
 780	/* Move to ITS specific data */
 781	its = (struct acpi_iort_its_group *)msi_parent->node_data;
 782
 783	iort_fwnode = iort_find_domain_token(its->identifiers[0]);
 784	if (!iort_fwnode)
 785		return NULL;
 786
 787	return irq_find_matching_fwnode(iort_fwnode, DOMAIN_BUS_PLATFORM_MSI);
 788}
 789
 790void acpi_configure_pmsi_domain(struct device *dev)
 791{
 792	struct irq_domain *msi_domain;
 793
 794	msi_domain = iort_get_platform_device_domain(dev);
 795	if (msi_domain)
 796		dev_set_msi_domain(dev, msi_domain);
 797}
 798
 799#ifdef CONFIG_IOMMU_API
 800static void iort_rmr_free(struct device *dev,
 801			  struct iommu_resv_region *region)
 802{
 803	struct iommu_iort_rmr_data *rmr_data;
 804
 805	rmr_data = container_of(region, struct iommu_iort_rmr_data, rr);
 806	kfree(rmr_data->sids);
 807	kfree(rmr_data);
 808}
 809
 810static struct iommu_iort_rmr_data *iort_rmr_alloc(
 811					struct acpi_iort_rmr_desc *rmr_desc,
 812					int prot, enum iommu_resv_type type,
 813					u32 *sids, u32 num_sids)
 814{
 815	struct iommu_iort_rmr_data *rmr_data;
 816	struct iommu_resv_region *region;
 817	u32 *sids_copy;
 818	u64 addr = rmr_desc->base_address, size = rmr_desc->length;
 819
 820	rmr_data = kmalloc(sizeof(*rmr_data), GFP_KERNEL);
 821	if (!rmr_data)
 822		return NULL;
 823
 824	/* Create a copy of SIDs array to associate with this rmr_data */
 825	sids_copy = kmemdup_array(sids, num_sids, sizeof(*sids), GFP_KERNEL);
 826	if (!sids_copy) {
 827		kfree(rmr_data);
 828		return NULL;
 829	}
 830	rmr_data->sids = sids_copy;
 831	rmr_data->num_sids = num_sids;
 832
 833	if (!IS_ALIGNED(addr, SZ_64K) || !IS_ALIGNED(size, SZ_64K)) {
 834		/* PAGE align base addr and size */
 835		addr &= PAGE_MASK;
 836		size = PAGE_ALIGN(size + offset_in_page(rmr_desc->base_address));
 837
 838		pr_err(FW_BUG "RMR descriptor[0x%llx - 0x%llx] not aligned to 64K, continue with [0x%llx - 0x%llx]\n",
 839		       rmr_desc->base_address,
 840		       rmr_desc->base_address + rmr_desc->length - 1,
 841		       addr, addr + size - 1);
 842	}
 843
 844	region = &rmr_data->rr;
 845	INIT_LIST_HEAD(&region->list);
 846	region->start = addr;
 847	region->length = size;
 848	region->prot = prot;
 849	region->type = type;
 850	region->free = iort_rmr_free;
 851
 852	return rmr_data;
 853}
 854
 855static void iort_rmr_desc_check_overlap(struct acpi_iort_rmr_desc *desc,
 856					u32 count)
 857{
 858	int i, j;
 859
 860	for (i = 0; i < count; i++) {
 861		u64 end, start = desc[i].base_address, length = desc[i].length;
 862
 863		if (!length) {
 864			pr_err(FW_BUG "RMR descriptor[0x%llx] with zero length, continue anyway\n",
 865			       start);
 866			continue;
 867		}
 868
 869		end = start + length - 1;
 870
 871		/* Check for address overlap */
 872		for (j = i + 1; j < count; j++) {
 873			u64 e_start = desc[j].base_address;
 874			u64 e_end = e_start + desc[j].length - 1;
 875
 876			if (start <= e_end && end >= e_start)
 877				pr_err(FW_BUG "RMR descriptor[0x%llx - 0x%llx] overlaps, continue anyway\n",
 878				       start, end);
 879		}
 880	}
 881}
 882
 883/*
 884 * Please note, we will keep the already allocated RMR reserve
 885 * regions in case of a memory allocation failure.
 886 */
 887static void iort_get_rmrs(struct acpi_iort_node *node,
 888			  struct acpi_iort_node *smmu,
 889			  u32 *sids, u32 num_sids,
 890			  struct list_head *head)
 891{
 892	struct acpi_iort_rmr *rmr = (struct acpi_iort_rmr *)node->node_data;
 893	struct acpi_iort_rmr_desc *rmr_desc;
 894	int i;
 895
 896	rmr_desc = ACPI_ADD_PTR(struct acpi_iort_rmr_desc, node,
 897				rmr->rmr_offset);
 898
 899	iort_rmr_desc_check_overlap(rmr_desc, rmr->rmr_count);
 900
 901	for (i = 0; i < rmr->rmr_count; i++, rmr_desc++) {
 902		struct iommu_iort_rmr_data *rmr_data;
 903		enum iommu_resv_type type;
 904		int prot = IOMMU_READ | IOMMU_WRITE;
 905
 906		if (rmr->flags & ACPI_IORT_RMR_REMAP_PERMITTED)
 907			type = IOMMU_RESV_DIRECT_RELAXABLE;
 908		else
 909			type = IOMMU_RESV_DIRECT;
 910
 911		if (rmr->flags & ACPI_IORT_RMR_ACCESS_PRIVILEGE)
 912			prot |= IOMMU_PRIV;
 913
 914		/* Attributes 0x00 - 0x03 represents device memory */
 915		if (ACPI_IORT_RMR_ACCESS_ATTRIBUTES(rmr->flags) <=
 916				ACPI_IORT_RMR_ATTR_DEVICE_GRE)
 917			prot |= IOMMU_MMIO;
 918		else if (ACPI_IORT_RMR_ACCESS_ATTRIBUTES(rmr->flags) ==
 919				ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB)
 920			prot |= IOMMU_CACHE;
 921
 922		rmr_data = iort_rmr_alloc(rmr_desc, prot, type,
 923					  sids, num_sids);
 924		if (!rmr_data)
 925			return;
 926
 927		list_add_tail(&rmr_data->rr.list, head);
 928	}
 929}
 930
 931static u32 *iort_rmr_alloc_sids(u32 *sids, u32 count, u32 id_start,
 932				u32 new_count)
 933{
 934	u32 *new_sids;
 935	u32 total_count = count + new_count;
 936	int i;
 937
 938	new_sids = krealloc_array(sids, count + new_count,
 939				  sizeof(*new_sids), GFP_KERNEL);
 940	if (!new_sids) {
 941		kfree(sids);
 942		return NULL;
 943	}
 944
 945	for (i = count; i < total_count; i++)
 946		new_sids[i] = id_start++;
 947
 948	return new_sids;
 949}
 950
 951static bool iort_rmr_has_dev(struct device *dev, u32 id_start,
 952			     u32 id_count)
 953{
 954	int i;
 955	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
 956
 957	/*
 958	 * Make sure the kernel has preserved the boot firmware PCIe
 959	 * configuration. This is required to ensure that the RMR PCIe
 960	 * StreamIDs are still valid (Refer: ARM DEN 0049E.d Section 3.1.1.5).
 961	 */
 962	if (dev_is_pci(dev)) {
 963		struct pci_dev *pdev = to_pci_dev(dev);
 964		struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus);
 965
 966		if (!host->preserve_config)
 967			return false;
 968	}
 969
 970	for (i = 0; i < fwspec->num_ids; i++) {
 971		if (fwspec->ids[i] >= id_start &&
 972		    fwspec->ids[i] <= id_start + id_count)
 973			return true;
 974	}
 975
 976	return false;
 977}
 978
 979static void iort_node_get_rmr_info(struct acpi_iort_node *node,
 980				   struct acpi_iort_node *iommu,
 981				   struct device *dev, struct list_head *head)
 982{
 983	struct acpi_iort_node *smmu = NULL;
 984	struct acpi_iort_rmr *rmr;
 985	struct acpi_iort_id_mapping *map;
 986	u32 *sids = NULL;
 987	u32 num_sids = 0;
 988	int i;
 989
 990	if (!node->mapping_offset || !node->mapping_count) {
 991		pr_err(FW_BUG "Invalid ID mapping, skipping RMR node %p\n",
 992		       node);
 993		return;
 994	}
 995
 996	rmr = (struct acpi_iort_rmr *)node->node_data;
 997	if (!rmr->rmr_offset || !rmr->rmr_count)
 998		return;
 999
1000	map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
1001			   node->mapping_offset);
1002
1003	/*
1004	 * Go through the ID mappings and see if we have a match for SMMU
1005	 * and dev(if !NULL). If found, get the sids for the Node.
1006	 * Please note, id_count is equal to the number of IDs  in the
1007	 * range minus one.
1008	 */
1009	for (i = 0; i < node->mapping_count; i++, map++) {
1010		struct acpi_iort_node *parent;
1011
1012		parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
1013				      map->output_reference);
1014		if (parent != iommu)
1015			continue;
1016
1017		/* If dev is valid, check RMR node corresponds to the dev SID */
1018		if (dev && !iort_rmr_has_dev(dev, map->output_base,
1019					     map->id_count))
1020			continue;
1021
1022		/* Retrieve SIDs associated with the Node. */
1023		sids = iort_rmr_alloc_sids(sids, num_sids, map->output_base,
1024					   map->id_count + 1);
1025		if (!sids)
1026			return;
1027
1028		num_sids += map->id_count + 1;
1029	}
1030
1031	if (!sids)
1032		return;
1033
1034	iort_get_rmrs(node, smmu, sids, num_sids, head);
1035	kfree(sids);
1036}
1037
1038static void iort_find_rmrs(struct acpi_iort_node *iommu, struct device *dev,
1039			   struct list_head *head)
1040{
1041	struct acpi_table_iort *iort;
1042	struct acpi_iort_node *iort_node, *iort_end;
1043	int i;
1044
1045	/* Only supports ARM DEN 0049E.d onwards */
1046	if (iort_table->revision < 5)
1047		return;
1048
1049	iort = (struct acpi_table_iort *)iort_table;
1050
1051	iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1052				 iort->node_offset);
1053	iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1054				iort_table->length);
1055
1056	for (i = 0; i < iort->node_count; i++) {
1057		if (WARN_TAINT(iort_node >= iort_end, TAINT_FIRMWARE_WORKAROUND,
1058			       "IORT node pointer overflows, bad table!\n"))
1059			return;
1060
1061		if (iort_node->type == ACPI_IORT_NODE_RMR)
1062			iort_node_get_rmr_info(iort_node, iommu, dev, head);
1063
1064		iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
1065					 iort_node->length);
1066	}
1067}
1068
1069/*
1070 * Populate the RMR list associated with a given IOMMU and dev(if provided).
1071 * If dev is NULL, the function populates all the RMRs associated with the
1072 * given IOMMU.
1073 */
1074static void iort_iommu_rmr_get_resv_regions(struct fwnode_handle *iommu_fwnode,
1075					    struct device *dev,
1076					    struct list_head *head)
1077{
1078	struct acpi_iort_node *iommu;
1079
1080	iommu = iort_get_iort_node(iommu_fwnode);
1081	if (!iommu)
1082		return;
1083
1084	iort_find_rmrs(iommu, dev, head);
1085}
1086
1087static struct acpi_iort_node *iort_get_msi_resv_iommu(struct device *dev)
1088{
1089	struct acpi_iort_node *iommu;
1090	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
1091
1092	iommu = iort_get_iort_node(fwspec->iommu_fwnode);
1093
1094	if (iommu && (iommu->type == ACPI_IORT_NODE_SMMU_V3)) {
1095		struct acpi_iort_smmu_v3 *smmu;
1096
1097		smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data;
1098		if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X)
1099			return iommu;
1100	}
1101
1102	return NULL;
1103}
1104
1105/*
1106 * Retrieve platform specific HW MSI reserve regions.
1107 * The ITS interrupt translation spaces (ITS_base + SZ_64K, SZ_64K)
1108 * associated with the device are the HW MSI reserved regions.
1109 */
1110static void iort_iommu_msi_get_resv_regions(struct device *dev,
1111					    struct list_head *head)
1112{
1113	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
1114	struct acpi_iort_its_group *its;
1115	struct acpi_iort_node *iommu_node, *its_node = NULL;
1116	int i;
1117
1118	iommu_node = iort_get_msi_resv_iommu(dev);
1119	if (!iommu_node)
1120		return;
1121
1122	/*
1123	 * Current logic to reserve ITS regions relies on HW topologies
1124	 * where a given PCI or named component maps its IDs to only one
1125	 * ITS group; if a PCI or named component can map its IDs to
1126	 * different ITS groups through IORT mappings this function has
1127	 * to be reworked to ensure we reserve regions for all ITS groups
1128	 * a given PCI or named component may map IDs to.
1129	 */
1130
1131	for (i = 0; i < fwspec->num_ids; i++) {
1132		its_node = iort_node_map_id(iommu_node,
1133					fwspec->ids[i],
1134					NULL, IORT_MSI_TYPE);
1135		if (its_node)
1136			break;
1137	}
1138
1139	if (!its_node)
1140		return;
1141
1142	/* Move to ITS specific data */
1143	its = (struct acpi_iort_its_group *)its_node->node_data;
1144
1145	for (i = 0; i < its->its_count; i++) {
1146		phys_addr_t base;
1147
1148		if (!iort_find_its_base(its->identifiers[i], &base)) {
1149			int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
1150			struct iommu_resv_region *region;
1151
1152			region = iommu_alloc_resv_region(base + SZ_64K, SZ_64K,
1153							 prot, IOMMU_RESV_MSI,
1154							 GFP_KERNEL);
1155			if (region)
1156				list_add_tail(&region->list, head);
1157		}
1158	}
1159}
1160
1161/**
1162 * iort_iommu_get_resv_regions - Generic helper to retrieve reserved regions.
1163 * @dev: Device from iommu_get_resv_regions()
1164 * @head: Reserved region list from iommu_get_resv_regions()
1165 */
1166void iort_iommu_get_resv_regions(struct device *dev, struct list_head *head)
1167{
1168	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
1169
1170	iort_iommu_msi_get_resv_regions(dev, head);
1171	iort_iommu_rmr_get_resv_regions(fwspec->iommu_fwnode, dev, head);
1172}
1173
1174/**
1175 * iort_get_rmr_sids - Retrieve IORT RMR node reserved regions with
1176 *                     associated StreamIDs information.
1177 * @iommu_fwnode: fwnode associated with IOMMU
1178 * @head: Resereved region list
1179 */
1180void iort_get_rmr_sids(struct fwnode_handle *iommu_fwnode,
1181		       struct list_head *head)
1182{
1183	iort_iommu_rmr_get_resv_regions(iommu_fwnode, NULL, head);
1184}
1185EXPORT_SYMBOL_GPL(iort_get_rmr_sids);
1186
1187/**
1188 * iort_put_rmr_sids - Free memory allocated for RMR reserved regions.
1189 * @iommu_fwnode: fwnode associated with IOMMU
1190 * @head: Resereved region list
1191 */
1192void iort_put_rmr_sids(struct fwnode_handle *iommu_fwnode,
1193		       struct list_head *head)
1194{
1195	struct iommu_resv_region *entry, *next;
1196
1197	list_for_each_entry_safe(entry, next, head, list)
1198		entry->free(NULL, entry);
1199}
1200EXPORT_SYMBOL_GPL(iort_put_rmr_sids);
1201
1202static inline bool iort_iommu_driver_enabled(u8 type)
1203{
1204	switch (type) {
1205	case ACPI_IORT_NODE_SMMU_V3:
1206		return IS_ENABLED(CONFIG_ARM_SMMU_V3);
1207	case ACPI_IORT_NODE_SMMU:
1208		return IS_ENABLED(CONFIG_ARM_SMMU);
1209	default:
1210		pr_warn("IORT node type %u does not describe an SMMU\n", type);
1211		return false;
1212	}
1213}
1214
1215static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
1216{
1217	struct acpi_iort_root_complex *pci_rc;
1218
1219	pci_rc = (struct acpi_iort_root_complex *)node->node_data;
1220	return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
1221}
1222
1223static bool iort_pci_rc_supports_canwbs(struct acpi_iort_node *node)
1224{
1225	struct acpi_iort_memory_access *memory_access;
1226	struct acpi_iort_root_complex *pci_rc;
1227
1228	pci_rc = (struct acpi_iort_root_complex *)node->node_data;
1229	memory_access =
1230		(struct acpi_iort_memory_access *)&pci_rc->memory_properties;
1231	return memory_access->memory_flags & ACPI_IORT_MF_CANWBS;
1232}
1233
1234static int iort_iommu_xlate(struct device *dev, struct acpi_iort_node *node,
1235			    u32 streamid)
1236{
1237	struct fwnode_handle *iort_fwnode;
1238
1239	/* If there's no SMMU driver at all, give up now */
1240	if (!node || !iort_iommu_driver_enabled(node->type))
1241		return -ENODEV;
1242
1243	iort_fwnode = iort_get_fwnode(node);
1244	if (!iort_fwnode)
1245		return -ENODEV;
1246
1247	/*
1248	 * If the SMMU drivers are enabled but not loaded/probed
1249	 * yet, this will defer.
1250	 */
1251	return acpi_iommu_fwspec_init(dev, streamid, iort_fwnode);
1252}
1253
1254struct iort_pci_alias_info {
1255	struct device *dev;
1256	struct acpi_iort_node *node;
1257};
1258
1259static int iort_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
1260{
1261	struct iort_pci_alias_info *info = data;
1262	struct acpi_iort_node *parent;
1263	u32 streamid;
1264
1265	parent = iort_node_map_id(info->node, alias, &streamid,
1266				  IORT_IOMMU_TYPE);
1267	return iort_iommu_xlate(info->dev, parent, streamid);
1268}
1269
1270static void iort_named_component_init(struct device *dev,
1271				      struct acpi_iort_node *node)
1272{
1273	struct property_entry props[3] = {};
1274	struct acpi_iort_named_component *nc;
1275
1276	nc = (struct acpi_iort_named_component *)node->node_data;
1277	props[0] = PROPERTY_ENTRY_U32("pasid-num-bits",
1278				      FIELD_GET(ACPI_IORT_NC_PASID_BITS,
1279						nc->node_flags));
1280	if (nc->node_flags & ACPI_IORT_NC_STALL_SUPPORTED)
1281		props[1] = PROPERTY_ENTRY_BOOL("dma-can-stall");
1282
1283	if (device_create_managed_software_node(dev, props, NULL))
1284		dev_warn(dev, "Could not add device properties\n");
1285}
1286
1287static int iort_nc_iommu_map(struct device *dev, struct acpi_iort_node *node)
1288{
1289	struct acpi_iort_node *parent;
1290	int err = -ENODEV, i = 0;
1291	u32 streamid = 0;
1292
1293	do {
1294
1295		parent = iort_node_map_platform_id(node, &streamid,
1296						   IORT_IOMMU_TYPE,
1297						   i++);
1298
1299		if (parent)
1300			err = iort_iommu_xlate(dev, parent, streamid);
1301	} while (parent && !err);
1302
1303	return err;
1304}
1305
1306static int iort_nc_iommu_map_id(struct device *dev,
1307				struct acpi_iort_node *node,
1308				const u32 *in_id)
1309{
1310	struct acpi_iort_node *parent;
1311	u32 streamid;
1312
1313	parent = iort_node_map_id(node, *in_id, &streamid, IORT_IOMMU_TYPE);
1314	if (parent)
1315		return iort_iommu_xlate(dev, parent, streamid);
1316
1317	return -ENODEV;
1318}
1319
1320
1321/**
1322 * iort_iommu_configure_id - Set-up IOMMU configuration for a device.
1323 *
1324 * @dev: device to configure
1325 * @id_in: optional input id const value pointer
1326 *
1327 * Returns: 0 on success, <0 on failure
1328 */
1329int iort_iommu_configure_id(struct device *dev, const u32 *id_in)
1330{
1331	struct acpi_iort_node *node;
1332	int err = -ENODEV;
1333
1334	if (dev_is_pci(dev)) {
1335		struct iommu_fwspec *fwspec;
1336		struct pci_bus *bus = to_pci_dev(dev)->bus;
1337		struct iort_pci_alias_info info = { .dev = dev };
1338
1339		node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
1340				      iort_match_node_callback, &bus->dev);
1341		if (!node)
1342			return -ENODEV;
1343
1344		info.node = node;
1345		err = pci_for_each_dma_alias(to_pci_dev(dev),
1346					     iort_pci_iommu_init, &info);
1347
1348		fwspec = dev_iommu_fwspec_get(dev);
1349		if (fwspec && iort_pci_rc_supports_ats(node))
1350			fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
1351		if (fwspec && iort_pci_rc_supports_canwbs(node))
1352			fwspec->flags |= IOMMU_FWSPEC_PCI_RC_CANWBS;
1353	} else {
1354		node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
1355				      iort_match_node_callback, dev);
1356		if (!node)
1357			return -ENODEV;
1358
1359		err = id_in ? iort_nc_iommu_map_id(dev, node, id_in) :
1360			      iort_nc_iommu_map(dev, node);
1361
1362		if (!err)
1363			iort_named_component_init(dev, node);
1364	}
1365
1366	return err;
1367}
1368
1369#else
1370void iort_iommu_get_resv_regions(struct device *dev, struct list_head *head)
1371{ }
1372int iort_iommu_configure_id(struct device *dev, const u32 *input_id)
1373{ return -ENODEV; }
1374#endif
1375
1376static int nc_dma_get_range(struct device *dev, u64 *limit)
1377{
1378	struct acpi_iort_node *node;
1379	struct acpi_iort_named_component *ncomp;
1380
1381	node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
1382			      iort_match_node_callback, dev);
1383	if (!node)
1384		return -ENODEV;
1385
1386	ncomp = (struct acpi_iort_named_component *)node->node_data;
1387
1388	if (!ncomp->memory_address_limit) {
1389		pr_warn(FW_BUG "Named component missing memory address limit\n");
1390		return -EINVAL;
1391	}
1392
1393	*limit = ncomp->memory_address_limit >= 64 ? U64_MAX :
1394			(1ULL << ncomp->memory_address_limit) - 1;
1395
1396	return 0;
1397}
1398
1399static int rc_dma_get_range(struct device *dev, u64 *limit)
1400{
1401	struct acpi_iort_node *node;
1402	struct acpi_iort_root_complex *rc;
1403	struct pci_bus *pbus = to_pci_dev(dev)->bus;
1404
1405	node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
1406			      iort_match_node_callback, &pbus->dev);
1407	if (!node || node->revision < 1)
1408		return -ENODEV;
1409
1410	rc = (struct acpi_iort_root_complex *)node->node_data;
1411
1412	if (!rc->memory_address_limit) {
1413		pr_warn(FW_BUG "Root complex missing memory address limit\n");
1414		return -EINVAL;
1415	}
1416
1417	*limit = rc->memory_address_limit >= 64 ? U64_MAX :
1418			(1ULL << rc->memory_address_limit) - 1;
1419
1420	return 0;
1421}
1422
1423/**
1424 * iort_dma_get_ranges() - Look up DMA addressing limit for the device
1425 * @dev: device to lookup
1426 * @limit: DMA limit result pointer
1427 *
1428 * Return: 0 on success, an error otherwise.
1429 */
1430int iort_dma_get_ranges(struct device *dev, u64 *limit)
1431{
1432	if (dev_is_pci(dev))
1433		return rc_dma_get_range(dev, limit);
1434	else
1435		return nc_dma_get_range(dev, limit);
1436}
1437
1438static void __init acpi_iort_register_irq(int hwirq, const char *name,
1439					  int trigger,
1440					  struct resource *res)
1441{
1442	int irq = acpi_register_gsi(NULL, hwirq, trigger,
1443				    ACPI_ACTIVE_HIGH);
1444
1445	if (irq <= 0) {
1446		pr_err("could not register gsi hwirq %d name [%s]\n", hwirq,
1447								      name);
1448		return;
1449	}
1450
1451	res->start = irq;
1452	res->end = irq;
1453	res->flags = IORESOURCE_IRQ;
1454	res->name = name;
1455}
1456
1457static int __init arm_smmu_v3_count_resources(struct acpi_iort_node *node)
1458{
1459	struct acpi_iort_smmu_v3 *smmu;
1460	/* Always present mem resource */
1461	int num_res = 1;
1462
1463	/* Retrieve SMMUv3 specific data */
1464	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1465
1466	if (smmu->event_gsiv)
1467		num_res++;
1468
1469	if (smmu->pri_gsiv)
1470		num_res++;
1471
1472	if (smmu->gerr_gsiv)
1473		num_res++;
1474
1475	if (smmu->sync_gsiv)
1476		num_res++;
1477
1478	return num_res;
1479}
1480
1481static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu)
1482{
1483	/*
1484	 * Cavium ThunderX2 implementation doesn't not support unique
1485	 * irq line. Use single irq line for all the SMMUv3 interrupts.
1486	 */
1487	if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1488		return false;
1489
1490	/*
1491	 * ThunderX2 doesn't support MSIs from the SMMU, so we're checking
1492	 * SPI numbers here.
1493	 */
1494	return smmu->event_gsiv == smmu->pri_gsiv &&
1495	       smmu->event_gsiv == smmu->gerr_gsiv &&
1496	       smmu->event_gsiv == smmu->sync_gsiv;
1497}
1498
1499static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu)
1500{
1501	/*
1502	 * Override the size, for Cavium ThunderX2 implementation
1503	 * which doesn't support the page 1 SMMU register space.
1504	 */
1505	if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1506		return SZ_64K;
1507
1508	return SZ_128K;
1509}
1510
1511static void __init arm_smmu_v3_init_resources(struct resource *res,
1512					      struct acpi_iort_node *node)
1513{
1514	struct acpi_iort_smmu_v3 *smmu;
1515	int num_res = 0;
1516
1517	/* Retrieve SMMUv3 specific data */
1518	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1519
1520	res[num_res].start = smmu->base_address;
1521	res[num_res].end = smmu->base_address +
1522				arm_smmu_v3_resource_size(smmu) - 1;
1523	res[num_res].flags = IORESOURCE_MEM;
1524
1525	num_res++;
1526	if (arm_smmu_v3_is_combined_irq(smmu)) {
1527		if (smmu->event_gsiv)
1528			acpi_iort_register_irq(smmu->event_gsiv, "combined",
1529					       ACPI_EDGE_SENSITIVE,
1530					       &res[num_res++]);
1531	} else {
1532
1533		if (smmu->event_gsiv)
1534			acpi_iort_register_irq(smmu->event_gsiv, "eventq",
1535					       ACPI_EDGE_SENSITIVE,
1536					       &res[num_res++]);
1537
1538		if (smmu->pri_gsiv)
1539			acpi_iort_register_irq(smmu->pri_gsiv, "priq",
1540					       ACPI_EDGE_SENSITIVE,
1541					       &res[num_res++]);
1542
1543		if (smmu->gerr_gsiv)
1544			acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
1545					       ACPI_EDGE_SENSITIVE,
1546					       &res[num_res++]);
1547
1548		if (smmu->sync_gsiv)
1549			acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
1550					       ACPI_EDGE_SENSITIVE,
1551					       &res[num_res++]);
1552	}
1553}
1554
1555static void __init arm_smmu_v3_dma_configure(struct device *dev,
1556					     struct acpi_iort_node *node)
1557{
1558	struct acpi_iort_smmu_v3 *smmu;
1559	enum dev_dma_attr attr;
1560
1561	/* Retrieve SMMUv3 specific data */
1562	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1563
1564	attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ?
1565			DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT;
1566
1567	/* We expect the dma masks to be equivalent for all SMMUv3 set-ups */
1568	dev->dma_mask = &dev->coherent_dma_mask;
1569
1570	/* Configure DMA for the page table walker */
1571	acpi_dma_configure(dev, attr);
1572}
1573
1574#if defined(CONFIG_ACPI_NUMA)
1575/*
1576 * set numa proximity domain for smmuv3 device
1577 */
1578static int  __init arm_smmu_v3_set_proximity(struct device *dev,
1579					      struct acpi_iort_node *node)
1580{
1581	struct acpi_iort_smmu_v3 *smmu;
1582
1583	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1584	if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) {
1585		int dev_node = pxm_to_node(smmu->pxm);
1586
1587		if (dev_node != NUMA_NO_NODE && !node_online(dev_node))
1588			return -EINVAL;
1589
1590		set_dev_node(dev, dev_node);
1591		pr_info("SMMU-v3[%llx] Mapped to Proximity domain %d\n",
1592			smmu->base_address,
1593			smmu->pxm);
1594	}
1595	return 0;
1596}
1597#else
1598#define arm_smmu_v3_set_proximity NULL
1599#endif
1600
1601static int __init arm_smmu_count_resources(struct acpi_iort_node *node)
1602{
1603	struct acpi_iort_smmu *smmu;
1604
1605	/* Retrieve SMMU specific data */
1606	smmu = (struct acpi_iort_smmu *)node->node_data;
1607
1608	/*
1609	 * Only consider the global fault interrupt and ignore the
1610	 * configuration access interrupt.
1611	 *
1612	 * MMIO address and global fault interrupt resources are always
1613	 * present so add them to the context interrupt count as a static
1614	 * value.
1615	 */
1616	return smmu->context_interrupt_count + 2;
1617}
1618
1619static void __init arm_smmu_init_resources(struct resource *res,
1620					   struct acpi_iort_node *node)
1621{
1622	struct acpi_iort_smmu *smmu;
1623	int i, hw_irq, trigger, num_res = 0;
1624	u64 *ctx_irq, *glb_irq;
1625
1626	/* Retrieve SMMU specific data */
1627	smmu = (struct acpi_iort_smmu *)node->node_data;
1628
1629	res[num_res].start = smmu->base_address;
1630	res[num_res].end = smmu->base_address + smmu->span - 1;
1631	res[num_res].flags = IORESOURCE_MEM;
1632	num_res++;
1633
1634	glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);
1635	/* Global IRQs */
1636	hw_irq = IORT_IRQ_MASK(glb_irq[0]);
1637	trigger = IORT_IRQ_TRIGGER_MASK(glb_irq[0]);
1638
1639	acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger,
1640				     &res[num_res++]);
1641
1642	/* Context IRQs */
1643	ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);
1644	for (i = 0; i < smmu->context_interrupt_count; i++) {
1645		hw_irq = IORT_IRQ_MASK(ctx_irq[i]);
1646		trigger = IORT_IRQ_TRIGGER_MASK(ctx_irq[i]);
1647
1648		acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger,
1649				       &res[num_res++]);
1650	}
1651}
1652
1653static void __init arm_smmu_dma_configure(struct device *dev,
1654					  struct acpi_iort_node *node)
1655{
1656	struct acpi_iort_smmu *smmu;
1657	enum dev_dma_attr attr;
1658
1659	/* Retrieve SMMU specific data */
1660	smmu = (struct acpi_iort_smmu *)node->node_data;
1661
1662	attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ?
1663			DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT;
1664
1665	/* We expect the dma masks to be equivalent for SMMU set-ups */
1666	dev->dma_mask = &dev->coherent_dma_mask;
1667
1668	/* Configure DMA for the page table walker */
1669	acpi_dma_configure(dev, attr);
1670}
1671
1672static int __init arm_smmu_v3_pmcg_count_resources(struct acpi_iort_node *node)
1673{
1674	struct acpi_iort_pmcg *pmcg;
1675
1676	/* Retrieve PMCG specific data */
1677	pmcg = (struct acpi_iort_pmcg *)node->node_data;
1678
1679	/*
1680	 * There are always 2 memory resources.
1681	 * If the overflow_gsiv is present then add that for a total of 3.
1682	 */
1683	return pmcg->overflow_gsiv ? 3 : 2;
1684}
1685
1686static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res,
1687						   struct acpi_iort_node *node)
1688{
1689	struct acpi_iort_pmcg *pmcg;
1690
1691	/* Retrieve PMCG specific data */
1692	pmcg = (struct acpi_iort_pmcg *)node->node_data;
1693
1694	res[0].start = pmcg->page0_base_address;
1695	res[0].end = pmcg->page0_base_address + SZ_4K - 1;
1696	res[0].flags = IORESOURCE_MEM;
1697	/*
1698	 * The initial version in DEN0049C lacked a way to describe register
1699	 * page 1, which makes it broken for most PMCG implementations; in
1700	 * that case, just let the driver fail gracefully if it expects to
1701	 * find a second memory resource.
1702	 */
1703	if (node->revision > 0) {
1704		res[1].start = pmcg->page1_base_address;
1705		res[1].end = pmcg->page1_base_address + SZ_4K - 1;
1706		res[1].flags = IORESOURCE_MEM;
1707	}
1708
1709	if (pmcg->overflow_gsiv)
1710		acpi_iort_register_irq(pmcg->overflow_gsiv, "overflow",
1711				       ACPI_EDGE_SENSITIVE, &res[2]);
1712}
1713
1714static struct acpi_platform_list pmcg_plat_info[] __initdata = {
1715	/* HiSilicon Hip08 Platform */
1716	{"HISI  ", "HIP08   ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1717	 "Erratum #162001800, Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP08},
1718	/* HiSilicon Hip09 Platform */
1719	{"HISI  ", "HIP09   ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1720	 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1721	{"HISI  ", "HIP09A  ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1722	 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1723	/* HiSilicon Hip10/11 Platform uses the same SMMU IP with Hip09 */
1724	{"HISI  ", "HIP10   ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1725	 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1726	{"HISI  ", "HIP10C  ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1727	 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1728	{"HISI  ", "HIP11   ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1729	 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1730	{ }
1731};
1732
1733static int __init arm_smmu_v3_pmcg_add_platdata(struct platform_device *pdev)
1734{
1735	u32 model;
1736	int idx;
1737
1738	idx = acpi_match_platform_list(pmcg_plat_info);
1739	if (idx >= 0)
1740		model = pmcg_plat_info[idx].data;
1741	else
1742		model = IORT_SMMU_V3_PMCG_GENERIC;
1743
1744	return platform_device_add_data(pdev, &model, sizeof(model));
1745}
1746
1747struct iort_dev_config {
1748	const char *name;
1749	int (*dev_init)(struct acpi_iort_node *node);
1750	void (*dev_dma_configure)(struct device *dev,
1751				  struct acpi_iort_node *node);
1752	int (*dev_count_resources)(struct acpi_iort_node *node);
1753	void (*dev_init_resources)(struct resource *res,
1754				     struct acpi_iort_node *node);
1755	int (*dev_set_proximity)(struct device *dev,
1756				    struct acpi_iort_node *node);
1757	int (*dev_add_platdata)(struct platform_device *pdev);
1758};
1759
1760static const struct iort_dev_config iort_arm_smmu_v3_cfg __initconst = {
1761	.name = "arm-smmu-v3",
1762	.dev_dma_configure = arm_smmu_v3_dma_configure,
1763	.dev_count_resources = arm_smmu_v3_count_resources,
1764	.dev_init_resources = arm_smmu_v3_init_resources,
1765	.dev_set_proximity = arm_smmu_v3_set_proximity,
1766};
1767
1768static const struct iort_dev_config iort_arm_smmu_cfg __initconst = {
1769	.name = "arm-smmu",
1770	.dev_dma_configure = arm_smmu_dma_configure,
1771	.dev_count_resources = arm_smmu_count_resources,
1772	.dev_init_resources = arm_smmu_init_resources,
1773};
1774
1775static const struct iort_dev_config iort_arm_smmu_v3_pmcg_cfg __initconst = {
1776	.name = "arm-smmu-v3-pmcg",
1777	.dev_count_resources = arm_smmu_v3_pmcg_count_resources,
1778	.dev_init_resources = arm_smmu_v3_pmcg_init_resources,
1779	.dev_add_platdata = arm_smmu_v3_pmcg_add_platdata,
1780};
1781
1782static __init const struct iort_dev_config *iort_get_dev_cfg(
1783			struct acpi_iort_node *node)
1784{
1785	switch (node->type) {
1786	case ACPI_IORT_NODE_SMMU_V3:
1787		return &iort_arm_smmu_v3_cfg;
1788	case ACPI_IORT_NODE_SMMU:
1789		return &iort_arm_smmu_cfg;
1790	case ACPI_IORT_NODE_PMCG:
1791		return &iort_arm_smmu_v3_pmcg_cfg;
1792	default:
1793		return NULL;
1794	}
1795}
1796
1797/**
1798 * iort_add_platform_device() - Allocate a platform device for IORT node
1799 * @node: Pointer to device ACPI IORT node
1800 * @ops: Pointer to IORT device config struct
1801 *
1802 * Returns: 0 on success, <0 failure
1803 */
1804static int __init iort_add_platform_device(struct acpi_iort_node *node,
1805					   const struct iort_dev_config *ops)
1806{
1807	struct fwnode_handle *fwnode;
1808	struct platform_device *pdev;
1809	struct resource *r;
1810	int ret, count;
1811
1812	pdev = platform_device_alloc(ops->name, PLATFORM_DEVID_AUTO);
1813	if (!pdev)
1814		return -ENOMEM;
1815
1816	if (ops->dev_set_proximity) {
1817		ret = ops->dev_set_proximity(&pdev->dev, node);
1818		if (ret)
1819			goto dev_put;
1820	}
1821
1822	count = ops->dev_count_resources(node);
1823
1824	r = kcalloc(count, sizeof(*r), GFP_KERNEL);
1825	if (!r) {
1826		ret = -ENOMEM;
1827		goto dev_put;
1828	}
1829
1830	ops->dev_init_resources(r, node);
1831
1832	ret = platform_device_add_resources(pdev, r, count);
1833	/*
1834	 * Resources are duplicated in platform_device_add_resources,
1835	 * free their allocated memory
1836	 */
1837	kfree(r);
1838
1839	if (ret)
1840		goto dev_put;
1841
1842	/*
1843	 * Platform devices based on PMCG nodes uses platform_data to
1844	 * pass the hardware model info to the driver. For others, add
1845	 * a copy of IORT node pointer to platform_data to be used to
1846	 * retrieve IORT data information.
1847	 */
1848	if (ops->dev_add_platdata)
1849		ret = ops->dev_add_platdata(pdev);
1850	else
1851		ret = platform_device_add_data(pdev, &node, sizeof(node));
1852
1853	if (ret)
1854		goto dev_put;
1855
1856	fwnode = iort_get_fwnode(node);
1857
1858	if (!fwnode) {
1859		ret = -ENODEV;
1860		goto dev_put;
1861	}
1862
1863	pdev->dev.fwnode = fwnode;
1864
1865	if (ops->dev_dma_configure)
1866		ops->dev_dma_configure(&pdev->dev, node);
1867
1868	iort_set_device_domain(&pdev->dev, node);
1869
1870	ret = platform_device_add(pdev);
1871	if (ret)
1872		goto dma_deconfigure;
1873
1874	return 0;
1875
1876dma_deconfigure:
1877	arch_teardown_dma_ops(&pdev->dev);
1878dev_put:
1879	platform_device_put(pdev);
1880
1881	return ret;
1882}
1883
1884#ifdef CONFIG_PCI
1885static void __init iort_enable_acs(struct acpi_iort_node *iort_node)
1886{
1887	static bool acs_enabled __initdata;
1888
1889	if (acs_enabled)
1890		return;
1891
1892	if (iort_node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
1893		struct acpi_iort_node *parent;
1894		struct acpi_iort_id_mapping *map;
1895		int i;
1896
1897		map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, iort_node,
1898				   iort_node->mapping_offset);
1899
1900		for (i = 0; i < iort_node->mapping_count; i++, map++) {
1901			if (!map->output_reference)
1902				continue;
1903
1904			parent = ACPI_ADD_PTR(struct acpi_iort_node,
1905					iort_table,  map->output_reference);
1906			/*
1907			 * If we detect a RC->SMMU mapping, make sure
1908			 * we enable ACS on the system.
1909			 */
1910			if ((parent->type == ACPI_IORT_NODE_SMMU) ||
1911				(parent->type == ACPI_IORT_NODE_SMMU_V3)) {
1912				pci_request_acs();
1913				acs_enabled = true;
1914				return;
1915			}
1916		}
1917	}
1918}
1919#else
1920static inline void iort_enable_acs(struct acpi_iort_node *iort_node) { }
1921#endif
1922
1923static void __init iort_init_platform_devices(void)
1924{
1925	struct acpi_iort_node *iort_node, *iort_end;
1926	struct acpi_table_iort *iort;
1927	struct fwnode_handle *fwnode;
1928	int i, ret;
1929	const struct iort_dev_config *ops;
1930
1931	/*
1932	 * iort_table and iort both point to the start of IORT table, but
1933	 * have different struct types
1934	 */
1935	iort = (struct acpi_table_iort *)iort_table;
1936
1937	/* Get the first IORT node */
1938	iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1939				 iort->node_offset);
1940	iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1941				iort_table->length);
1942
1943	for (i = 0; i < iort->node_count; i++) {
1944		if (iort_node >= iort_end) {
1945			pr_err("iort node pointer overflows, bad table\n");
1946			return;
1947		}
1948
1949		iort_enable_acs(iort_node);
1950
1951		ops = iort_get_dev_cfg(iort_node);
1952		if (ops) {
1953			fwnode = acpi_alloc_fwnode_static();
1954			if (!fwnode)
1955				return;
1956
1957			iort_set_fwnode(iort_node, fwnode);
1958
1959			ret = iort_add_platform_device(iort_node, ops);
1960			if (ret) {
1961				iort_delete_fwnode(iort_node);
1962				acpi_free_fwnode_static(fwnode);
1963				return;
1964			}
1965		}
1966
1967		iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
1968					 iort_node->length);
1969	}
1970}
1971
1972void __init acpi_iort_init(void)
1973{
1974	acpi_status status;
1975
1976	/* iort_table will be used at runtime after the iort init,
1977	 * so we don't need to call acpi_put_table() to release
1978	 * the IORT table mapping.
1979	 */
1980	status = acpi_get_table(ACPI_SIG_IORT, 0, &iort_table);
1981	if (ACPI_FAILURE(status)) {
1982		if (status != AE_NOT_FOUND) {
1983			const char *msg = acpi_format_exception(status);
1984
1985			pr_err("Failed to get table, %s\n", msg);
1986		}
1987
1988		return;
1989	}
1990
1991	iort_init_platform_devices();
1992}
1993
1994#ifdef CONFIG_ZONE_DMA
1995/*
1996 * Extract the highest CPU physical address accessible to all DMA masters in
1997 * the system. PHYS_ADDR_MAX is returned when no constrained device is found.
1998 */
1999phys_addr_t __init acpi_iort_dma_get_max_cpu_address(void)
2000{
2001	phys_addr_t limit = PHYS_ADDR_MAX;
2002	struct acpi_iort_node *node, *end;
2003	struct acpi_table_iort *iort;
2004	acpi_status status;
2005	int i;
2006
2007	if (acpi_disabled)
2008		return limit;
2009
2010	status = acpi_get_table(ACPI_SIG_IORT, 0,
2011				(struct acpi_table_header **)&iort);
2012	if (ACPI_FAILURE(status))
2013		return limit;
2014
2015	node = ACPI_ADD_PTR(struct acpi_iort_node, iort, iort->node_offset);
2016	end = ACPI_ADD_PTR(struct acpi_iort_node, iort, iort->header.length);
2017
2018	for (i = 0; i < iort->node_count; i++) {
2019		if (node >= end)
2020			break;
2021
2022		switch (node->type) {
2023			struct acpi_iort_named_component *ncomp;
2024			struct acpi_iort_root_complex *rc;
2025			phys_addr_t local_limit;
2026
2027		case ACPI_IORT_NODE_NAMED_COMPONENT:
2028			ncomp = (struct acpi_iort_named_component *)node->node_data;
2029			local_limit = DMA_BIT_MASK(ncomp->memory_address_limit);
2030			limit = min_not_zero(limit, local_limit);
2031			break;
2032
2033		case ACPI_IORT_NODE_PCI_ROOT_COMPLEX:
2034			if (node->revision < 1)
2035				break;
2036
2037			rc = (struct acpi_iort_root_complex *)node->node_data;
2038			local_limit = DMA_BIT_MASK(rc->memory_address_limit);
2039			limit = min_not_zero(limit, local_limit);
2040			break;
2041		}
2042		node = ACPI_ADD_PTR(struct acpi_iort_node, node, node->length);
2043	}
2044	acpi_put_table(&iort->header);
2045	return limit;
2046}
2047#endif