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tpc7_qm_regs.h

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linux-6.19.14/drivers/accel/habanalabs/include/goya/asic_reg/tpc7_qm_regs.h C
  1/* SPDX-License-Identifier: GPL-2.0
  2 *
  3 * Copyright 2016-2018 HabanaLabs, Ltd.
  4 * All Rights Reserved.
  5 *
  6 */
  7
  8/************************************
  9 ** This is an auto-generated file **
 10 **       DO NOT EDIT BELOW        **
 11 ************************************/
 12
 13#ifndef ASIC_REG_TPC7_QM_REGS_H_
 14#define ASIC_REG_TPC7_QM_REGS_H_
 15
 16/*
 17 *****************************************
 18 *   TPC7_QM (Prototype: QMAN)
 19 *****************************************
 20 */
 21
 22#define mmTPC7_QM_GLBL_CFG0                                          0xFC8000
 23
 24#define mmTPC7_QM_GLBL_CFG1                                          0xFC8004
 25
 26#define mmTPC7_QM_GLBL_PROT                                          0xFC8008
 27
 28#define mmTPC7_QM_GLBL_ERR_CFG                                       0xFC800C
 29
 30#define mmTPC7_QM_GLBL_ERR_ADDR_LO                                   0xFC8010
 31
 32#define mmTPC7_QM_GLBL_ERR_ADDR_HI                                   0xFC8014
 33
 34#define mmTPC7_QM_GLBL_ERR_WDATA                                     0xFC8018
 35
 36#define mmTPC7_QM_GLBL_SECURE_PROPS                                  0xFC801C
 37
 38#define mmTPC7_QM_GLBL_NON_SECURE_PROPS                              0xFC8020
 39
 40#define mmTPC7_QM_GLBL_STS0                                          0xFC8024
 41
 42#define mmTPC7_QM_GLBL_STS1                                          0xFC8028
 43
 44#define mmTPC7_QM_PQ_BASE_LO                                         0xFC8060
 45
 46#define mmTPC7_QM_PQ_BASE_HI                                         0xFC8064
 47
 48#define mmTPC7_QM_PQ_SIZE                                            0xFC8068
 49
 50#define mmTPC7_QM_PQ_PI                                              0xFC806C
 51
 52#define mmTPC7_QM_PQ_CI                                              0xFC8070
 53
 54#define mmTPC7_QM_PQ_CFG0                                            0xFC8074
 55
 56#define mmTPC7_QM_PQ_CFG1                                            0xFC8078
 57
 58#define mmTPC7_QM_PQ_ARUSER                                          0xFC807C
 59
 60#define mmTPC7_QM_PQ_PUSH0                                           0xFC8080
 61
 62#define mmTPC7_QM_PQ_PUSH1                                           0xFC8084
 63
 64#define mmTPC7_QM_PQ_PUSH2                                           0xFC8088
 65
 66#define mmTPC7_QM_PQ_PUSH3                                           0xFC808C
 67
 68#define mmTPC7_QM_PQ_STS0                                            0xFC8090
 69
 70#define mmTPC7_QM_PQ_STS1                                            0xFC8094
 71
 72#define mmTPC7_QM_PQ_RD_RATE_LIM_EN                                  0xFC80A0
 73
 74#define mmTPC7_QM_PQ_RD_RATE_LIM_RST_TOKEN                           0xFC80A4
 75
 76#define mmTPC7_QM_PQ_RD_RATE_LIM_SAT                                 0xFC80A8
 77
 78#define mmTPC7_QM_PQ_RD_RATE_LIM_TOUT                                0xFC80AC
 79
 80#define mmTPC7_QM_CQ_CFG0                                            0xFC80B0
 81
 82#define mmTPC7_QM_CQ_CFG1                                            0xFC80B4
 83
 84#define mmTPC7_QM_CQ_ARUSER                                          0xFC80B8
 85
 86#define mmTPC7_QM_CQ_PTR_LO                                          0xFC80C0
 87
 88#define mmTPC7_QM_CQ_PTR_HI                                          0xFC80C4
 89
 90#define mmTPC7_QM_CQ_TSIZE                                           0xFC80C8
 91
 92#define mmTPC7_QM_CQ_CTL                                             0xFC80CC
 93
 94#define mmTPC7_QM_CQ_PTR_LO_STS                                      0xFC80D4
 95
 96#define mmTPC7_QM_CQ_PTR_HI_STS                                      0xFC80D8
 97
 98#define mmTPC7_QM_CQ_TSIZE_STS                                       0xFC80DC
 99
100#define mmTPC7_QM_CQ_CTL_STS                                         0xFC80E0
101
102#define mmTPC7_QM_CQ_STS0                                            0xFC80E4
103
104#define mmTPC7_QM_CQ_STS1                                            0xFC80E8
105
106#define mmTPC7_QM_CQ_RD_RATE_LIM_EN                                  0xFC80F0
107
108#define mmTPC7_QM_CQ_RD_RATE_LIM_RST_TOKEN                           0xFC80F4
109
110#define mmTPC7_QM_CQ_RD_RATE_LIM_SAT                                 0xFC80F8
111
112#define mmTPC7_QM_CQ_RD_RATE_LIM_TOUT                                0xFC80FC
113
114#define mmTPC7_QM_CQ_IFIFO_CNT                                       0xFC8108
115
116#define mmTPC7_QM_CP_MSG_BASE0_ADDR_LO                               0xFC8120
117
118#define mmTPC7_QM_CP_MSG_BASE0_ADDR_HI                               0xFC8124
119
120#define mmTPC7_QM_CP_MSG_BASE1_ADDR_LO                               0xFC8128
121
122#define mmTPC7_QM_CP_MSG_BASE1_ADDR_HI                               0xFC812C
123
124#define mmTPC7_QM_CP_MSG_BASE2_ADDR_LO                               0xFC8130
125
126#define mmTPC7_QM_CP_MSG_BASE2_ADDR_HI                               0xFC8134
127
128#define mmTPC7_QM_CP_MSG_BASE3_ADDR_LO                               0xFC8138
129
130#define mmTPC7_QM_CP_MSG_BASE3_ADDR_HI                               0xFC813C
131
132#define mmTPC7_QM_CP_LDMA_TSIZE_OFFSET                               0xFC8140
133
134#define mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET                         0xFC8144
135
136#define mmTPC7_QM_CP_LDMA_SRC_BASE_HI_OFFSET                         0xFC8148
137
138#define mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET                         0xFC814C
139
140#define mmTPC7_QM_CP_LDMA_DST_BASE_HI_OFFSET                         0xFC8150
141
142#define mmTPC7_QM_CP_LDMA_COMMIT_OFFSET                              0xFC8154
143
144#define mmTPC7_QM_CP_FENCE0_RDATA                                    0xFC8158
145
146#define mmTPC7_QM_CP_FENCE1_RDATA                                    0xFC815C
147
148#define mmTPC7_QM_CP_FENCE2_RDATA                                    0xFC8160
149
150#define mmTPC7_QM_CP_FENCE3_RDATA                                    0xFC8164
151
152#define mmTPC7_QM_CP_FENCE0_CNT                                      0xFC8168
153
154#define mmTPC7_QM_CP_FENCE1_CNT                                      0xFC816C
155
156#define mmTPC7_QM_CP_FENCE2_CNT                                      0xFC8170
157
158#define mmTPC7_QM_CP_FENCE3_CNT                                      0xFC8174
159
160#define mmTPC7_QM_CP_STS                                             0xFC8178
161
162#define mmTPC7_QM_CP_CURRENT_INST_LO                                 0xFC817C
163
164#define mmTPC7_QM_CP_CURRENT_INST_HI                                 0xFC8180
165
166#define mmTPC7_QM_CP_BARRIER_CFG                                     0xFC8184
167
168#define mmTPC7_QM_CP_DBG_0                                           0xFC8188
169
170#define mmTPC7_QM_PQ_BUF_ADDR                                        0xFC8300
171
172#define mmTPC7_QM_PQ_BUF_RDATA                                       0xFC8304
173
174#define mmTPC7_QM_CQ_BUF_ADDR                                        0xFC8308
175
176#define mmTPC7_QM_CQ_BUF_RDATA                                       0xFC830C
177
178#endif /* ASIC_REG_TPC7_QM_REGS_H_ */
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