FILE
psoc_global_conf_regs.h
File preview with syntax highlighting.
linux-6.19.14/drivers/accel/habanalabs/include/goya/asic_reg/psoc_global_conf_regs.h
1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8/************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13#ifndef ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_ 14#define ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_ 15 16/* 17 ***************************************** 18 * PSOC_GLOBAL_CONF (Prototype: GLOBAL_CONF) 19 ***************************************** 20 */ 21 22#define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_0 0xC4B000 23 24#define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_1 0xC4B004 25 26#define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_2 0xC4B008 27 28#define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_3 0xC4B00C 29 30#define mmPSOC_GLOBAL_CONF_PCI_FW_FSM 0xC4B020 31 32#define mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START 0xC4B024 33 34#define mmPSOC_GLOBAL_CONF_BTM_FSM 0xC4B028 35 36#define mmPSOC_GLOBAL_CONF_SW_BTM_FSM 0xC4B030 37 38#define mmPSOC_GLOBAL_CONF_SW_BOOT_SEQ_FSM 0xC4B034 39 40#define mmPSOC_GLOBAL_CONF_BOOT_SEQ_TIMEOUT 0xC4B038 41 42#define mmPSOC_GLOBAL_CONF_SPI_MEM_EN 0xC4B040 43 44#define mmPSOC_GLOBAL_CONF_PRSTN 0xC4B044 45 46#define mmPSOC_GLOBAL_CONF_PCIE_EN 0xC4B048 47 48#define mmPSOC_GLOBAL_CONF_SPI_IMG_STS 0xC4B050 49 50#define mmPSOC_GLOBAL_CONF_BOOT_SEQ_FSM 0xC4B054 51 52#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_0 0xC4B100 53 54#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_1 0xC4B104 55 56#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_2 0xC4B108 57 58#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_3 0xC4B10C 59 60#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_4 0xC4B110 61 62#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_5 0xC4B114 63 64#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_6 0xC4B118 65 66#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_7 0xC4B11C 67 68#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_8 0xC4B120 69 70#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_9 0xC4B124 71 72#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_10 0xC4B128 73 74#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_11 0xC4B12C 75 76#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_12 0xC4B130 77 78#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_13 0xC4B134 79 80#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_14 0xC4B138 81 82#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_15 0xC4B13C 83 84#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_16 0xC4B140 85 86#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_17 0xC4B144 87 88#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_18 0xC4B148 89 90#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_19 0xC4B14C 91 92#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_20 0xC4B150 93 94#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_21 0xC4B154 95 96#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_22 0xC4B158 97 98#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_23 0xC4B15C 99 100#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_24 0xC4B160 101 102#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_25 0xC4B164 103 104#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_26 0xC4B168 105 106#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_27 0xC4B16C 107 108#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_28 0xC4B170 109 110#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_29 0xC4B174 111 112#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_30 0xC4B178 113 114#define mmPSOC_GLOBAL_CONF_SCRATCHPAD_31 0xC4B17C 115 116#define mmPSOC_GLOBAL_CONF_SEMAPHORE_0 0xC4B200 117 118#define mmPSOC_GLOBAL_CONF_SEMAPHORE_1 0xC4B204 119 120#define mmPSOC_GLOBAL_CONF_SEMAPHORE_2 0xC4B208 121 122#define mmPSOC_GLOBAL_CONF_SEMAPHORE_3 0xC4B20C 123 124#define mmPSOC_GLOBAL_CONF_SEMAPHORE_4 0xC4B210 125 126#define mmPSOC_GLOBAL_CONF_SEMAPHORE_5 0xC4B214 127 128#define mmPSOC_GLOBAL_CONF_SEMAPHORE_6 0xC4B218 129 130#define mmPSOC_GLOBAL_CONF_SEMAPHORE_7 0xC4B21C 131 132#define mmPSOC_GLOBAL_CONF_SEMAPHORE_8 0xC4B220 133 134#define mmPSOC_GLOBAL_CONF_SEMAPHORE_9 0xC4B224 135 136#define mmPSOC_GLOBAL_CONF_SEMAPHORE_10 0xC4B228 137 138#define mmPSOC_GLOBAL_CONF_SEMAPHORE_11 0xC4B22C 139 140#define mmPSOC_GLOBAL_CONF_SEMAPHORE_12 0xC4B230 141 142#define mmPSOC_GLOBAL_CONF_SEMAPHORE_13 0xC4B234 143 144#define mmPSOC_GLOBAL_CONF_SEMAPHORE_14 0xC4B238 145 146#define mmPSOC_GLOBAL_CONF_SEMAPHORE_15 0xC4B23C 147 148#define mmPSOC_GLOBAL_CONF_SEMAPHORE_16 0xC4B240 149 150#define mmPSOC_GLOBAL_CONF_SEMAPHORE_17 0xC4B244 151 152#define mmPSOC_GLOBAL_CONF_SEMAPHORE_18 0xC4B248 153 154#define mmPSOC_GLOBAL_CONF_SEMAPHORE_19 0xC4B24C 155 156#define mmPSOC_GLOBAL_CONF_SEMAPHORE_20 0xC4B250 157 158#define mmPSOC_GLOBAL_CONF_SEMAPHORE_21 0xC4B254 159 160#define mmPSOC_GLOBAL_CONF_SEMAPHORE_22 0xC4B258 161 162#define mmPSOC_GLOBAL_CONF_SEMAPHORE_23 0xC4B25C 163 164#define mmPSOC_GLOBAL_CONF_SEMAPHORE_24 0xC4B260 165 166#define mmPSOC_GLOBAL_CONF_SEMAPHORE_25 0xC4B264 167 168#define mmPSOC_GLOBAL_CONF_SEMAPHORE_26 0xC4B268 169 170#define mmPSOC_GLOBAL_CONF_SEMAPHORE_27 0xC4B26C 171 172#define mmPSOC_GLOBAL_CONF_SEMAPHORE_28 0xC4B270 173 174#define mmPSOC_GLOBAL_CONF_SEMAPHORE_29 0xC4B274 175 176#define mmPSOC_GLOBAL_CONF_SEMAPHORE_30 0xC4B278 177 178#define mmPSOC_GLOBAL_CONF_SEMAPHORE_31 0xC4B27C 179 180#define mmPSOC_GLOBAL_CONF_WARM_REBOOT 0xC4B300 181 182#define mmPSOC_GLOBAL_CONF_UBOOT_MAGIC 0xC4B304 183 184#define mmPSOC_GLOBAL_CONF_SPL_SOURCE 0xC4B308 185 186#define mmPSOC_GLOBAL_CONF_I2C_MSTR1_DBG 0xC4B30C 187 188#define mmPSOC_GLOBAL_CONF_I2C_SLV 0xC4B310 189 190#define mmPSOC_GLOBAL_CONF_I2C_SLV_INTR_MASK 0xC4B314 191 192#define mmPSOC_GLOBAL_CONF_APP_STATUS 0xC4B320 193 194#define mmPSOC_GLOBAL_CONF_BTL_STS 0xC4B340 195 196#define mmPSOC_GLOBAL_CONF_TIMEOUT_INTR 0xC4B350 197 198#define mmPSOC_GLOBAL_CONF_COMB_TIMEOUT_INTR 0xC4B354 199 200#define mmPSOC_GLOBAL_CONF_PERIPH_INTR 0xC4B358 201 202#define mmPSOC_GLOBAL_CONF_COMB_PERIPH_INTR 0xC4B35C 203 204#define mmPSOC_GLOBAL_CONF_AXI_ERR_INTR 0xC4B360 205 206#define mmPSOC_GLOBAL_CONF_TARGETID 0xC4B400 207 208#define mmPSOC_GLOBAL_CONF_EMMC_INT_VOL_STABLE 0xC4B420 209 210#define mmPSOC_GLOBAL_CONF_MII_ADDR 0xC4B424 211 212#define mmPSOC_GLOBAL_CONF_MII_SPEED 0xC4B428 213 214#define mmPSOC_GLOBAL_CONF_BOOT_STRAP_PINS 0xC4B430 215 216#define mmPSOC_GLOBAL_CONF_MEM_REPAIR_CTRL 0xC4B450 217 218#define mmPSOC_GLOBAL_CONF_MEM_REPAIR_STS 0xC4B454 219 220#define mmPSOC_GLOBAL_CONF_OUTSTANT_TRANS 0xC4B458 221 222#define mmPSOC_GLOBAL_CONF_MASK_REQ 0xC4B45C 223 224#define mmPSOC_GLOBAL_CONF_PRSTN_RST_CFG 0xC4B470 225 226#define mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG 0xC4B474 227 228#define mmPSOC_GLOBAL_CONF_WD_RST_CFG 0xC4B478 229 230#define mmPSOC_GLOBAL_CONF_MNL_RST_CFG 0xC4B47C 231 232#define mmPSOC_GLOBAL_CONF_UNIT_RST_N 0xC4B480 233 234#define mmPSOC_GLOBAL_CONF_PRSTN_MASK 0xC4B484 235 236#define mmPSOC_GLOBAL_CONF_WD_MASK 0xC4B488 237 238#define mmPSOC_GLOBAL_CONF_RST_SRC 0xC4B490 239 240#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_0 0xC4B500 241 242#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_1 0xC4B504 243 244#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_2 0xC4B508 245 246#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_3 0xC4B50C 247 248#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_4 0xC4B510 249 250#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_5 0xC4B514 251 252#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_6 0xC4B518 253 254#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_7 0xC4B51C 255 256#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_8 0xC4B520 257 258#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_9 0xC4B524 259 260#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_10 0xC4B528 261 262#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_11 0xC4B52C 263 264#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_12 0xC4B530 265 266#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_13 0xC4B534 267 268#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_14 0xC4B538 269 270#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_15 0xC4B53C 271 272#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_16 0xC4B540 273 274#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_17 0xC4B544 275 276#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_18 0xC4B548 277 278#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_19 0xC4B54C 279 280#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_20 0xC4B550 281 282#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_21 0xC4B554 283 284#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_22 0xC4B558 285 286#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_23 0xC4B55C 287 288#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_24 0xC4B560 289 290#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_25 0xC4B564 291 292#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_26 0xC4B568 293 294#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_27 0xC4B56C 295 296#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_28 0xC4B570 297 298#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_29 0xC4B574 299 300#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_30 0xC4B578 301 302#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_31 0xC4B57C 303 304#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_32 0xC4B580 305 306#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_33 0xC4B584 307 308#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_34 0xC4B588 309 310#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_35 0xC4B58C 311 312#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_36 0xC4B590 313 314#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_37 0xC4B594 315 316#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_38 0xC4B598 317 318#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_39 0xC4B59C 319 320#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_40 0xC4B5A0 321 322#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_41 0xC4B5A4 323 324#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_42 0xC4B5A8 325 326#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_43 0xC4B5AC 327 328#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_44 0xC4B5B0 329 330#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_45 0xC4B5B4 331 332#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_46 0xC4B5B8 333 334#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_47 0xC4B5BC 335 336#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_48 0xC4B5C0 337 338#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_49 0xC4B5C4 339 340#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_50 0xC4B5C8 341 342#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_51 0xC4B5CC 343 344#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_52 0xC4B5D0 345 346#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_53 0xC4B5D4 347 348#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_54 0xC4B5D8 349 350#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_55 0xC4B5DC 351 352#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_56 0xC4B5E0 353 354#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_57 0xC4B5E4 355 356#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_58 0xC4B5E8 357 358#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_59 0xC4B5EC 359 360#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_60 0xC4B5F0 361 362#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_61 0xC4B5F4 363 364#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_62 0xC4B5F8 365 366#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_63 0xC4B5FC 367 368#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_64 0xC4B600 369 370#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_65 0xC4B604 371 372#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_66 0xC4B608 373 374#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_67 0xC4B60C 375 376#define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_68 0xC4B610 377 378#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_0 0xC4B640 379 380#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_1 0xC4B644 381 382#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_2 0xC4B648 383 384#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_3 0xC4B64C 385 386#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_4 0xC4B650 387 388#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_5 0xC4B654 389 390#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_6 0xC4B658 391 392#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_7 0xC4B65C 393 394#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_8 0xC4B660 395 396#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_9 0xC4B664 397 398#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_10 0xC4B668 399 400#define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_11 0xC4B66C 401 402#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_0 0xC4B680 403 404#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_1 0xC4B684 405 406#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_2 0xC4B688 407 408#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_3 0xC4B68C 409 410#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_4 0xC4B690 411 412#define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_5 0xC4B694 413 414#define mmPSOC_GLOBAL_CONF_BNK3V3_MS 0xC4B6E0 415 416#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_0 0xC4B700 417 418#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_1 0xC4B704 419 420#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_2 0xC4B708 421 422#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_3 0xC4B70C 423 424#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_4 0xC4B710 425 426#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_5 0xC4B714 427 428#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_6 0xC4B718 429 430#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_7 0xC4B71C 431 432#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_8 0xC4B720 433 434#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_9 0xC4B724 435 436#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_10 0xC4B728 437 438#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_11 0xC4B72C 439 440#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_12 0xC4B730 441 442#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_13 0xC4B734 443 444#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_14 0xC4B738 445 446#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_15 0xC4B73C 447 448#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_16 0xC4B740 449 450#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_17 0xC4B744 451 452#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_18 0xC4B748 453 454#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_19 0xC4B74C 455 456#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_20 0xC4B750 457 458#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_21 0xC4B754 459 460#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_22 0xC4B758 461 462#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_23 0xC4B75C 463 464#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_24 0xC4B760 465 466#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_25 0xC4B764 467 468#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_26 0xC4B768 469 470#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_27 0xC4B76C 471 472#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_28 0xC4B770 473 474#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_29 0xC4B774 475 476#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_30 0xC4B778 477 478#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_31 0xC4B77C 479 480#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_32 0xC4B780 481 482#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_33 0xC4B784 483 484#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_34 0xC4B788 485 486#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_35 0xC4B78C 487 488#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_36 0xC4B790 489 490#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_37 0xC4B794 491 492#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_38 0xC4B798 493 494#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_39 0xC4B79C 495 496#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_40 0xC4B7A0 497 498#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_41 0xC4B7A4 499 500#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_42 0xC4B7A8 501 502#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_43 0xC4B7AC 503 504#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_44 0xC4B7B0 505 506#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_45 0xC4B7B4 507 508#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_46 0xC4B7B8 509 510#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_47 0xC4B7BC 511 512#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_48 0xC4B7C0 513 514#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_49 0xC4B7C4 515 516#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_50 0xC4B7C8 517 518#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_51 0xC4B7CC 519 520#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_52 0xC4B7D0 521 522#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_53 0xC4B7D4 523 524#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_54 0xC4B7D8 525 526#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_55 0xC4B7DC 527 528#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_56 0xC4B7E0 529 530#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_57 0xC4B7E4 531 532#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_58 0xC4B7E8 533 534#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_59 0xC4B7EC 535 536#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_60 0xC4B7F0 537 538#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_61 0xC4B7F4 539 540#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_62 0xC4B7F8 541 542#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_63 0xC4B7FC 543 544#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_64 0xC4B800 545 546#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_65 0xC4B804 547 548#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_66 0xC4B808 549 550#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_67 0xC4B80C 551 552#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_68 0xC4B810 553 554#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_69 0xC4B814 555 556#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_70 0xC4B818 557 558#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_71 0xC4B81C 559 560#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_72 0xC4B820 561 562#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_73 0xC4B824 563 564#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_74 0xC4B828 565 566#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_75 0xC4B82C 567 568#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_76 0xC4B830 569 570#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_77 0xC4B834 571 572#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_78 0xC4B838 573 574#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_79 0xC4B83C 575 576#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_80 0xC4B840 577 578#define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_81 0xC4B844 579 580#define mmPSOC_GLOBAL_CONF_PAD_SEL_0 0xC4B900 581 582#define mmPSOC_GLOBAL_CONF_PAD_SEL_1 0xC4B904 583 584#define mmPSOC_GLOBAL_CONF_PAD_SEL_2 0xC4B908 585 586#define mmPSOC_GLOBAL_CONF_PAD_SEL_3 0xC4B90C 587 588#define mmPSOC_GLOBAL_CONF_PAD_SEL_4 0xC4B910 589 590#define mmPSOC_GLOBAL_CONF_PAD_SEL_5 0xC4B914 591 592#define mmPSOC_GLOBAL_CONF_PAD_SEL_6 0xC4B918 593 594#define mmPSOC_GLOBAL_CONF_PAD_SEL_7 0xC4B91C 595 596#define mmPSOC_GLOBAL_CONF_PAD_SEL_8 0xC4B920 597 598#define mmPSOC_GLOBAL_CONF_PAD_SEL_9 0xC4B924 599 600#define mmPSOC_GLOBAL_CONF_PAD_SEL_10 0xC4B928 601 602#define mmPSOC_GLOBAL_CONF_PAD_SEL_11 0xC4B92C 603 604#define mmPSOC_GLOBAL_CONF_PAD_SEL_12 0xC4B930 605 606#define mmPSOC_GLOBAL_CONF_PAD_SEL_13 0xC4B934 607 608#define mmPSOC_GLOBAL_CONF_PAD_SEL_14 0xC4B938 609 610#define mmPSOC_GLOBAL_CONF_PAD_SEL_15 0xC4B93C 611 612#define mmPSOC_GLOBAL_CONF_PAD_SEL_16 0xC4B940 613 614#define mmPSOC_GLOBAL_CONF_PAD_SEL_17 0xC4B944 615 616#define mmPSOC_GLOBAL_CONF_PAD_SEL_18 0xC4B948 617 618#define mmPSOC_GLOBAL_CONF_PAD_SEL_19 0xC4B94C 619 620#define mmPSOC_GLOBAL_CONF_PAD_SEL_20 0xC4B950 621 622#define mmPSOC_GLOBAL_CONF_PAD_SEL_21 0xC4B954 623 624#define mmPSOC_GLOBAL_CONF_PAD_SEL_22 0xC4B958 625 626#define mmPSOC_GLOBAL_CONF_PAD_SEL_23 0xC4B95C 627 628#define mmPSOC_GLOBAL_CONF_PAD_SEL_24 0xC4B960 629 630#define mmPSOC_GLOBAL_CONF_PAD_SEL_25 0xC4B964 631 632#define mmPSOC_GLOBAL_CONF_PAD_SEL_26 0xC4B968 633 634#define mmPSOC_GLOBAL_CONF_PAD_SEL_27 0xC4B96C 635 636#define mmPSOC_GLOBAL_CONF_PAD_SEL_28 0xC4B970 637 638#define mmPSOC_GLOBAL_CONF_PAD_SEL_29 0xC4B974 639 640#define mmPSOC_GLOBAL_CONF_PAD_SEL_30 0xC4B978 641 642#define mmPSOC_GLOBAL_CONF_PAD_SEL_31 0xC4B97C 643 644#define mmPSOC_GLOBAL_CONF_PAD_SEL_32 0xC4B980 645 646#define mmPSOC_GLOBAL_CONF_PAD_SEL_33 0xC4B984 647 648#define mmPSOC_GLOBAL_CONF_PAD_SEL_34 0xC4B988 649 650#define mmPSOC_GLOBAL_CONF_PAD_SEL_35 0xC4B98C 651 652#define mmPSOC_GLOBAL_CONF_PAD_SEL_36 0xC4B990 653 654#define mmPSOC_GLOBAL_CONF_PAD_SEL_37 0xC4B994 655 656#define mmPSOC_GLOBAL_CONF_PAD_SEL_38 0xC4B998 657 658#define mmPSOC_GLOBAL_CONF_PAD_SEL_39 0xC4B99C 659 660#define mmPSOC_GLOBAL_CONF_PAD_SEL_40 0xC4B9A0 661 662#define mmPSOC_GLOBAL_CONF_PAD_SEL_41 0xC4B9A4 663 664#define mmPSOC_GLOBAL_CONF_PAD_SEL_42 0xC4B9A8 665 666#define mmPSOC_GLOBAL_CONF_PAD_SEL_43 0xC4B9AC 667 668#define mmPSOC_GLOBAL_CONF_PAD_SEL_44 0xC4B9B0 669 670#define mmPSOC_GLOBAL_CONF_PAD_SEL_45 0xC4B9B4 671 672#define mmPSOC_GLOBAL_CONF_PAD_SEL_46 0xC4B9B8 673 674#define mmPSOC_GLOBAL_CONF_PAD_SEL_47 0xC4B9BC 675 676#define mmPSOC_GLOBAL_CONF_PAD_SEL_48 0xC4B9C0 677 678#define mmPSOC_GLOBAL_CONF_PAD_SEL_49 0xC4B9C4 679 680#define mmPSOC_GLOBAL_CONF_PAD_SEL_50 0xC4B9C8 681 682#define mmPSOC_GLOBAL_CONF_PAD_SEL_51 0xC4B9CC 683 684#define mmPSOC_GLOBAL_CONF_PAD_SEL_52 0xC4B9D0 685 686#define mmPSOC_GLOBAL_CONF_PAD_SEL_53 0xC4B9D4 687 688#define mmPSOC_GLOBAL_CONF_PAD_SEL_54 0xC4B9D8 689 690#define mmPSOC_GLOBAL_CONF_PAD_SEL_55 0xC4B9DC 691 692#define mmPSOC_GLOBAL_CONF_PAD_SEL_56 0xC4B9E0 693 694#define mmPSOC_GLOBAL_CONF_PAD_SEL_57 0xC4B9E4 695 696#define mmPSOC_GLOBAL_CONF_PAD_SEL_58 0xC4B9E8 697 698#define mmPSOC_GLOBAL_CONF_PAD_SEL_59 0xC4B9EC 699 700#define mmPSOC_GLOBAL_CONF_PAD_SEL_60 0xC4B9F0 701 702#define mmPSOC_GLOBAL_CONF_PAD_SEL_61 0xC4B9F4 703 704#define mmPSOC_GLOBAL_CONF_PAD_SEL_62 0xC4B9F8 705 706#define mmPSOC_GLOBAL_CONF_PAD_SEL_63 0xC4B9FC 707 708#define mmPSOC_GLOBAL_CONF_PAD_SEL_64 0xC4BA00 709 710#define mmPSOC_GLOBAL_CONF_PAD_SEL_65 0xC4BA04 711 712#define mmPSOC_GLOBAL_CONF_PAD_SEL_66 0xC4BA08 713 714#define mmPSOC_GLOBAL_CONF_PAD_SEL_67 0xC4BA0C 715 716#define mmPSOC_GLOBAL_CONF_PAD_SEL_68 0xC4BA10 717 718#define mmPSOC_GLOBAL_CONF_PAD_SEL_69 0xC4BA14 719 720#define mmPSOC_GLOBAL_CONF_PAD_SEL_70 0xC4BA18 721 722#define mmPSOC_GLOBAL_CONF_PAD_SEL_71 0xC4BA1C 723 724#define mmPSOC_GLOBAL_CONF_PAD_SEL_72 0xC4BA20 725 726#define mmPSOC_GLOBAL_CONF_PAD_SEL_73 0xC4BA24 727 728#define mmPSOC_GLOBAL_CONF_PAD_SEL_74 0xC4BA28 729 730#define mmPSOC_GLOBAL_CONF_PAD_SEL_75 0xC4BA2C 731 732#define mmPSOC_GLOBAL_CONF_PAD_SEL_76 0xC4BA30 733 734#define mmPSOC_GLOBAL_CONF_PAD_SEL_77 0xC4BA34 735 736#define mmPSOC_GLOBAL_CONF_PAD_SEL_78 0xC4BA38 737 738#define mmPSOC_GLOBAL_CONF_PAD_SEL_79 0xC4BA3C 739 740#define mmPSOC_GLOBAL_CONF_PAD_SEL_80 0xC4BA40 741 742#define mmPSOC_GLOBAL_CONF_PAD_SEL_81 0xC4BA44 743 744#endif /* ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_ */
~/
Read-only file preview.