gaudi2_coresight.h

  1/* SPDX-License-Identifier: GPL-2.0
  2 *
  3 * Copyright 2016-2020 HabanaLabs, Ltd.
  4 * All Rights Reserved.
  5 *
  6 */
  7
  8/************************************
  9 ** This is an auto-generated file **
 10 **       DO NOT EDIT BELOW        **
 11 ************************************/
 12
 13#ifndef GAUDI2_CORESIGHT_H
 14#define GAUDI2_CORESIGHT_H
 15
 16enum gaudi2_debug_stm_regs_index {
 17	GAUDI2_STM_FIRST = 0,
 18	GAUDI2_STM_DCORE0_TPC0_EML = GAUDI2_STM_FIRST,
 19	GAUDI2_STM_DCORE0_TPC1_EML,
 20	GAUDI2_STM_DCORE0_TPC2_EML,
 21	GAUDI2_STM_DCORE0_TPC3_EML,
 22	GAUDI2_STM_DCORE0_TPC4_EML,
 23	GAUDI2_STM_DCORE0_TPC5_EML,
 24	GAUDI2_STM_DCORE0_TPC6_EML,
 25	GAUDI2_STM_DCORE1_TPC0_EML,
 26	GAUDI2_STM_DCORE1_TPC1_EML,
 27	GAUDI2_STM_DCORE1_TPC2_EML,
 28	GAUDI2_STM_DCORE1_TPC3_EML,
 29	GAUDI2_STM_DCORE1_TPC4_EML,
 30	GAUDI2_STM_DCORE1_TPC5_EML,
 31	GAUDI2_STM_DCORE2_TPC0_EML,
 32	GAUDI2_STM_DCORE2_TPC1_EML,
 33	GAUDI2_STM_DCORE2_TPC2_EML,
 34	GAUDI2_STM_DCORE2_TPC3_EML,
 35	GAUDI2_STM_DCORE2_TPC4_EML,
 36	GAUDI2_STM_DCORE2_TPC5_EML,
 37	GAUDI2_STM_DCORE3_TPC0_EML,
 38	GAUDI2_STM_DCORE3_TPC1_EML,
 39	GAUDI2_STM_DCORE3_TPC2_EML,
 40	GAUDI2_STM_DCORE3_TPC3_EML,
 41	GAUDI2_STM_DCORE3_TPC4_EML,
 42	GAUDI2_STM_DCORE3_TPC5_EML,
 43	GAUDI2_STM_DCORE0_HMMU0_CS,
 44	GAUDI2_STM_DCORE0_HMMU1_CS,
 45	GAUDI2_STM_DCORE0_HMMU2_CS,
 46	GAUDI2_STM_DCORE0_HMMU3_CS,
 47	GAUDI2_STM_DCORE0_MME_CTRL,
 48	GAUDI2_STM_DCORE0_MME_SBTE0,
 49	GAUDI2_STM_DCORE0_MME_SBTE1,
 50	GAUDI2_STM_DCORE0_MME_SBTE2,
 51	GAUDI2_STM_DCORE0_MME_SBTE3,
 52	GAUDI2_STM_DCORE0_MME_SBTE4,
 53	GAUDI2_STM_DCORE0_MME_ACC,
 54	GAUDI2_STM_DCORE0_SM,
 55	GAUDI2_STM_DCORE0_EDMA0_CS,
 56	GAUDI2_STM_DCORE0_EDMA1_CS,
 57	GAUDI2_STM_DCORE0_VDEC0_CS,
 58	GAUDI2_STM_DCORE0_VDEC1_CS,
 59	GAUDI2_STM_DCORE1_HMMU0_CS,
 60	GAUDI2_STM_DCORE1_HMMU1_CS,
 61	GAUDI2_STM_DCORE1_HMMU2_CS,
 62	GAUDI2_STM_DCORE1_HMMU3_CS,
 63	GAUDI2_STM_DCORE1_MME_CTRL,
 64	GAUDI2_STM_DCORE1_MME_SBTE0,
 65	GAUDI2_STM_DCORE1_MME_SBTE1,
 66	GAUDI2_STM_DCORE1_MME_SBTE2,
 67	GAUDI2_STM_DCORE1_MME_SBTE3,
 68	GAUDI2_STM_DCORE1_MME_SBTE4,
 69	GAUDI2_STM_DCORE1_MME_ACC,
 70	GAUDI2_STM_DCORE1_SM,
 71	GAUDI2_STM_DCORE1_EDMA0_CS,
 72	GAUDI2_STM_DCORE1_EDMA1_CS,
 73	GAUDI2_STM_DCORE1_VDEC0_CS,
 74	GAUDI2_STM_DCORE1_VDEC1_CS,
 75	GAUDI2_STM_DCORE2_HMMU0_CS,
 76	GAUDI2_STM_DCORE2_HMMU1_CS,
 77	GAUDI2_STM_DCORE2_HMMU2_CS,
 78	GAUDI2_STM_DCORE2_HMMU3_CS,
 79	GAUDI2_STM_DCORE2_MME_CTRL,
 80	GAUDI2_STM_DCORE2_MME_SBTE0,
 81	GAUDI2_STM_DCORE2_MME_SBTE1,
 82	GAUDI2_STM_DCORE2_MME_SBTE2,
 83	GAUDI2_STM_DCORE2_MME_SBTE3,
 84	GAUDI2_STM_DCORE2_MME_SBTE4,
 85	GAUDI2_STM_DCORE2_MME_ACC,
 86	GAUDI2_STM_DCORE2_SM,
 87	GAUDI2_STM_DCORE2_EDMA0_CS,
 88	GAUDI2_STM_DCORE2_EDMA1_CS,
 89	GAUDI2_STM_DCORE2_VDEC0_CS,
 90	GAUDI2_STM_DCORE2_VDEC1_CS,
 91	GAUDI2_STM_DCORE3_HMMU0_CS,
 92	GAUDI2_STM_DCORE3_HMMU1_CS,
 93	GAUDI2_STM_DCORE3_HMMU2_CS,
 94	GAUDI2_STM_DCORE3_HMMU3_CS,
 95	GAUDI2_STM_DCORE3_MME_CTRL,
 96	GAUDI2_STM_DCORE3_MME_SBTE0,
 97	GAUDI2_STM_DCORE3_MME_SBTE1,
 98	GAUDI2_STM_DCORE3_MME_SBTE2,
 99	GAUDI2_STM_DCORE3_MME_SBTE3,
100	GAUDI2_STM_DCORE3_MME_SBTE4,
101	GAUDI2_STM_DCORE3_MME_ACC,
102	GAUDI2_STM_DCORE3_SM,
103	GAUDI2_STM_DCORE3_EDMA0_CS,
104	GAUDI2_STM_DCORE3_EDMA1_CS,
105	GAUDI2_STM_DCORE3_VDEC0_CS,
106	GAUDI2_STM_DCORE3_VDEC1_CS,
107	GAUDI2_STM_PCIE,
108	GAUDI2_STM_PSOC,
109	GAUDI2_STM_PSOC_ARC0_CS,
110	GAUDI2_STM_PSOC_ARC1_CS,
111	GAUDI2_STM_PDMA0_CS,
112	GAUDI2_STM_PDMA1_CS,
113	GAUDI2_STM_CPU,
114	GAUDI2_STM_PMMU_CS,
115	GAUDI2_STM_ROT0_CS,
116	GAUDI2_STM_ROT1_CS,
117	GAUDI2_STM_ARC_FARM_CS,
118	GAUDI2_STM_KDMA_CS,
119	GAUDI2_STM_PCIE_VDEC0_CS,
120	GAUDI2_STM_PCIE_VDEC1_CS,
121	GAUDI2_STM_HBM0_MC0_CS,
122	GAUDI2_STM_HBM0_MC1_CS,
123	GAUDI2_STM_HBM1_MC0_CS,
124	GAUDI2_STM_HBM1_MC1_CS,
125	GAUDI2_STM_HBM2_MC0_CS,
126	GAUDI2_STM_HBM2_MC1_CS,
127	GAUDI2_STM_HBM3_MC0_CS,
128	GAUDI2_STM_HBM3_MC1_CS,
129	GAUDI2_STM_HBM4_MC0_CS,
130	GAUDI2_STM_HBM4_MC1_CS,
131	GAUDI2_STM_HBM5_MC0_CS,
132	GAUDI2_STM_HBM5_MC1_CS,
133	GAUDI2_STM_NIC0_DBG_0,
134	GAUDI2_STM_NIC0_DBG_1,
135	GAUDI2_STM_NIC1_DBG_0,
136	GAUDI2_STM_NIC1_DBG_1,
137	GAUDI2_STM_NIC2_DBG_0,
138	GAUDI2_STM_NIC2_DBG_1,
139	GAUDI2_STM_NIC3_DBG_0,
140	GAUDI2_STM_NIC3_DBG_1,
141	GAUDI2_STM_NIC4_DBG_0,
142	GAUDI2_STM_NIC4_DBG_1,
143	GAUDI2_STM_NIC5_DBG_0,
144	GAUDI2_STM_NIC5_DBG_1,
145	GAUDI2_STM_NIC6_DBG_0,
146	GAUDI2_STM_NIC6_DBG_1,
147	GAUDI2_STM_NIC7_DBG_0,
148	GAUDI2_STM_NIC7_DBG_1,
149	GAUDI2_STM_NIC8_DBG_0,
150	GAUDI2_STM_NIC8_DBG_1,
151	GAUDI2_STM_NIC9_DBG_0,
152	GAUDI2_STM_NIC9_DBG_1,
153	GAUDI2_STM_NIC10_DBG_0,
154	GAUDI2_STM_NIC10_DBG_1,
155	GAUDI2_STM_NIC11_DBG_0,
156	GAUDI2_STM_NIC11_DBG_1,
157	GAUDI2_STM_LAST = GAUDI2_STM_NIC11_DBG_1
158};
159
160enum gaudi2_debug_etf_regs_index {
161	GAUDI2_ETF_FIRST = 0,
162	GAUDI2_ETF_DCORE0_TPC0_EML = GAUDI2_ETF_FIRST,
163	GAUDI2_ETF_DCORE0_TPC1_EML,
164	GAUDI2_ETF_DCORE0_TPC2_EML,
165	GAUDI2_ETF_DCORE0_TPC3_EML,
166	GAUDI2_ETF_DCORE0_TPC4_EML,
167	GAUDI2_ETF_DCORE0_TPC5_EML,
168	GAUDI2_ETF_DCORE0_TPC6_EML,
169	GAUDI2_ETF_DCORE1_TPC0_EML,
170	GAUDI2_ETF_DCORE1_TPC1_EML,
171	GAUDI2_ETF_DCORE1_TPC2_EML,
172	GAUDI2_ETF_DCORE1_TPC3_EML,
173	GAUDI2_ETF_DCORE1_TPC4_EML,
174	GAUDI2_ETF_DCORE1_TPC5_EML,
175	GAUDI2_ETF_DCORE2_TPC0_EML,
176	GAUDI2_ETF_DCORE2_TPC1_EML,
177	GAUDI2_ETF_DCORE2_TPC2_EML,
178	GAUDI2_ETF_DCORE2_TPC3_EML,
179	GAUDI2_ETF_DCORE2_TPC4_EML,
180	GAUDI2_ETF_DCORE2_TPC5_EML,
181	GAUDI2_ETF_DCORE3_TPC0_EML,
182	GAUDI2_ETF_DCORE3_TPC1_EML,
183	GAUDI2_ETF_DCORE3_TPC2_EML,
184	GAUDI2_ETF_DCORE3_TPC3_EML,
185	GAUDI2_ETF_DCORE3_TPC4_EML,
186	GAUDI2_ETF_DCORE3_TPC5_EML,
187	GAUDI2_ETF_DCORE0_HMMU0_CS,
188	GAUDI2_ETF_DCORE0_HMMU1_CS,
189	GAUDI2_ETF_DCORE0_HMMU2_CS,
190	GAUDI2_ETF_DCORE0_HMMU3_CS,
191	GAUDI2_ETF_DCORE0_MME_CTRL,
192	GAUDI2_ETF_DCORE0_MME_SBTE0,
193	GAUDI2_ETF_DCORE0_MME_SBTE1,
194	GAUDI2_ETF_DCORE0_MME_SBTE2,
195	GAUDI2_ETF_DCORE0_MME_SBTE3,
196	GAUDI2_ETF_DCORE0_MME_SBTE4,
197	GAUDI2_ETF_DCORE0_MME_ACC,
198	GAUDI2_ETF_DCORE0_SM,
199	GAUDI2_ETF_DCORE0_EDMA0_CS,
200	GAUDI2_ETF_DCORE0_EDMA1_CS,
201	GAUDI2_ETF_DCORE0_VDEC0_CS,
202	GAUDI2_ETF_DCORE0_VDEC1_CS,
203	GAUDI2_ETF_DCORE1_HMMU0_CS,
204	GAUDI2_ETF_DCORE1_HMMU1_CS,
205	GAUDI2_ETF_DCORE1_HMMU2_CS,
206	GAUDI2_ETF_DCORE1_HMMU3_CS,
207	GAUDI2_ETF_DCORE1_MME_CTRL,
208	GAUDI2_ETF_DCORE1_MME_SBTE0,
209	GAUDI2_ETF_DCORE1_MME_SBTE1,
210	GAUDI2_ETF_DCORE1_MME_SBTE2,
211	GAUDI2_ETF_DCORE1_MME_SBTE3,
212	GAUDI2_ETF_DCORE1_MME_SBTE4,
213	GAUDI2_ETF_DCORE1_MME_ACC,
214	GAUDI2_ETF_DCORE1_SM,
215	GAUDI2_ETF_DCORE1_EDMA0_CS,
216	GAUDI2_ETF_DCORE1_EDMA1_CS,
217	GAUDI2_ETF_DCORE1_VDEC0_CS,
218	GAUDI2_ETF_DCORE1_VDEC1_CS,
219	GAUDI2_ETF_DCORE2_HMMU0_CS,
220	GAUDI2_ETF_DCORE2_HMMU1_CS,
221	GAUDI2_ETF_DCORE2_HMMU2_CS,
222	GAUDI2_ETF_DCORE2_HMMU3_CS,
223	GAUDI2_ETF_DCORE2_MME_CTRL,
224	GAUDI2_ETF_DCORE2_MME_SBTE0,
225	GAUDI2_ETF_DCORE2_MME_SBTE1,
226	GAUDI2_ETF_DCORE2_MME_SBTE2,
227	GAUDI2_ETF_DCORE2_MME_SBTE3,
228	GAUDI2_ETF_DCORE2_MME_SBTE4,
229	GAUDI2_ETF_DCORE2_MME_ACC,
230	GAUDI2_ETF_DCORE2_SM,
231	GAUDI2_ETF_DCORE2_EDMA0_CS,
232	GAUDI2_ETF_DCORE2_EDMA1_CS,
233	GAUDI2_ETF_DCORE2_VDEC0_CS,
234	GAUDI2_ETF_DCORE2_VDEC1_CS,
235	GAUDI2_ETF_DCORE3_HMMU0_CS,
236	GAUDI2_ETF_DCORE3_HMMU1_CS,
237	GAUDI2_ETF_DCORE3_HMMU2_CS,
238	GAUDI2_ETF_DCORE3_HMMU3_CS,
239	GAUDI2_ETF_DCORE3_MME_CTRL,
240	GAUDI2_ETF_DCORE3_MME_SBTE0,
241	GAUDI2_ETF_DCORE3_MME_SBTE1,
242	GAUDI2_ETF_DCORE3_MME_SBTE2,
243	GAUDI2_ETF_DCORE3_MME_SBTE3,
244	GAUDI2_ETF_DCORE3_MME_SBTE4,
245	GAUDI2_ETF_DCORE3_MME_ACC,
246	GAUDI2_ETF_DCORE3_SM,
247	GAUDI2_ETF_DCORE3_EDMA0_CS,
248	GAUDI2_ETF_DCORE3_EDMA1_CS,
249	GAUDI2_ETF_DCORE3_VDEC0_CS,
250	GAUDI2_ETF_DCORE3_VDEC1_CS,
251	GAUDI2_ETF_PCIE,
252	GAUDI2_ETF_PSOC,
253	GAUDI2_ETF_PSOC_ARC0_CS,
254	GAUDI2_ETF_PSOC_ARC1_CS,
255	GAUDI2_ETF_PDMA0_CS,
256	GAUDI2_ETF_PDMA1_CS,
257	GAUDI2_ETF_CPU_0,
258	GAUDI2_ETF_CPU_1,
259	GAUDI2_ETF_CPU_TRACE,
260	GAUDI2_ETF_PMMU_CS,
261	GAUDI2_ETF_ROT0_CS,
262	GAUDI2_ETF_ROT1_CS,
263	GAUDI2_ETF_ARC_FARM_CS,
264	GAUDI2_ETF_KDMA_CS,
265	GAUDI2_ETF_PCIE_VDEC0_CS,
266	GAUDI2_ETF_PCIE_VDEC1_CS,
267	GAUDI2_ETF_HBM0_MC0_CS,
268	GAUDI2_ETF_HBM0_MC1_CS,
269	GAUDI2_ETF_HBM1_MC0_CS,
270	GAUDI2_ETF_HBM1_MC1_CS,
271	GAUDI2_ETF_HBM2_MC0_CS,
272	GAUDI2_ETF_HBM2_MC1_CS,
273	GAUDI2_ETF_HBM3_MC0_CS,
274	GAUDI2_ETF_HBM3_MC1_CS,
275	GAUDI2_ETF_HBM4_MC0_CS,
276	GAUDI2_ETF_HBM4_MC1_CS,
277	GAUDI2_ETF_HBM5_MC0_CS,
278	GAUDI2_ETF_HBM5_MC1_CS,
279	GAUDI2_ETF_NIC0_DBG_0,
280	GAUDI2_ETF_NIC0_DBG_1,
281	GAUDI2_ETF_NIC1_DBG_0,
282	GAUDI2_ETF_NIC1_DBG_1,
283	GAUDI2_ETF_NIC2_DBG_0,
284	GAUDI2_ETF_NIC2_DBG_1,
285	GAUDI2_ETF_NIC3_DBG_0,
286	GAUDI2_ETF_NIC3_DBG_1,
287	GAUDI2_ETF_NIC4_DBG_0,
288	GAUDI2_ETF_NIC4_DBG_1,
289	GAUDI2_ETF_NIC5_DBG_0,
290	GAUDI2_ETF_NIC5_DBG_1,
291	GAUDI2_ETF_NIC6_DBG_0,
292	GAUDI2_ETF_NIC6_DBG_1,
293	GAUDI2_ETF_NIC7_DBG_0,
294	GAUDI2_ETF_NIC7_DBG_1,
295	GAUDI2_ETF_NIC8_DBG_0,
296	GAUDI2_ETF_NIC8_DBG_1,
297	GAUDI2_ETF_NIC9_DBG_0,
298	GAUDI2_ETF_NIC9_DBG_1,
299	GAUDI2_ETF_NIC10_DBG_0,
300	GAUDI2_ETF_NIC10_DBG_1,
301	GAUDI2_ETF_NIC11_DBG_0,
302	GAUDI2_ETF_NIC11_DBG_1,
303	GAUDI2_ETF_LAST = GAUDI2_ETF_NIC11_DBG_1
304};
305
306enum gaudi2_debug_funnel_regs_index {
307	GAUDI2_FUNNEL_FIRST = 0,
308	GAUDI2_FUNNEL_DCORE0_TPC0_EML = GAUDI2_FUNNEL_FIRST,
309	GAUDI2_FUNNEL_DCORE0_TPC1_EML,
310	GAUDI2_FUNNEL_DCORE0_TPC2_EML,
311	GAUDI2_FUNNEL_DCORE0_TPC3_EML,
312	GAUDI2_FUNNEL_DCORE0_TPC4_EML,
313	GAUDI2_FUNNEL_DCORE0_TPC5_EML,
314	GAUDI2_FUNNEL_DCORE0_TPC6_EML,
315	GAUDI2_FUNNEL_DCORE1_TPC0_EML,
316	GAUDI2_FUNNEL_DCORE1_TPC1_EML,
317	GAUDI2_FUNNEL_DCORE1_TPC2_EML,
318	GAUDI2_FUNNEL_DCORE1_TPC3_EML,
319	GAUDI2_FUNNEL_DCORE1_TPC4_EML,
320	GAUDI2_FUNNEL_DCORE1_TPC5_EML,
321	GAUDI2_FUNNEL_DCORE2_TPC0_EML,
322	GAUDI2_FUNNEL_DCORE2_TPC1_EML,
323	GAUDI2_FUNNEL_DCORE2_TPC2_EML,
324	GAUDI2_FUNNEL_DCORE2_TPC3_EML,
325	GAUDI2_FUNNEL_DCORE2_TPC4_EML,
326	GAUDI2_FUNNEL_DCORE2_TPC5_EML,
327	GAUDI2_FUNNEL_DCORE3_TPC0_EML,
328	GAUDI2_FUNNEL_DCORE3_TPC1_EML,
329	GAUDI2_FUNNEL_DCORE3_TPC2_EML,
330	GAUDI2_FUNNEL_DCORE3_TPC3_EML,
331	GAUDI2_FUNNEL_DCORE3_TPC4_EML,
332	GAUDI2_FUNNEL_DCORE3_TPC5_EML,
333	GAUDI2_FUNNEL_DCORE0_XFT,
334	GAUDI2_FUNNEL_DCORE0_TFT0,
335	GAUDI2_FUNNEL_DCORE0_TFT1,
336	GAUDI2_FUNNEL_DCORE0_TFT2,
337	GAUDI2_FUNNEL_DCORE0_RTR0,
338	GAUDI2_FUNNEL_DCORE0_RTR1,
339	GAUDI2_FUNNEL_DCORE0_RTR2,
340	GAUDI2_FUNNEL_DCORE0_RTR3,
341	GAUDI2_FUNNEL_DCORE0_RTR4,
342	GAUDI2_FUNNEL_DCORE0_MIF0,
343	GAUDI2_FUNNEL_DCORE0_RTR5,
344	GAUDI2_FUNNEL_DCORE0_MIF1,
345	GAUDI2_FUNNEL_DCORE0_RTR6,
346	GAUDI2_FUNNEL_DCORE0_MIF2,
347	GAUDI2_FUNNEL_DCORE0_RTR7,
348	GAUDI2_FUNNEL_DCORE0_MIF3,
349	GAUDI2_FUNNEL_DCORE1_XFT,
350	GAUDI2_FUNNEL_DCORE1_TFT0,
351	GAUDI2_FUNNEL_DCORE1_TFT1,
352	GAUDI2_FUNNEL_DCORE1_TFT2,
353	GAUDI2_FUNNEL_DCORE1_RTR0,
354	GAUDI2_FUNNEL_DCORE1_MIF0,
355	GAUDI2_FUNNEL_DCORE1_RTR1,
356	GAUDI2_FUNNEL_DCORE1_MIF1,
357	GAUDI2_FUNNEL_DCORE1_RTR2,
358	GAUDI2_FUNNEL_DCORE1_MIF2,
359	GAUDI2_FUNNEL_DCORE1_RTR3,
360	GAUDI2_FUNNEL_DCORE1_MIF3,
361	GAUDI2_FUNNEL_DCORE1_RTR4,
362	GAUDI2_FUNNEL_DCORE1_RTR5,
363	GAUDI2_FUNNEL_DCORE1_RTR6,
364	GAUDI2_FUNNEL_DCORE1_RTR7,
365	GAUDI2_FUNNEL_DCORE2_XFT,
366	GAUDI2_FUNNEL_DCORE2_TFT0,
367	GAUDI2_FUNNEL_DCORE2_TFT1,
368	GAUDI2_FUNNEL_DCORE2_TFT2,
369	GAUDI2_FUNNEL_DCORE2_RTR0,
370	GAUDI2_FUNNEL_DCORE2_RTR1,
371	GAUDI2_FUNNEL_DCORE2_RTR2,
372	GAUDI2_FUNNEL_DCORE2_RTR3,
373	GAUDI2_FUNNEL_DCORE2_RTR4,
374	GAUDI2_FUNNEL_DCORE2_MIF0,
375	GAUDI2_FUNNEL_DCORE2_RTR5,
376	GAUDI2_FUNNEL_DCORE2_MIF1,
377	GAUDI2_FUNNEL_DCORE2_RTR6,
378	GAUDI2_FUNNEL_DCORE2_MIF2,
379	GAUDI2_FUNNEL_DCORE2_RTR7,
380	GAUDI2_FUNNEL_DCORE2_MIF3,
381	GAUDI2_FUNNEL_DCORE3_XFT,
382	GAUDI2_FUNNEL_DCORE3_TFT0,
383	GAUDI2_FUNNEL_DCORE3_TFT1,
384	GAUDI2_FUNNEL_DCORE3_TFT2,
385	GAUDI2_FUNNEL_DCORE3_RTR0,
386	GAUDI2_FUNNEL_DCORE3_MIF0,
387	GAUDI2_FUNNEL_DCORE3_RTR1,
388	GAUDI2_FUNNEL_DCORE3_MIF1,
389	GAUDI2_FUNNEL_DCORE3_RTR2,
390	GAUDI2_FUNNEL_DCORE3_MIF2,
391	GAUDI2_FUNNEL_DCORE3_RTR3,
392	GAUDI2_FUNNEL_DCORE3_MIF3,
393	GAUDI2_FUNNEL_DCORE3_RTR4,
394	GAUDI2_FUNNEL_DCORE3_RTR5,
395	GAUDI2_FUNNEL_DCORE3_RTR6,
396	GAUDI2_FUNNEL_DCORE3_RTR7,
397	GAUDI2_FUNNEL_PSOC,
398	GAUDI2_FUNNEL_PSOC_ARC0,
399	GAUDI2_FUNNEL_PSOC_ARC1,
400	GAUDI2_FUNNEL_XDMA,
401	GAUDI2_FUNNEL_CPU,
402	GAUDI2_FUNNEL_PMMU,
403	GAUDI2_FUNNEL_PMMU_DEC,
404	GAUDI2_FUNNEL_DCORE0_XBAR_MID,
405	GAUDI2_FUNNEL_DCORE0_XBAR_EDGE,
406	GAUDI2_FUNNEL_DCORE1_XBAR_MID,
407	GAUDI2_FUNNEL_DCORE1_XBAR_EDGE,
408	GAUDI2_FUNNEL_DCORE2_XBAR_MID,
409	GAUDI2_FUNNEL_DCORE2_XBAR_EDGE,
410	GAUDI2_FUNNEL_DCORE3_XBAR_MID,
411	GAUDI2_FUNNEL_DCORE3_XBAR_EDGE,
412	GAUDI2_FUNNEL_ARC_FARM,
413	GAUDI2_FUNNEL_HBM0_MC0,
414	GAUDI2_FUNNEL_HBM0_MC1,
415	GAUDI2_FUNNEL_HBM1_MC0,
416	GAUDI2_FUNNEL_HBM1_MC1,
417	GAUDI2_FUNNEL_HBM2_MC0,
418	GAUDI2_FUNNEL_HBM2_MC1,
419	GAUDI2_FUNNEL_HBM3_MC0,
420	GAUDI2_FUNNEL_HBM3_MC1,
421	GAUDI2_FUNNEL_HBM4_MC0,
422	GAUDI2_FUNNEL_HBM4_MC1,
423	GAUDI2_FUNNEL_HBM5_MC0,
424	GAUDI2_FUNNEL_HBM5_MC1,
425	GAUDI2_FUNNEL_NIC0_DBG_TX,
426	GAUDI2_FUNNEL_NIC0_DBG_NCH,
427	GAUDI2_FUNNEL_NIC1_DBG_TX,
428	GAUDI2_FUNNEL_NIC1_DBG_NCH,
429	GAUDI2_FUNNEL_NIC2_DBG_TX,
430	GAUDI2_FUNNEL_NIC2_DBG_NCH,
431	GAUDI2_FUNNEL_NIC3_DBG_TX,
432	GAUDI2_FUNNEL_NIC3_DBG_NCH,
433	GAUDI2_FUNNEL_NIC4_DBG_TX,
434	GAUDI2_FUNNEL_NIC4_DBG_NCH,
435	GAUDI2_FUNNEL_NIC5_DBG_TX,
436	GAUDI2_FUNNEL_NIC5_DBG_NCH,
437	GAUDI2_FUNNEL_NIC6_DBG_TX,
438	GAUDI2_FUNNEL_NIC6_DBG_NCH,
439	GAUDI2_FUNNEL_NIC7_DBG_TX,
440	GAUDI2_FUNNEL_NIC7_DBG_NCH,
441	GAUDI2_FUNNEL_NIC8_DBG_TX,
442	GAUDI2_FUNNEL_NIC8_DBG_NCH,
443	GAUDI2_FUNNEL_NIC9_DBG_TX,
444	GAUDI2_FUNNEL_NIC9_DBG_NCH,
445	GAUDI2_FUNNEL_NIC10_DBG_TX,
446	GAUDI2_FUNNEL_NIC10_DBG_NCH,
447	GAUDI2_FUNNEL_NIC11_DBG_TX,
448	GAUDI2_FUNNEL_NIC11_DBG_NCH,
449	GAUDI2_FUNNEL_LAST = GAUDI2_FUNNEL_NIC11_DBG_NCH
450};
451
452enum gaudi2_debug_bmon_regs_index {
453	GAUDI2_BMON_FIRST = 0,
454	GAUDI2_BMON_DCORE0_TPC0_EML_0 = GAUDI2_BMON_FIRST,
455	GAUDI2_BMON_DCORE0_TPC0_EML_1,
456	GAUDI2_BMON_DCORE0_TPC0_EML_2,
457	GAUDI2_BMON_DCORE0_TPC0_EML_3,
458	GAUDI2_BMON_DCORE0_TPC1_EML_0,
459	GAUDI2_BMON_DCORE0_TPC1_EML_1,
460	GAUDI2_BMON_DCORE0_TPC1_EML_2,
461	GAUDI2_BMON_DCORE0_TPC1_EML_3,
462	GAUDI2_BMON_DCORE0_TPC2_EML_0,
463	GAUDI2_BMON_DCORE0_TPC2_EML_1,
464	GAUDI2_BMON_DCORE0_TPC2_EML_2,
465	GAUDI2_BMON_DCORE0_TPC2_EML_3,
466	GAUDI2_BMON_DCORE0_TPC3_EML_0,
467	GAUDI2_BMON_DCORE0_TPC3_EML_1,
468	GAUDI2_BMON_DCORE0_TPC3_EML_2,
469	GAUDI2_BMON_DCORE0_TPC3_EML_3,
470	GAUDI2_BMON_DCORE0_TPC4_EML_0,
471	GAUDI2_BMON_DCORE0_TPC4_EML_1,
472	GAUDI2_BMON_DCORE0_TPC4_EML_2,
473	GAUDI2_BMON_DCORE0_TPC4_EML_3,
474	GAUDI2_BMON_DCORE0_TPC5_EML_0,
475	GAUDI2_BMON_DCORE0_TPC5_EML_1,
476	GAUDI2_BMON_DCORE0_TPC5_EML_2,
477	GAUDI2_BMON_DCORE0_TPC5_EML_3,
478	GAUDI2_BMON_DCORE0_TPC6_EML_0,
479	GAUDI2_BMON_DCORE0_TPC6_EML_1,
480	GAUDI2_BMON_DCORE0_TPC6_EML_2,
481	GAUDI2_BMON_DCORE0_TPC6_EML_3,
482	GAUDI2_BMON_DCORE1_TPC0_EML_0,
483	GAUDI2_BMON_DCORE1_TPC0_EML_1,
484	GAUDI2_BMON_DCORE1_TPC0_EML_2,
485	GAUDI2_BMON_DCORE1_TPC0_EML_3,
486	GAUDI2_BMON_DCORE1_TPC1_EML_0,
487	GAUDI2_BMON_DCORE1_TPC1_EML_1,
488	GAUDI2_BMON_DCORE1_TPC1_EML_2,
489	GAUDI2_BMON_DCORE1_TPC1_EML_3,
490	GAUDI2_BMON_DCORE1_TPC2_EML_0,
491	GAUDI2_BMON_DCORE1_TPC2_EML_1,
492	GAUDI2_BMON_DCORE1_TPC2_EML_2,
493	GAUDI2_BMON_DCORE1_TPC2_EML_3,
494	GAUDI2_BMON_DCORE1_TPC3_EML_0,
495	GAUDI2_BMON_DCORE1_TPC3_EML_1,
496	GAUDI2_BMON_DCORE1_TPC3_EML_2,
497	GAUDI2_BMON_DCORE1_TPC3_EML_3,
498	GAUDI2_BMON_DCORE1_TPC4_EML_0,
499	GAUDI2_BMON_DCORE1_TPC4_EML_1,
500	GAUDI2_BMON_DCORE1_TPC4_EML_2,
501	GAUDI2_BMON_DCORE1_TPC4_EML_3,
502	GAUDI2_BMON_DCORE1_TPC5_EML_0,
503	GAUDI2_BMON_DCORE1_TPC5_EML_1,
504	GAUDI2_BMON_DCORE1_TPC5_EML_2,
505	GAUDI2_BMON_DCORE1_TPC5_EML_3,
506	GAUDI2_BMON_DCORE2_TPC0_EML_0,
507	GAUDI2_BMON_DCORE2_TPC0_EML_1,
508	GAUDI2_BMON_DCORE2_TPC0_EML_2,
509	GAUDI2_BMON_DCORE2_TPC0_EML_3,
510	GAUDI2_BMON_DCORE2_TPC1_EML_0,
511	GAUDI2_BMON_DCORE2_TPC1_EML_1,
512	GAUDI2_BMON_DCORE2_TPC1_EML_2,
513	GAUDI2_BMON_DCORE2_TPC1_EML_3,
514	GAUDI2_BMON_DCORE2_TPC2_EML_0,
515	GAUDI2_BMON_DCORE2_TPC2_EML_1,
516	GAUDI2_BMON_DCORE2_TPC2_EML_2,
517	GAUDI2_BMON_DCORE2_TPC2_EML_3,
518	GAUDI2_BMON_DCORE2_TPC3_EML_0,
519	GAUDI2_BMON_DCORE2_TPC3_EML_1,
520	GAUDI2_BMON_DCORE2_TPC3_EML_2,
521	GAUDI2_BMON_DCORE2_TPC3_EML_3,
522	GAUDI2_BMON_DCORE2_TPC4_EML_0,
523	GAUDI2_BMON_DCORE2_TPC4_EML_1,
524	GAUDI2_BMON_DCORE2_TPC4_EML_2,
525	GAUDI2_BMON_DCORE2_TPC4_EML_3,
526	GAUDI2_BMON_DCORE2_TPC5_EML_0,
527	GAUDI2_BMON_DCORE2_TPC5_EML_1,
528	GAUDI2_BMON_DCORE2_TPC5_EML_2,
529	GAUDI2_BMON_DCORE2_TPC5_EML_3,
530	GAUDI2_BMON_DCORE3_TPC0_EML_0,
531	GAUDI2_BMON_DCORE3_TPC0_EML_1,
532	GAUDI2_BMON_DCORE3_TPC0_EML_2,
533	GAUDI2_BMON_DCORE3_TPC0_EML_3,
534	GAUDI2_BMON_DCORE3_TPC1_EML_0,
535	GAUDI2_BMON_DCORE3_TPC1_EML_1,
536	GAUDI2_BMON_DCORE3_TPC1_EML_2,
537	GAUDI2_BMON_DCORE3_TPC1_EML_3,
538	GAUDI2_BMON_DCORE3_TPC2_EML_0,
539	GAUDI2_BMON_DCORE3_TPC2_EML_1,
540	GAUDI2_BMON_DCORE3_TPC2_EML_2,
541	GAUDI2_BMON_DCORE3_TPC2_EML_3,
542	GAUDI2_BMON_DCORE3_TPC3_EML_0,
543	GAUDI2_BMON_DCORE3_TPC3_EML_1,
544	GAUDI2_BMON_DCORE3_TPC3_EML_2,
545	GAUDI2_BMON_DCORE3_TPC3_EML_3,
546	GAUDI2_BMON_DCORE3_TPC4_EML_0,
547	GAUDI2_BMON_DCORE3_TPC4_EML_1,
548	GAUDI2_BMON_DCORE3_TPC4_EML_2,
549	GAUDI2_BMON_DCORE3_TPC4_EML_3,
550	GAUDI2_BMON_DCORE3_TPC5_EML_0,
551	GAUDI2_BMON_DCORE3_TPC5_EML_1,
552	GAUDI2_BMON_DCORE3_TPC5_EML_2,
553	GAUDI2_BMON_DCORE3_TPC5_EML_3,
554	GAUDI2_BMON_DCORE0_HMMU0_0,
555	GAUDI2_BMON_DCORE0_HMMU0_1,
556	GAUDI2_BMON_DCORE0_HMMU0_3,
557	GAUDI2_BMON_DCORE0_HMMU0_2,
558	GAUDI2_BMON_DCORE0_HMMU0_4,
559	GAUDI2_BMON_DCORE0_HMMU1_0,
560	GAUDI2_BMON_DCORE0_HMMU1_1,
561	GAUDI2_BMON_DCORE0_HMMU1_3,
562	GAUDI2_BMON_DCORE0_HMMU1_2,
563	GAUDI2_BMON_DCORE0_HMMU1_4,
564	GAUDI2_BMON_DCORE0_HMMU2_0,
565	GAUDI2_BMON_DCORE0_HMMU2_1,
566	GAUDI2_BMON_DCORE0_HMMU2_3,
567	GAUDI2_BMON_DCORE0_HMMU2_2,
568	GAUDI2_BMON_DCORE0_HMMU2_4,
569	GAUDI2_BMON_DCORE0_HMMU3_0,
570	GAUDI2_BMON_DCORE0_HMMU3_1,
571	GAUDI2_BMON_DCORE0_HMMU3_3,
572	GAUDI2_BMON_DCORE0_HMMU3_2,
573	GAUDI2_BMON_DCORE0_HMMU3_4,
574	GAUDI2_BMON_DCORE0_MME_CTRL_0,
575	GAUDI2_BMON_DCORE0_MME_CTRL_1,
576	GAUDI2_BMON_DCORE0_MME_CTRL_2,
577	GAUDI2_BMON_DCORE0_MME_CTRL_3,
578	GAUDI2_BMON_DCORE0_MME_SBTE0_0,
579	GAUDI2_BMON_DCORE0_MME_SBTE1_0,
580	GAUDI2_BMON_DCORE0_MME_SBTE2_0,
581	GAUDI2_BMON_DCORE0_MME_SBTE3_0,
582	GAUDI2_BMON_DCORE0_MME_SBTE4_0,
583	GAUDI2_BMON_DCORE0_MME_ACC_0,
584	GAUDI2_BMON_DCORE0_MME_ACC_1,
585	GAUDI2_BMON_DCORE0_SM,
586	GAUDI2_BMON_DCORE0_SM_1,
587	GAUDI2_BMON_DCORE0_EDMA0_0,
588	GAUDI2_BMON_DCORE0_EDMA0_1,
589	GAUDI2_BMON_DCORE0_EDMA1_0,
590	GAUDI2_BMON_DCORE0_EDMA1_1,
591	GAUDI2_BMON_DCORE0_VDEC0_0,
592	GAUDI2_BMON_DCORE0_VDEC0_1,
593	GAUDI2_BMON_DCORE0_VDEC0_2,
594	GAUDI2_BMON_DCORE0_VDEC1_0,
595	GAUDI2_BMON_DCORE0_VDEC1_1,
596	GAUDI2_BMON_DCORE0_VDEC1_2,
597	GAUDI2_BMON_DCORE1_HMMU0_0,
598	GAUDI2_BMON_DCORE1_HMMU0_1,
599	GAUDI2_BMON_DCORE1_HMMU0_3,
600	GAUDI2_BMON_DCORE1_HMMU0_2,
601	GAUDI2_BMON_DCORE1_HMMU0_4,
602	GAUDI2_BMON_DCORE1_HMMU1_0,
603	GAUDI2_BMON_DCORE1_HMMU1_1,
604	GAUDI2_BMON_DCORE1_HMMU1_3,
605	GAUDI2_BMON_DCORE1_HMMU1_2,
606	GAUDI2_BMON_DCORE1_HMMU1_4,
607	GAUDI2_BMON_DCORE1_HMMU2_0,
608	GAUDI2_BMON_DCORE1_HMMU2_1,
609	GAUDI2_BMON_DCORE1_HMMU2_3,
610	GAUDI2_BMON_DCORE1_HMMU2_2,
611	GAUDI2_BMON_DCORE1_HMMU2_4,
612	GAUDI2_BMON_DCORE1_HMMU3_0,
613	GAUDI2_BMON_DCORE1_HMMU3_1,
614	GAUDI2_BMON_DCORE1_HMMU3_3,
615	GAUDI2_BMON_DCORE1_HMMU3_2,
616	GAUDI2_BMON_DCORE1_HMMU3_4,
617	GAUDI2_BMON_DCORE1_MME_CTRL_0,
618	GAUDI2_BMON_DCORE1_MME_CTRL_1,
619	GAUDI2_BMON_DCORE1_MME_CTRL_2,
620	GAUDI2_BMON_DCORE1_MME_CTRL_3,
621	GAUDI2_BMON_DCORE1_MME_SBTE0_0,
622	GAUDI2_BMON_DCORE1_MME_SBTE1_0,
623	GAUDI2_BMON_DCORE1_MME_SBTE2_0,
624	GAUDI2_BMON_DCORE1_MME_SBTE3_0,
625	GAUDI2_BMON_DCORE1_MME_SBTE4_0,
626	GAUDI2_BMON_DCORE1_MME_ACC_0,
627	GAUDI2_BMON_DCORE1_MME_ACC_1,
628	GAUDI2_BMON_DCORE1_SM,
629	GAUDI2_BMON_DCORE1_SM_1,
630	GAUDI2_BMON_DCORE1_EDMA0_0,
631	GAUDI2_BMON_DCORE1_EDMA0_1,
632	GAUDI2_BMON_DCORE1_EDMA1_0,
633	GAUDI2_BMON_DCORE1_EDMA1_1,
634	GAUDI2_BMON_DCORE1_VDEC0_0,
635	GAUDI2_BMON_DCORE1_VDEC0_1,
636	GAUDI2_BMON_DCORE1_VDEC0_2,
637	GAUDI2_BMON_DCORE1_VDEC1_0,
638	GAUDI2_BMON_DCORE1_VDEC1_1,
639	GAUDI2_BMON_DCORE1_VDEC1_2,
640	GAUDI2_BMON_DCORE2_HMMU0_0,
641	GAUDI2_BMON_DCORE2_HMMU0_1,
642	GAUDI2_BMON_DCORE2_HMMU0_3,
643	GAUDI2_BMON_DCORE2_HMMU0_2,
644	GAUDI2_BMON_DCORE2_HMMU0_4,
645	GAUDI2_BMON_DCORE2_HMMU1_0,
646	GAUDI2_BMON_DCORE2_HMMU1_1,
647	GAUDI2_BMON_DCORE2_HMMU1_3,
648	GAUDI2_BMON_DCORE2_HMMU1_2,
649	GAUDI2_BMON_DCORE2_HMMU1_4,
650	GAUDI2_BMON_DCORE2_HMMU2_0,
651	GAUDI2_BMON_DCORE2_HMMU2_1,
652	GAUDI2_BMON_DCORE2_HMMU2_3,
653	GAUDI2_BMON_DCORE2_HMMU2_2,
654	GAUDI2_BMON_DCORE2_HMMU2_4,
655	GAUDI2_BMON_DCORE2_HMMU3_0,
656	GAUDI2_BMON_DCORE2_HMMU3_1,
657	GAUDI2_BMON_DCORE2_HMMU3_3,
658	GAUDI2_BMON_DCORE2_HMMU3_2,
659	GAUDI2_BMON_DCORE2_HMMU3_4,
660	GAUDI2_BMON_DCORE2_MME_CTRL_0,
661	GAUDI2_BMON_DCORE2_MME_CTRL_1,
662	GAUDI2_BMON_DCORE2_MME_CTRL_2,
663	GAUDI2_BMON_DCORE2_MME_CTRL_3,
664	GAUDI2_BMON_DCORE2_MME_SBTE0_0,
665	GAUDI2_BMON_DCORE2_MME_SBTE1_0,
666	GAUDI2_BMON_DCORE2_MME_SBTE2_0,
667	GAUDI2_BMON_DCORE2_MME_SBTE3_0,
668	GAUDI2_BMON_DCORE2_MME_SBTE4_0,
669	GAUDI2_BMON_DCORE2_MME_ACC_0,
670	GAUDI2_BMON_DCORE2_MME_ACC_1,
671	GAUDI2_BMON_DCORE2_SM,
672	GAUDI2_BMON_DCORE2_SM_1,
673	GAUDI2_BMON_DCORE2_EDMA0_0,
674	GAUDI2_BMON_DCORE2_EDMA0_1,
675	GAUDI2_BMON_DCORE2_EDMA1_0,
676	GAUDI2_BMON_DCORE2_EDMA1_1,
677	GAUDI2_BMON_DCORE2_VDEC0_0,
678	GAUDI2_BMON_DCORE2_VDEC0_1,
679	GAUDI2_BMON_DCORE2_VDEC0_2,
680	GAUDI2_BMON_DCORE2_VDEC1_0,
681	GAUDI2_BMON_DCORE2_VDEC1_1,
682	GAUDI2_BMON_DCORE2_VDEC1_2,
683	GAUDI2_BMON_DCORE3_HMMU0_0,
684	GAUDI2_BMON_DCORE3_HMMU0_1,
685	GAUDI2_BMON_DCORE3_HMMU0_3,
686	GAUDI2_BMON_DCORE3_HMMU0_2,
687	GAUDI2_BMON_DCORE3_HMMU0_4,
688	GAUDI2_BMON_DCORE3_HMMU1_0,
689	GAUDI2_BMON_DCORE3_HMMU1_1,
690	GAUDI2_BMON_DCORE3_HMMU1_3,
691	GAUDI2_BMON_DCORE3_HMMU1_2,
692	GAUDI2_BMON_DCORE3_HMMU1_4,
693	GAUDI2_BMON_DCORE3_HMMU2_0,
694	GAUDI2_BMON_DCORE3_HMMU2_1,
695	GAUDI2_BMON_DCORE3_HMMU2_3,
696	GAUDI2_BMON_DCORE3_HMMU2_2,
697	GAUDI2_BMON_DCORE3_HMMU2_4,
698	GAUDI2_BMON_DCORE3_HMMU3_0,
699	GAUDI2_BMON_DCORE3_HMMU3_1,
700	GAUDI2_BMON_DCORE3_HMMU3_3,
701	GAUDI2_BMON_DCORE3_HMMU3_2,
702	GAUDI2_BMON_DCORE3_HMMU3_4,
703	GAUDI2_BMON_DCORE3_MME_CTRL_0,
704	GAUDI2_BMON_DCORE3_MME_CTRL_1,
705	GAUDI2_BMON_DCORE3_MME_CTRL_2,
706	GAUDI2_BMON_DCORE3_MME_CTRL_3,
707	GAUDI2_BMON_DCORE3_MME_SBTE0_0,
708	GAUDI2_BMON_DCORE3_MME_SBTE1_0,
709	GAUDI2_BMON_DCORE3_MME_SBTE2_0,
710	GAUDI2_BMON_DCORE3_MME_SBTE3_0,
711	GAUDI2_BMON_DCORE3_MME_SBTE4_0,
712	GAUDI2_BMON_DCORE3_MME_ACC_0,
713	GAUDI2_BMON_DCORE3_MME_ACC_1,
714	GAUDI2_BMON_DCORE3_SM,
715	GAUDI2_BMON_DCORE3_SM_1,
716	GAUDI2_BMON_DCORE3_EDMA0_0,
717	GAUDI2_BMON_DCORE3_EDMA0_1,
718	GAUDI2_BMON_DCORE3_EDMA1_0,
719	GAUDI2_BMON_DCORE3_EDMA1_1,
720	GAUDI2_BMON_DCORE3_VDEC0_0,
721	GAUDI2_BMON_DCORE3_VDEC0_1,
722	GAUDI2_BMON_DCORE3_VDEC0_2,
723	GAUDI2_BMON_DCORE3_VDEC1_0,
724	GAUDI2_BMON_DCORE3_VDEC1_1,
725	GAUDI2_BMON_DCORE3_VDEC1_2,
726	GAUDI2_BMON_PCIE_MSTR_WR,
727	GAUDI2_BMON_PCIE_MSTR_RD,
728	GAUDI2_BMON_PCIE_SLV_WR,
729	GAUDI2_BMON_PCIE_SLV_RD,
730	GAUDI2_BMON_PSOC_ARC0_0,
731	GAUDI2_BMON_PSOC_ARC0_1,
732	GAUDI2_BMON_PSOC_ARC1_0,
733	GAUDI2_BMON_PSOC_ARC1_1,
734	GAUDI2_BMON_PDMA0_0,
735	GAUDI2_BMON_PDMA0_1,
736	GAUDI2_BMON_PDMA1_0,
737	GAUDI2_BMON_PDMA1_1,
738	GAUDI2_BMON_CPU_WR,
739	GAUDI2_BMON_CPU_RD,
740	GAUDI2_BMON_PMMU_0,
741	GAUDI2_BMON_PMMU_1,
742	GAUDI2_BMON_PMMU_2,
743	GAUDI2_BMON_PMMU_3,
744	GAUDI2_BMON_PMMU_4,
745	GAUDI2_BMON_ROT0_0,
746	GAUDI2_BMON_ROT0_1,
747	GAUDI2_BMON_ROT0_2,
748	GAUDI2_BMON_ROT0_3,
749	GAUDI2_BMON_ROT1_0,
750	GAUDI2_BMON_ROT1_1,
751	GAUDI2_BMON_ROT1_2,
752	GAUDI2_BMON_ROT1_3,
753	GAUDI2_BMON_ARC_FARM_0,
754	GAUDI2_BMON_ARC_FARM_1,
755	GAUDI2_BMON_ARC_FARM_2,
756	GAUDI2_BMON_ARC_FARM_3,
757	GAUDI2_BMON_KDMA_0,
758	GAUDI2_BMON_KDMA_1,
759	GAUDI2_BMON_KDMA_2,
760	GAUDI2_BMON_KDMA_3,
761	GAUDI2_BMON_PCIE_VDEC0_0,
762	GAUDI2_BMON_PCIE_VDEC0_1,
763	GAUDI2_BMON_PCIE_VDEC0_2,
764	GAUDI2_BMON_PCIE_VDEC1_0,
765	GAUDI2_BMON_PCIE_VDEC1_1,
766	GAUDI2_BMON_PCIE_VDEC1_2,
767	GAUDI2_BMON_NIC0_DBG_0_0,
768	GAUDI2_BMON_NIC0_DBG_1_0,
769	GAUDI2_BMON_NIC0_DBG_2_0,
770	GAUDI2_BMON_NIC0_DBG_0_1,
771	GAUDI2_BMON_NIC0_DBG_1_1,
772	GAUDI2_BMON_NIC0_DBG_2_1,
773	GAUDI2_BMON_NIC1_DBG_0_0,
774	GAUDI2_BMON_NIC1_DBG_1_0,
775	GAUDI2_BMON_NIC1_DBG_2_0,
776	GAUDI2_BMON_NIC1_DBG_0_1,
777	GAUDI2_BMON_NIC1_DBG_1_1,
778	GAUDI2_BMON_NIC1_DBG_2_1,
779	GAUDI2_BMON_NIC2_DBG_0_0,
780	GAUDI2_BMON_NIC2_DBG_1_0,
781	GAUDI2_BMON_NIC2_DBG_2_0,
782	GAUDI2_BMON_NIC2_DBG_0_1,
783	GAUDI2_BMON_NIC2_DBG_1_1,
784	GAUDI2_BMON_NIC2_DBG_2_1,
785	GAUDI2_BMON_NIC3_DBG_0_0,
786	GAUDI2_BMON_NIC3_DBG_1_0,
787	GAUDI2_BMON_NIC3_DBG_2_0,
788	GAUDI2_BMON_NIC3_DBG_0_1,
789	GAUDI2_BMON_NIC3_DBG_1_1,
790	GAUDI2_BMON_NIC3_DBG_2_1,
791	GAUDI2_BMON_NIC4_DBG_0_0,
792	GAUDI2_BMON_NIC4_DBG_1_0,
793	GAUDI2_BMON_NIC4_DBG_2_0,
794	GAUDI2_BMON_NIC4_DBG_0_1,
795	GAUDI2_BMON_NIC4_DBG_1_1,
796	GAUDI2_BMON_NIC4_DBG_2_1,
797	GAUDI2_BMON_NIC5_DBG_0_0,
798	GAUDI2_BMON_NIC5_DBG_1_0,
799	GAUDI2_BMON_NIC5_DBG_2_0,
800	GAUDI2_BMON_NIC5_DBG_0_1,
801	GAUDI2_BMON_NIC5_DBG_1_1,
802	GAUDI2_BMON_NIC5_DBG_2_1,
803	GAUDI2_BMON_NIC6_DBG_0_0,
804	GAUDI2_BMON_NIC6_DBG_1_0,
805	GAUDI2_BMON_NIC6_DBG_2_0,
806	GAUDI2_BMON_NIC6_DBG_0_1,
807	GAUDI2_BMON_NIC6_DBG_1_1,
808	GAUDI2_BMON_NIC6_DBG_2_1,
809	GAUDI2_BMON_NIC7_DBG_0_0,
810	GAUDI2_BMON_NIC7_DBG_1_0,
811	GAUDI2_BMON_NIC7_DBG_2_0,
812	GAUDI2_BMON_NIC7_DBG_0_1,
813	GAUDI2_BMON_NIC7_DBG_1_1,
814	GAUDI2_BMON_NIC7_DBG_2_1,
815	GAUDI2_BMON_NIC8_DBG_0_0,
816	GAUDI2_BMON_NIC8_DBG_1_0,
817	GAUDI2_BMON_NIC8_DBG_2_0,
818	GAUDI2_BMON_NIC8_DBG_0_1,
819	GAUDI2_BMON_NIC8_DBG_1_1,
820	GAUDI2_BMON_NIC8_DBG_2_1,
821	GAUDI2_BMON_NIC9_DBG_0_0,
822	GAUDI2_BMON_NIC9_DBG_1_0,
823	GAUDI2_BMON_NIC9_DBG_2_0,
824	GAUDI2_BMON_NIC9_DBG_0_1,
825	GAUDI2_BMON_NIC9_DBG_1_1,
826	GAUDI2_BMON_NIC9_DBG_2_1,
827	GAUDI2_BMON_NIC10_DBG_0_0,
828	GAUDI2_BMON_NIC10_DBG_1_0,
829	GAUDI2_BMON_NIC10_DBG_2_0,
830	GAUDI2_BMON_NIC10_DBG_0_1,
831	GAUDI2_BMON_NIC10_DBG_1_1,
832	GAUDI2_BMON_NIC10_DBG_2_1,
833	GAUDI2_BMON_NIC11_DBG_0_0,
834	GAUDI2_BMON_NIC11_DBG_1_0,
835	GAUDI2_BMON_NIC11_DBG_2_0,
836	GAUDI2_BMON_NIC11_DBG_0_1,
837	GAUDI2_BMON_NIC11_DBG_1_1,
838	GAUDI2_BMON_NIC11_DBG_2_1,
839	GAUDI2_BMON_LAST = GAUDI2_BMON_NIC11_DBG_2_1
840};
841
842enum gaudi2_debug_spmu_regs_index {
843	GAUDI2_SPMU_FIRST = 0,
844	GAUDI2_SPMU_DCORE0_TPC0_EML = GAUDI2_SPMU_FIRST,
845	GAUDI2_SPMU_DCORE0_TPC1_EML,
846	GAUDI2_SPMU_DCORE0_TPC2_EML,
847	GAUDI2_SPMU_DCORE0_TPC3_EML,
848	GAUDI2_SPMU_DCORE0_TPC4_EML,
849	GAUDI2_SPMU_DCORE0_TPC5_EML,
850	GAUDI2_SPMU_DCORE0_TPC6_EML,
851	GAUDI2_SPMU_DCORE1_TPC0_EML,
852	GAUDI2_SPMU_DCORE1_TPC1_EML,
853	GAUDI2_SPMU_DCORE1_TPC2_EML,
854	GAUDI2_SPMU_DCORE1_TPC3_EML,
855	GAUDI2_SPMU_DCORE1_TPC4_EML,
856	GAUDI2_SPMU_DCORE1_TPC5_EML,
857	GAUDI2_SPMU_DCORE2_TPC0_EML,
858	GAUDI2_SPMU_DCORE2_TPC1_EML,
859	GAUDI2_SPMU_DCORE2_TPC2_EML,
860	GAUDI2_SPMU_DCORE2_TPC3_EML,
861	GAUDI2_SPMU_DCORE2_TPC4_EML,
862	GAUDI2_SPMU_DCORE2_TPC5_EML,
863	GAUDI2_SPMU_DCORE3_TPC0_EML,
864	GAUDI2_SPMU_DCORE3_TPC1_EML,
865	GAUDI2_SPMU_DCORE3_TPC2_EML,
866	GAUDI2_SPMU_DCORE3_TPC3_EML,
867	GAUDI2_SPMU_DCORE3_TPC4_EML,
868	GAUDI2_SPMU_DCORE3_TPC5_EML,
869	GAUDI2_SPMU_DCORE0_HMMU0_CS,
870	GAUDI2_SPMU_DCORE0_HMMU1_CS,
871	GAUDI2_SPMU_DCORE0_HMMU2_CS,
872	GAUDI2_SPMU_DCORE0_HMMU3_CS,
873	GAUDI2_SPMU_DCORE0_MME_CTRL,
874	GAUDI2_SPMU_DCORE0_MME_SBTE0,
875	GAUDI2_SPMU_DCORE0_MME_SBTE1,
876	GAUDI2_SPMU_DCORE0_MME_SBTE2,
877	GAUDI2_SPMU_DCORE0_MME_SBTE3,
878	GAUDI2_SPMU_DCORE0_MME_SBTE4,
879	GAUDI2_SPMU_DCORE0_MME_ACC,
880	GAUDI2_SPMU_DCORE0_SM,
881	GAUDI2_SPMU_DCORE0_EDMA0_CS,
882	GAUDI2_SPMU_DCORE0_EDMA1_CS,
883	GAUDI2_SPMU_DCORE0_VDEC0_CS,
884	GAUDI2_SPMU_DCORE0_VDEC1_CS,
885	GAUDI2_SPMU_DCORE1_HMMU0_CS,
886	GAUDI2_SPMU_DCORE1_HMMU1_CS,
887	GAUDI2_SPMU_DCORE1_HMMU2_CS,
888	GAUDI2_SPMU_DCORE1_HMMU3_CS,
889	GAUDI2_SPMU_DCORE1_MME_CTRL,
890	GAUDI2_SPMU_DCORE1_MME_SBTE0,
891	GAUDI2_SPMU_DCORE1_MME_SBTE1,
892	GAUDI2_SPMU_DCORE1_MME_SBTE2,
893	GAUDI2_SPMU_DCORE1_MME_SBTE3,
894	GAUDI2_SPMU_DCORE1_MME_SBTE4,
895	GAUDI2_SPMU_DCORE1_MME_ACC,
896	GAUDI2_SPMU_DCORE1_SM,
897	GAUDI2_SPMU_DCORE1_EDMA0_CS,
898	GAUDI2_SPMU_DCORE1_EDMA1_CS,
899	GAUDI2_SPMU_DCORE1_VDEC0_CS,
900	GAUDI2_SPMU_DCORE1_VDEC1_CS,
901	GAUDI2_SPMU_DCORE2_HMMU0_CS,
902	GAUDI2_SPMU_DCORE2_HMMU1_CS,
903	GAUDI2_SPMU_DCORE2_HMMU2_CS,
904	GAUDI2_SPMU_DCORE2_HMMU3_CS,
905	GAUDI2_SPMU_DCORE2_MME_CTRL,
906	GAUDI2_SPMU_DCORE2_MME_SBTE0,
907	GAUDI2_SPMU_DCORE2_MME_SBTE1,
908	GAUDI2_SPMU_DCORE2_MME_SBTE2,
909	GAUDI2_SPMU_DCORE2_MME_SBTE3,
910	GAUDI2_SPMU_DCORE2_MME_SBTE4,
911	GAUDI2_SPMU_DCORE2_MME_ACC,
912	GAUDI2_SPMU_DCORE2_SM,
913	GAUDI2_SPMU_DCORE2_EDMA0_CS,
914	GAUDI2_SPMU_DCORE2_EDMA1_CS,
915	GAUDI2_SPMU_DCORE2_VDEC0_CS,
916	GAUDI2_SPMU_DCORE2_VDEC1_CS,
917	GAUDI2_SPMU_DCORE3_HMMU0_CS,
918	GAUDI2_SPMU_DCORE3_HMMU1_CS,
919	GAUDI2_SPMU_DCORE3_HMMU2_CS,
920	GAUDI2_SPMU_DCORE3_HMMU3_CS,
921	GAUDI2_SPMU_DCORE3_MME_CTRL,
922	GAUDI2_SPMU_DCORE3_MME_SBTE0,
923	GAUDI2_SPMU_DCORE3_MME_SBTE1,
924	GAUDI2_SPMU_DCORE3_MME_SBTE2,
925	GAUDI2_SPMU_DCORE3_MME_SBTE3,
926	GAUDI2_SPMU_DCORE3_MME_SBTE4,
927	GAUDI2_SPMU_DCORE3_MME_ACC,
928	GAUDI2_SPMU_DCORE3_SM,
929	GAUDI2_SPMU_DCORE3_EDMA0_CS,
930	GAUDI2_SPMU_DCORE3_EDMA1_CS,
931	GAUDI2_SPMU_DCORE3_VDEC0_CS,
932	GAUDI2_SPMU_DCORE3_VDEC1_CS,
933	GAUDI2_SPMU_PCIE,
934	GAUDI2_SPMU_PSOC_ARC0_CS,
935	GAUDI2_SPMU_PSOC_ARC1_CS,
936	GAUDI2_SPMU_PDMA0_CS,
937	GAUDI2_SPMU_PDMA1_CS,
938	GAUDI2_SPMU_PMMU_CS,
939	GAUDI2_SPMU_ROT0_CS,
940	GAUDI2_SPMU_ROT1_CS,
941	GAUDI2_SPMU_ARC_FARM_CS,
942	GAUDI2_SPMU_KDMA_CS,
943	GAUDI2_SPMU_PCIE_VDEC0_CS,
944	GAUDI2_SPMU_PCIE_VDEC1_CS,
945	GAUDI2_SPMU_HBM0_MC0_CS,
946	GAUDI2_SPMU_HBM0_MC1_CS,
947	GAUDI2_SPMU_HBM1_MC0_CS,
948	GAUDI2_SPMU_HBM1_MC1_CS,
949	GAUDI2_SPMU_HBM2_MC0_CS,
950	GAUDI2_SPMU_HBM2_MC1_CS,
951	GAUDI2_SPMU_HBM3_MC0_CS,
952	GAUDI2_SPMU_HBM3_MC1_CS,
953	GAUDI2_SPMU_HBM4_MC0_CS,
954	GAUDI2_SPMU_HBM4_MC1_CS,
955	GAUDI2_SPMU_HBM5_MC0_CS,
956	GAUDI2_SPMU_HBM5_MC1_CS,
957	GAUDI2_SPMU_NIC0_DBG_0,
958	GAUDI2_SPMU_NIC0_DBG_1,
959	GAUDI2_SPMU_NIC1_DBG_0,
960	GAUDI2_SPMU_NIC1_DBG_1,
961	GAUDI2_SPMU_NIC2_DBG_0,
962	GAUDI2_SPMU_NIC2_DBG_1,
963	GAUDI2_SPMU_NIC3_DBG_0,
964	GAUDI2_SPMU_NIC3_DBG_1,
965	GAUDI2_SPMU_NIC4_DBG_0,
966	GAUDI2_SPMU_NIC4_DBG_1,
967	GAUDI2_SPMU_NIC5_DBG_0,
968	GAUDI2_SPMU_NIC5_DBG_1,
969	GAUDI2_SPMU_NIC6_DBG_0,
970	GAUDI2_SPMU_NIC6_DBG_1,
971	GAUDI2_SPMU_NIC7_DBG_0,
972	GAUDI2_SPMU_NIC7_DBG_1,
973	GAUDI2_SPMU_NIC8_DBG_0,
974	GAUDI2_SPMU_NIC8_DBG_1,
975	GAUDI2_SPMU_NIC9_DBG_0,
976	GAUDI2_SPMU_NIC9_DBG_1,
977	GAUDI2_SPMU_NIC10_DBG_0,
978	GAUDI2_SPMU_NIC10_DBG_1,
979	GAUDI2_SPMU_NIC11_DBG_0,
980	GAUDI2_SPMU_NIC11_DBG_1,
981	GAUDI2_SPMU_LAST = GAUDI2_SPMU_NIC11_DBG_1
982};
983
984#endif /* GAUDI2_CORESIGHT_H */