pcie_dec0_cmd_regs.h

 1/* SPDX-License-Identifier: GPL-2.0
 2 *
 3 * Copyright 2016-2020 HabanaLabs, Ltd.
 4 * All Rights Reserved.
 5 *
 6 */
 7
 8/************************************
 9 ** This is an auto-generated file **
10 **       DO NOT EDIT BELOW        **
11 ************************************/
12
13#ifndef ASIC_REG_PCIE_DEC0_CMD_REGS_H_
14#define ASIC_REG_PCIE_DEC0_CMD_REGS_H_
15
16/*
17 *****************************************
18 *   PCIE_DEC0_CMD
19 *   (Prototype: VSI_CMD)
20 *****************************************
21 */
22
23#define mmPCIE_DEC0_CMD_SWREG0 0x4F00000
24
25#define mmPCIE_DEC0_CMD_SWREG1 0x4F00004
26
27#define mmPCIE_DEC0_CMD_SWREG2 0x4F00008
28
29#define mmPCIE_DEC0_CMD_SWREG3 0x4F0000C
30
31#define mmPCIE_DEC0_CMD_SWREG4 0x4F00010
32
33#define mmPCIE_DEC0_CMD_SWREG5 0x4F00014
34
35#define mmPCIE_DEC0_CMD_SWREG6 0x4F00018
36
37#define mmPCIE_DEC0_CMD_SWREG7 0x4F0001C
38
39#define mmPCIE_DEC0_CMD_SWREG8 0x4F00020
40
41#define mmPCIE_DEC0_CMD_SWREG9 0x4F00024
42
43#define mmPCIE_DEC0_CMD_SWREG10 0x4F00028
44
45#define mmPCIE_DEC0_CMD_SWREG11 0x4F0002C
46
47#define mmPCIE_DEC0_CMD_SWREG12 0x4F00030
48
49#define mmPCIE_DEC0_CMD_SWREG13 0x4F00034
50
51#define mmPCIE_DEC0_CMD_SWREG14 0x4F00038
52
53#define mmPCIE_DEC0_CMD_SWREG15 0x4F0003C
54
55#define mmPCIE_DEC0_CMD_SWREG16 0x4F00040
56
57#define mmPCIE_DEC0_CMD_SWREG17 0x4F00044
58
59#define mmPCIE_DEC0_CMD_SWREG18 0x4F00048
60
61#define mmPCIE_DEC0_CMD_SWREG19 0x4F0004C
62
63#define mmPCIE_DEC0_CMD_SWREG20 0x4F00050
64
65#define mmPCIE_DEC0_CMD_SWREG21 0x4F00054
66
67#define mmPCIE_DEC0_CMD_SWREG22 0x4F00058
68
69#define mmPCIE_DEC0_CMD_SWREG23 0x4F0005C
70
71#define mmPCIE_DEC0_CMD_SWREG24 0x4F00060
72
73#define mmPCIE_DEC0_CMD_SWREG25 0x4F00064
74
75#define mmPCIE_DEC0_CMD_SWREG26 0x4F00068
76
77#define mmPCIE_DEC0_CMD_SWREG64 0x4F00100
78
79#define mmPCIE_DEC0_CMD_SWREG65 0x4F00104
80
81#define mmPCIE_DEC0_CMD_SWREG66 0x4F00108
82
83#define mmPCIE_DEC0_CMD_SWREG67 0x4F0010C
84
85#endif /* ASIC_REG_PCIE_DEC0_CMD_REGS_H_ */