amdxdna_pci_drv.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
  4 */
  5
  6#ifndef _AMDXDNA_PCI_DRV_H_
  7#define _AMDXDNA_PCI_DRV_H_
  8
  9#include <drm/drm_print.h>
 10#include <linux/workqueue.h>
 11#include <linux/xarray.h>
 12
 13#define XDNA_INFO(xdna, fmt, args...)	drm_info(&(xdna)->ddev, fmt, ##args)
 14#define XDNA_WARN(xdna, fmt, args...)	drm_warn(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
 15#define XDNA_ERR(xdna, fmt, args...)	drm_err(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
 16#define XDNA_DBG(xdna, fmt, args...)	drm_dbg(&(xdna)->ddev, fmt, ##args)
 17#define XDNA_INFO_ONCE(xdna, fmt, args...) drm_info_once(&(xdna)->ddev, fmt, ##args)
 18
 19#define XDNA_MBZ_DBG(xdna, ptr, sz)					\
 20	({								\
 21		int __i;						\
 22		int __ret = 0;						\
 23		u8 *__ptr = (u8 *)(ptr);				\
 24		for (__i = 0; __i < (sz); __i++) {			\
 25			if (__ptr[__i]) {				\
 26				XDNA_DBG(xdna, "MBZ check failed");	\
 27				__ret = -EINVAL;			\
 28				break;					\
 29			}						\
 30		}							\
 31		__ret;							\
 32	})
 33
 34#define to_xdna_dev(drm_dev) \
 35	((struct amdxdna_dev *)container_of(drm_dev, struct amdxdna_dev, ddev))
 36
 37extern const struct drm_driver amdxdna_drm_drv;
 38
 39struct amdxdna_client;
 40struct amdxdna_dev;
 41struct amdxdna_drm_get_info;
 42struct amdxdna_drm_set_state;
 43struct amdxdna_gem_obj;
 44struct amdxdna_hwctx;
 45struct amdxdna_sched_job;
 46
 47/*
 48 * struct amdxdna_dev_ops - Device hardware operation callbacks
 49 */
 50struct amdxdna_dev_ops {
 51	int (*init)(struct amdxdna_dev *xdna);
 52	void (*fini)(struct amdxdna_dev *xdna);
 53	int (*resume)(struct amdxdna_dev *xdna);
 54	int (*suspend)(struct amdxdna_dev *xdna);
 55	int (*hwctx_init)(struct amdxdna_hwctx *hwctx);
 56	void (*hwctx_fini)(struct amdxdna_hwctx *hwctx);
 57	int (*hwctx_config)(struct amdxdna_hwctx *hwctx, u32 type, u64 value, void *buf, u32 size);
 58	int (*hwctx_sync_debug_bo)(struct amdxdna_hwctx *hwctx, u32 debug_bo_hdl);
 59	void (*hmm_invalidate)(struct amdxdna_gem_obj *abo, unsigned long cur_seq);
 60	int (*cmd_submit)(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, u64 *seq);
 61	int (*get_aie_info)(struct amdxdna_client *client, struct amdxdna_drm_get_info *args);
 62	int (*set_aie_state)(struct amdxdna_client *client, struct amdxdna_drm_set_state *args);
 63	int (*get_array)(struct amdxdna_client *client, struct amdxdna_drm_get_array *args);
 64};
 65
 66/*
 67 * struct amdxdna_dev_info - Device hardware information
 68 * Record device static information, like reg, mbox, PSP, SMU bar index
 69 */
 70struct amdxdna_dev_info {
 71	int				reg_bar;
 72	int				mbox_bar;
 73	int				sram_bar;
 74	int				psp_bar;
 75	int				smu_bar;
 76	int				device_type;
 77	int				first_col;
 78	u32				dev_mem_buf_shift;
 79	u64				dev_mem_base;
 80	size_t				dev_mem_size;
 81	char				*vbnv;
 82	const struct amdxdna_dev_priv	*dev_priv;
 83	const struct amdxdna_dev_ops	*ops;
 84};
 85
 86struct amdxdna_fw_ver {
 87	u32 major;
 88	u32 minor;
 89	u32 sub;
 90	u32 build;
 91};
 92
 93struct amdxdna_dev {
 94	struct drm_device		ddev;
 95	struct amdxdna_dev_hdl		*dev_handle;
 96	const struct amdxdna_dev_info	*dev_info;
 97	void				*xrs_hdl;
 98
 99	struct mutex			dev_lock; /* per device lock */
100	struct list_head		client_list;
101	struct amdxdna_fw_ver		fw_ver;
102	struct rw_semaphore		notifier_lock; /* for mmu notifier*/
103	struct workqueue_struct		*notifier_wq;
104};
105
106/*
107 * struct amdxdna_device_id - PCI device info
108 */
109struct amdxdna_device_id {
110	unsigned short device;
111	u8 revision;
112	const struct amdxdna_dev_info *dev_info;
113};
114
115/*
116 * struct amdxdna_client - amdxdna client
117 * A per fd data structure for managing context and other user process stuffs.
118 */
119struct amdxdna_client {
120	struct list_head		node;
121	pid_t				pid;
122	struct srcu_struct		hwctx_srcu;
123	struct xarray			hwctx_xa;
124	u32				next_hwctxid;
125	struct amdxdna_dev		*xdna;
126	struct drm_file			*filp;
127
128	struct mutex			mm_lock; /* protect memory related */
129	struct amdxdna_gem_obj		*dev_heap;
130
131	struct iommu_sva		*sva;
132	int				pasid;
133	struct mm_struct		*mm;
134};
135
136#define amdxdna_for_each_hwctx(client, hwctx_id, entry)		\
137	xa_for_each(&(client)->hwctx_xa, hwctx_id, entry)
138
139/* Add device info below */
140extern const struct amdxdna_dev_info dev_npu1_info;
141extern const struct amdxdna_dev_info dev_npu2_info;
142extern const struct amdxdna_dev_info dev_npu4_info;
143extern const struct amdxdna_dev_info dev_npu5_info;
144extern const struct amdxdna_dev_info dev_npu6_info;
145
146int amdxdna_sysfs_init(struct amdxdna_dev *xdna);
147void amdxdna_sysfs_fini(struct amdxdna_dev *xdna);
148
149#endif /* _AMDXDNA_PCI_DRV_H_ */