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kvm_emulate.h
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linux-6.19.14/arch/x86/kvm/kvm_emulate.h
1/* SPDX-License-Identifier: GPL-2.0 */ 2/****************************************************************************** 3 * x86_emulate.h 4 * 5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. 6 * 7 * Copyright (c) 2005 Keir Fraser 8 * 9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 10 */ 11 12#ifndef _ASM_X86_KVM_X86_EMULATE_H 13#define _ASM_X86_KVM_X86_EMULATE_H 14 15#include <asm/desc_defs.h> 16#include "fpu.h" 17 18struct x86_emulate_ctxt; 19enum x86_intercept; 20enum x86_intercept_stage; 21 22struct x86_exception { 23 u8 vector; 24 bool error_code_valid; 25 u16 error_code; 26 bool nested_page_fault; 27 u64 address; /* cr2 or nested page fault gpa */ 28 u8 async_page_fault; 29 unsigned long exit_qualification; 30}; 31 32/* 33 * This struct is used to carry enough information from the instruction 34 * decoder to main KVM so that a decision can be made whether the 35 * instruction needs to be intercepted or not. 36 */ 37struct x86_instruction_info { 38 u8 intercept; /* which intercept */ 39 u8 rep_prefix; /* rep prefix? */ 40 u8 modrm_mod; /* mod part of modrm */ 41 u8 modrm_reg; /* index of register used */ 42 u8 modrm_rm; /* rm part of modrm */ 43 u64 src_val; /* value of source operand */ 44 u64 dst_val; /* value of destination operand */ 45 u8 src_bytes; /* size of source operand */ 46 u8 dst_bytes; /* size of destination operand */ 47 u8 src_type; /* type of source operand */ 48 u8 dst_type; /* type of destination operand */ 49 u8 ad_bytes; /* size of src/dst address */ 50 u64 rip; /* rip of the instruction */ 51 u64 next_rip; /* rip following the instruction */ 52}; 53 54/* 55 * x86_emulate_ops: 56 * 57 * These operations represent the instruction emulator's interface to memory. 58 * There are two categories of operation: those that act on ordinary memory 59 * regions (*_std), and those that act on memory regions known to require 60 * special treatment or emulation (*_emulated). 61 * 62 * The emulator assumes that an instruction accesses only one 'emulated memory' 63 * location, that this location is the given linear faulting address (cr2), and 64 * that this is one of the instruction's data operands. Instruction fetches and 65 * stack operations are assumed never to access emulated memory. The emulator 66 * automatically deduces which operand of a string-move operation is accessing 67 * emulated memory, and assumes that the other operand accesses normal memory. 68 * 69 * NOTES: 70 * 1. The emulator isn't very smart about emulated vs. standard memory. 71 * 'Emulated memory' access addresses should be checked for sanity. 72 * 'Normal memory' accesses may fault, and the caller must arrange to 73 * detect and handle reentrancy into the emulator via recursive faults. 74 * Accesses may be unaligned and may cross page boundaries. 75 * 2. If the access fails (cannot emulate, or a standard access faults) then 76 * it is up to the memop to propagate the fault to the guest VM via 77 * some out-of-band mechanism, unknown to the emulator. The memop signals 78 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will 79 * then immediately bail. 80 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only 81 * cmpxchg8b_emulated need support 8-byte accesses. 82 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. 83 */ 84/* Access completed successfully: continue emulation as normal. */ 85#define X86EMUL_CONTINUE 0 86/* Access is unhandleable: bail from emulation and return error to caller. */ 87#define X86EMUL_UNHANDLEABLE 1 88/* Terminate emulation but return success to the caller. */ 89#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ 90#define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ 91#define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ 92#define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ 93#define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ 94/* Emulation during event vectoring is unhandleable. */ 95#define X86EMUL_UNHANDLEABLE_VECTORING 7 96 97/* x86-specific emulation flags */ 98#define X86EMUL_F_WRITE BIT(0) 99#define X86EMUL_F_FETCH BIT(1) 100#define X86EMUL_F_IMPLICIT BIT(2) 101#define X86EMUL_F_INVLPG BIT(3) 102#define X86EMUL_F_MSR BIT(4) 103#define X86EMUL_F_DT_LOAD BIT(5) 104 105struct x86_emulate_ops { 106 void (*vm_bugged)(struct x86_emulate_ctxt *ctxt); 107 /* 108 * read_gpr: read a general purpose register (rax - r15) 109 * 110 * @reg: gpr number. 111 */ 112 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); 113 /* 114 * write_gpr: write a general purpose register (rax - r15) 115 * 116 * @reg: gpr number. 117 * @val: value to write. 118 */ 119 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); 120 /* 121 * read_std: Read bytes of standard (non-emulated/special) memory. 122 * Used for descriptor reading. 123 * @addr: [IN ] Linear address from which to read. 124 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 125 * @bytes: [IN ] Number of bytes to read from memory. 126 * @system:[IN ] Whether the access is forced to be at CPL0. 127 */ 128 int (*read_std)(struct x86_emulate_ctxt *ctxt, 129 unsigned long addr, void *val, 130 unsigned int bytes, 131 struct x86_exception *fault, bool system); 132 133 /* 134 * write_std: Write bytes of standard (non-emulated/special) memory. 135 * Used for descriptor writing. 136 * @addr: [IN ] Linear address to which to write. 137 * @val: [OUT] Value write to memory, zero-extended to 'u_long'. 138 * @bytes: [IN ] Number of bytes to write to memory. 139 * @system:[IN ] Whether the access is forced to be at CPL0. 140 */ 141 int (*write_std)(struct x86_emulate_ctxt *ctxt, 142 unsigned long addr, void *val, unsigned int bytes, 143 struct x86_exception *fault, bool system); 144 /* 145 * fetch: Read bytes of standard (non-emulated/special) memory. 146 * Used for instruction fetch. 147 * @addr: [IN ] Linear address from which to read. 148 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 149 * @bytes: [IN ] Number of bytes to read from memory. 150 */ 151 int (*fetch)(struct x86_emulate_ctxt *ctxt, 152 unsigned long addr, void *val, unsigned int bytes, 153 struct x86_exception *fault); 154 155 /* 156 * read_emulated: Read bytes from emulated/special memory area. 157 * @addr: [IN ] Linear address from which to read. 158 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 159 * @bytes: [IN ] Number of bytes to read from memory. 160 */ 161 int (*read_emulated)(struct x86_emulate_ctxt *ctxt, 162 unsigned long addr, void *val, unsigned int bytes, 163 struct x86_exception *fault); 164 165 /* 166 * write_emulated: Write bytes to emulated/special memory area. 167 * @addr: [IN ] Linear address to which to write. 168 * @val: [IN ] Value to write to memory (low-order bytes used as 169 * required). 170 * @bytes: [IN ] Number of bytes to write to memory. 171 */ 172 int (*write_emulated)(struct x86_emulate_ctxt *ctxt, 173 unsigned long addr, const void *val, 174 unsigned int bytes, 175 struct x86_exception *fault); 176 177 /* 178 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an 179 * emulated/special memory area. 180 * @addr: [IN ] Linear address to access. 181 * @old: [IN ] Value expected to be current at @addr. 182 * @new: [IN ] Value to write to @addr. 183 * @bytes: [IN ] Number of bytes to access using CMPXCHG. 184 */ 185 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, 186 unsigned long addr, 187 const void *old, 188 const void *new, 189 unsigned int bytes, 190 struct x86_exception *fault); 191 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); 192 193 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, 194 int size, unsigned short port, void *val, 195 unsigned int count); 196 197 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, 198 int size, unsigned short port, const void *val, 199 unsigned int count); 200 201 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, 202 struct desc_struct *desc, u32 *base3, int seg); 203 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, 204 struct desc_struct *desc, u32 base3, int seg); 205 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, 206 int seg); 207 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 208 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 209 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 210 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 211 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); 212 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); 213 int (*cpl)(struct x86_emulate_ctxt *ctxt); 214 ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr); 215 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); 216 int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); 217 int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 218 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 219 int (*check_rdpmc_early)(struct x86_emulate_ctxt *ctxt, u32 pmc); 220 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); 221 void (*halt)(struct x86_emulate_ctxt *ctxt); 222 void (*wbinvd)(struct x86_emulate_ctxt *ctxt); 223 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); 224 int (*intercept)(struct x86_emulate_ctxt *ctxt, 225 struct x86_instruction_info *info, 226 enum x86_intercept_stage stage); 227 228 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx, 229 u32 *ecx, u32 *edx, bool exact_only); 230 bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt); 231 bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt); 232 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt); 233 bool (*guest_cpuid_is_intel_compatible)(struct x86_emulate_ctxt *ctxt); 234 235 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); 236 237 bool (*is_smm)(struct x86_emulate_ctxt *ctxt); 238 int (*leave_smm)(struct x86_emulate_ctxt *ctxt); 239 void (*triple_fault)(struct x86_emulate_ctxt *ctxt); 240 int (*get_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 *xcr); 241 int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr); 242 243 gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 244 unsigned int flags); 245 246 bool (*is_canonical_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 247 unsigned int flags); 248}; 249 250/* Type, address-of, and value of an instruction's operand. */ 251struct operand { 252 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_YMM, OP_MM, OP_NONE } type; 253 unsigned int bytes; 254 unsigned int count; 255 union { 256 unsigned long orig_val; 257 u64 orig_val64; 258 }; 259 union { 260 unsigned long *reg; 261 struct segmented_address { 262 ulong ea; 263 unsigned seg; 264 } mem; 265 unsigned xmm; 266 unsigned mm; 267 } addr; 268 union { 269 unsigned long val; 270 u64 val64; 271 char valptr[sizeof(avx256_t)]; 272 sse128_t vec_val; 273 avx256_t vec_val2; 274 u64 mm_val; 275 void *data; 276 } __aligned(32); 277}; 278 279#define X86_MAX_INSTRUCTION_LENGTH 15 280 281struct fetch_cache { 282 u8 data[X86_MAX_INSTRUCTION_LENGTH]; 283 u8 *ptr; 284 u8 *end; 285}; 286 287struct read_cache { 288 u8 data[1024]; 289 unsigned long pos; 290 unsigned long end; 291}; 292 293/* Execution mode, passed to the emulator. */ 294enum x86emul_mode { 295 X86EMUL_MODE_REAL, /* Real mode. */ 296 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ 297 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ 298 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ 299 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ 300}; 301 302/* 303 * fastop functions are declared as taking a never-defined fastop parameter, 304 * so they can't be called from C directly. 305 */ 306struct fastop; 307 308typedef void (*fastop_t)(struct fastop *); 309 310/* 311 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is 312 * tracked/accessed via _eip, and except for RIP relative addressing, which 313 * also uses _eip, RIP cannot be a register operand nor can it be an operand in 314 * a ModRM or SIB byte. 315 */ 316#ifdef CONFIG_X86_64 317#define NR_EMULATOR_GPRS 16 318#else 319#define NR_EMULATOR_GPRS 8 320#endif 321 322/* 323 * Distinguish between no prefix, REX, or in the future REX2. 324 */ 325enum rex_type { 326 REX_NONE, 327 REX_PREFIX, 328}; 329 330struct x86_emulate_ctxt { 331 void *vcpu; 332 const struct x86_emulate_ops *ops; 333 334 /* Register state before/after emulation. */ 335 unsigned long eflags; 336 unsigned long eip; /* eip before instruction emulation */ 337 /* Emulated execution mode, represented by an X86EMUL_MODE value. */ 338 enum x86emul_mode mode; 339 340 /* interruptibility state, as a result of execution of STI or MOV SS */ 341 int interruptibility; 342 343 bool perm_ok; /* do not check permissions if true */ 344 bool tf; /* TF value before instruction (after for syscall/sysret) */ 345 346 bool have_exception; 347 struct x86_exception exception; 348 349 /* GPA available */ 350 bool gpa_available; 351 gpa_t gpa_val; 352 353 /* 354 * decode cache 355 */ 356 357 /* current opcode length in bytes */ 358 u8 opcode_len; 359 u8 b; 360 u8 intercept; 361 bool op_prefix; 362 u8 op_bytes; 363 u8 ad_bytes; 364 union { 365 int (*execute)(struct x86_emulate_ctxt *ctxt); 366 fastop_t fop; 367 }; 368 int (*check_perm)(struct x86_emulate_ctxt *ctxt); 369 370 bool rip_relative; 371 enum rex_type rex_prefix; 372 u8 rex_bits; 373 u8 lock_prefix; 374 u8 rep_prefix; 375 /* bitmaps of registers in _regs[] that can be read */ 376 u16 regs_valid; 377 /* bitmaps of registers in _regs[] that have been written */ 378 u16 regs_dirty; 379 /* modrm */ 380 u8 modrm; 381 u8 modrm_mod; 382 u8 modrm_reg; 383 u8 modrm_rm; 384 u8 modrm_seg; 385 u8 seg_override; 386 u64 d; 387 unsigned long _eip; 388 389 /* Here begins the usercopy section. */ 390 struct operand src; 391 struct operand src2; 392 struct operand dst; 393 struct operand memop; 394 unsigned long _regs[NR_EMULATOR_GPRS]; 395 struct operand *memopp; 396 struct fetch_cache fetch; 397 struct read_cache io_read; 398 struct read_cache mem_read; 399 bool is_branch; 400}; 401 402#define KVM_EMULATOR_BUG_ON(cond, ctxt) \ 403({ \ 404 int __ret = (cond); \ 405 \ 406 if (WARN_ON_ONCE(__ret)) \ 407 ctxt->ops->vm_bugged(ctxt); \ 408 unlikely(__ret); \ 409}) 410 411/* Repeat String Operation Prefix */ 412#define REPE_PREFIX 0xf3 413#define REPNE_PREFIX 0xf2 414 415/* CPUID vendors */ 416#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 417#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 418#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 419 420#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 421#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 422#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 423 424#define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948 425#define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975 426#define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e 427 428#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 429#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e 430#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 431 432#define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543 433#define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561 434#define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561 435 436static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx) 437{ 438 return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx && 439 ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx && 440 edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx; 441} 442 443static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx) 444{ 445 return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx && 446 ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx && 447 edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) || 448 (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx && 449 ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx && 450 edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx); 451} 452 453static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx) 454{ 455 return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx && 456 ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx && 457 edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx; 458} 459 460enum x86_intercept_stage { 461 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ 462 X86_ICPT_PRE_EXCEPT, 463 X86_ICPT_POST_EXCEPT, 464 X86_ICPT_POST_MEMACCESS, 465}; 466 467enum x86_intercept { 468 x86_intercept_none, 469 x86_intercept_cr_read, 470 x86_intercept_cr_write, 471 x86_intercept_clts, 472 x86_intercept_lmsw, 473 x86_intercept_smsw, 474 x86_intercept_dr_read, 475 x86_intercept_dr_write, 476 x86_intercept_lidt, 477 x86_intercept_sidt, 478 x86_intercept_lgdt, 479 x86_intercept_sgdt, 480 x86_intercept_lldt, 481 x86_intercept_sldt, 482 x86_intercept_ltr, 483 x86_intercept_str, 484 x86_intercept_rdtsc, 485 x86_intercept_rdpmc, 486 x86_intercept_pushf, 487 x86_intercept_popf, 488 x86_intercept_cpuid, 489 x86_intercept_rsm, 490 x86_intercept_iret, 491 x86_intercept_intn, 492 x86_intercept_invd, 493 x86_intercept_pause, 494 x86_intercept_hlt, 495 x86_intercept_invlpg, 496 x86_intercept_invlpga, 497 x86_intercept_vmrun, 498 x86_intercept_vmload, 499 x86_intercept_vmsave, 500 x86_intercept_vmmcall, 501 x86_intercept_stgi, 502 x86_intercept_clgi, 503 x86_intercept_skinit, 504 x86_intercept_rdtscp, 505 x86_intercept_rdpid, 506 x86_intercept_icebp, 507 x86_intercept_wbinvd, 508 x86_intercept_monitor, 509 x86_intercept_mwait, 510 x86_intercept_rdmsr, 511 x86_intercept_wrmsr, 512 x86_intercept_in, 513 x86_intercept_ins, 514 x86_intercept_out, 515 x86_intercept_outs, 516 x86_intercept_xsetbv, 517 518 nr_x86_intercepts 519}; 520 521/* Host execution mode. */ 522#if defined(CONFIG_X86_32) 523#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 524#elif defined(CONFIG_X86_64) 525#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 526#endif 527 528int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type); 529bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); 530#define EMULATION_FAILED -1 531#define EMULATION_OK 0 532#define EMULATION_RESTART 1 533#define EMULATION_INTERCEPTED 2 534void init_decode_cache(struct x86_emulate_ctxt *ctxt); 535int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, bool check_intercepts); 536int emulator_task_switch(struct x86_emulate_ctxt *ctxt, 537 u16 tss_selector, int idt_index, int reason, 538 bool has_error_code, u32 error_code); 539int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); 540void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); 541void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); 542bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt); 543 544static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr) 545{ 546 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 547 nr &= NR_EMULATOR_GPRS - 1; 548 549 if (!(ctxt->regs_valid & (1 << nr))) { 550 ctxt->regs_valid |= 1 << nr; 551 ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr); 552 } 553 return ctxt->_regs[nr]; 554} 555 556static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr) 557{ 558 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 559 nr &= NR_EMULATOR_GPRS - 1; 560 561 BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 562 BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 563 564 ctxt->regs_valid |= 1 << nr; 565 ctxt->regs_dirty |= 1 << nr; 566 return &ctxt->_regs[nr]; 567} 568 569static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr) 570{ 571 reg_read(ctxt, nr); 572 return reg_write(ctxt, nr); 573} 574 575#endif /* _ASM_X86_KVM_X86_EMULATE_H */
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