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boot.h

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linux-6.19.14/arch/x86/include/asm/boot.h C
  1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef _ASM_X86_BOOT_H
  3#define _ASM_X86_BOOT_H
  4
  5
  6#include <asm/pgtable_types.h>
  7#include <uapi/asm/boot.h>
  8
  9/* Minimum kernel alignment, as a power of two */
 10#ifdef CONFIG_X86_64
 11# define MIN_KERNEL_ALIGN_LG2	PMD_SHIFT
 12#else
 13# define MIN_KERNEL_ALIGN_LG2	(PAGE_SHIFT + THREAD_SIZE_ORDER)
 14#endif
 15#define MIN_KERNEL_ALIGN	(_AC(1, UL) << MIN_KERNEL_ALIGN_LG2)
 16
 17#if (CONFIG_PHYSICAL_ALIGN & (CONFIG_PHYSICAL_ALIGN-1)) || \
 18	(CONFIG_PHYSICAL_ALIGN < MIN_KERNEL_ALIGN)
 19# error "Invalid value for CONFIG_PHYSICAL_ALIGN"
 20#endif
 21
 22#if defined(CONFIG_KERNEL_BZIP2)
 23# define BOOT_HEAP_SIZE		0x400000
 24#elif defined(CONFIG_KERNEL_ZSTD)
 25/*
 26 * Zstd needs to allocate the ZSTD_DCtx in order to decompress the kernel.
 27 * The ZSTD_DCtx is ~160KB, so set the heap size to 192KB because it is a
 28 * round number and to allow some slack.
 29 */
 30# define BOOT_HEAP_SIZE		 0x30000
 31#else
 32# define BOOT_HEAP_SIZE		 0x10000
 33#endif
 34
 35#ifdef CONFIG_X86_64
 36# define BOOT_STACK_SIZE	0x4000
 37
 38/*
 39 * Used by decompressor's startup_32() to allocate page tables for identity
 40 * mapping of the 4G of RAM in 4-level paging mode:
 41 * - 1 level4 table;
 42 * - 1 level3 table;
 43 * - 4 level2 table that maps everything with 2M pages;
 44 *
 45 * The additional level5 table needed for 5-level paging is allocated from
 46 * trampoline_32bit memory.
 47 */
 48# define BOOT_INIT_PGT_SIZE	(6*4096)
 49
 50/*
 51 * Total number of page tables kernel_add_identity_map() can allocate,
 52 * including page tables consumed by startup_32().
 53 *
 54 * Worst-case scenario:
 55 *  - 5-level paging needs 1 level5 table;
 56 *  - KASLR needs to map kernel, boot_params, cmdline and randomized kernel,
 57 *    assuming all of them cross 256T boundary:
 58 *    + 4*2 level4 table;
 59 *    + 4*2 level3 table;
 60 *    + 4*2 level2 table;
 61 *  - X86_VERBOSE_BOOTUP needs to map the first 2M (video RAM):
 62 *    + 1 level4 table;
 63 *    + 1 level3 table;
 64 *    + 1 level2 table;
 65 * Total: 28 tables
 66 *
 67 * Add 4 spare table in case decompressor touches anything beyond what is
 68 * accounted above. Warn if it happens.
 69 */
 70# define BOOT_PGT_SIZE_WARN	(28*4096)
 71# define BOOT_PGT_SIZE		(32*4096)
 72
 73#else /* !CONFIG_X86_64 */
 74# define BOOT_STACK_SIZE	0x1000
 75#endif
 76
 77#define TRAMPOLINE_32BIT_SIZE		(2 * PAGE_SIZE)
 78
 79#define TRAMPOLINE_32BIT_CODE_OFFSET	PAGE_SIZE
 80#define TRAMPOLINE_32BIT_CODE_SIZE	0xA0
 81
 82#ifndef __ASSEMBLER__
 83extern unsigned int output_len;
 84extern const unsigned long kernel_text_size;
 85extern const unsigned long kernel_inittext_offset;
 86extern const unsigned long kernel_inittext_size;
 87extern const unsigned long kernel_total_size;
 88
 89unsigned long decompress_kernel(unsigned char *outbuf, unsigned long virt_addr,
 90				void (*error)(char *x));
 91
 92extern struct boot_params *boot_params_ptr;
 93extern unsigned long *trampoline_32bit;
 94extern const u16 trampoline_ljmp_imm_offset;
 95
 96void trampoline_32bit_src(void *trampoline, bool enable_5lvl);
 97
 98#endif
 99
100#endif /* _ASM_X86_BOOT_H */
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